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ddr: imx8m: Fix ddr4 driver build issue
Since the parameter of dram_pll_init is changed, update to use new. Also remove non-existed header file. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
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9699fb4de5
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ca729cd16c
1 changed files with 1 additions and 2 deletions
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@ -8,7 +8,6 @@
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/arch/ddr.h>
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#include <asm/arch/ddr.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/imx8m_ddr.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/sys_proto.h>
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void ddr4_cfg_umctl2(struct dram_cfg_param *ddrc_cfg, int num)
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void ddr4_cfg_umctl2(struct dram_cfg_param *ddrc_cfg, int num)
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@ -41,7 +40,7 @@ void ddr_init(struct dram_timing_info *dram_timing)
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CLK_ROOT_SOURCE_SEL(4) |
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CLK_ROOT_SOURCE_SEL(4) |
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CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV4));
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CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV4));
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dram_pll_init(DRAM_PLL_OUT_600M);
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dram_pll_init(MHZ(600));
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reg32_write(0x303A00EC, 0x0000ffff); /* PGC_CPU_MAPPING */
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reg32_write(0x303A00EC, 0x0000ffff); /* PGC_CPU_MAPPING */
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reg32setbit(0x303A00F8, 5); /* PU_PGC_SW_PUP_REQ */
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reg32setbit(0x303A00F8, 5); /* PU_PGC_SW_PUP_REQ */
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