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Move CONFIG_PHY_ADDR to Kconfig
CONFIG_PHY_ADDR is used for old-style configuration. This makes impossible changing the PHY address, if multiple boards share a same config header file (for example include/configs/sunxi-common.h). Moving this to Kconfig helps overcoming this issue. It's defined as entry inside PHYLIB section. After the implemention, moveconfig was run. The issues are: - edb9315a - CONFIG_PHYLIB is not enabled. Entry is deleted. - ds414 - CONFIG_PHYLIB is in incompatible format: { 0x1, 0x0 }. This entry is also deleted. - devkit3250 - The PHY_ADDR is in hex format (0x1F). Manually CONFIG_PHY_ADDR=31 is added in the defconfig. After the changes the suspicious defconfigs passes building. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> [jagan: rebased on master] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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19 changed files with 11 additions and 21 deletions
4
README
4
README
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@ -1420,10 +1420,6 @@ The following options need to be configured:
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be at least 4MB.
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- MII/PHY support:
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CONFIG_PHY_ADDR
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The address of PHY on MII bus.
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CONFIG_PHY_CLOCK_FREQ (ppc4xx)
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The clock frequency of the MII bus
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@ -36,6 +36,7 @@ CONFIG_MTD_NOR_FLASH=y
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CONFIG_NAND=y
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CONFIG_SPL_NAND_SIMPLE=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_ADDR=31
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CONFIG_DM_SERIAL=y
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CONFIG_SYS_NS16550=y
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CONFIG_LPC32XX_SSP=y
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@ -20,6 +20,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_DM_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_MMC_MESON_GX=y
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CONFIG_PHY_ADDR=8
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CONFIG_PHY_MESON_GXL=y
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CONFIG_DM_ETH=y
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CONFIG_ETH_DESIGNWARE=y
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@ -20,6 +20,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_DM_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_MMC_MESON_GX=y
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CONFIG_PHY_ADDR=8
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CONFIG_PHY_MESON_GXL=y
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CONFIG_DM_ETH=y
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CONFIG_ETH_DESIGNWARE=y
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@ -20,6 +20,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_DM_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_MMC_MESON_GX=y
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CONFIG_PHY_ADDR=8
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CONFIG_PHY_MESON_GXL=y
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CONFIG_DM_ETH=y
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CONFIG_ETH_DESIGNWARE=y
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@ -13,6 +13,13 @@ menuconfig PHYLIB
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if PHYLIB
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config PHY_ADDR
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int "PHY address"
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default 1 if ARCH_SUNXI
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default 0
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help
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The address of PHY on MII bus. Usually in range of 0 to 31.
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config B53_SWITCH
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bool "Broadcom BCM53xx (RoboSwitch) Ethernet switch PHY support."
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help
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@ -258,7 +258,6 @@
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#define CONFIG_BOOTP_DNS2
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#define CONFIG_BOOTP_SEND_HOSTNAME
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#define CONFIG_NET_RETRY_COUNT 10
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#define CONFIG_PHY_ADDR 0
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#define CONFIG_PHY_SMSC
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/* I2C configuration */
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@ -282,7 +282,6 @@
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#endif
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/* Network. */
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#define CONFIG_PHY_ADDR 0
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#define CONFIG_PHY_SMSC
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#define CONFIG_MII
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#define CONFIG_PHY_ATHEROS
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@ -71,7 +71,6 @@
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#define CONFIG_RMII
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#define CONFIG_PHY_SMSC
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#define CONFIG_LPC32XX_ETH
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#define CONFIG_PHY_ADDR 0x1F
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#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
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/*
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@ -40,7 +40,6 @@
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#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */
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#define CONFIG_PHY_MARVELL /* there is a marvell phy */
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#define CONFIG_PHY_ADDR { 0x1, 0x0 }
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#define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII
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#define CONFIG_SYS_ALT_MEMTEST
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@ -95,7 +95,6 @@
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#define CONFIG_DRIVER_EP93XX_MAC
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#define CONFIG_MII_SUPPRESS_PREAMBLE
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#define CONFIG_MII
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#define CONFIG_PHY_ADDR 1
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#undef CONFIG_NETCONSOLE
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/* SDRAM configuration */
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@ -12,8 +12,6 @@
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#define CONFIG_MISC_INIT_R
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#define CONFIG_PHY_ADDR 8
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#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-khadas-vim.dtb\0"
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#include <configs/meson-gxbb-common.h>
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@ -12,8 +12,6 @@
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#define CONFIG_MISC_INIT_R
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#define CONFIG_PHY_ADDR 8
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#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-libretech-cc.dtb\0"
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#include <configs/meson-gxbb-common.h>
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@ -12,8 +12,6 @@
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#define CONFIG_MISC_INIT_R
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#define CONFIG_PHY_ADDR 8
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/* Serial setup */
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#define CONFIG_CONS_INDEX 0
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@ -77,7 +77,6 @@
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#define CONFIG_SYS_NS16550_COM1 0x44e09000
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/* Ethernet support */
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#define CONFIG_PHY_ADDR 0
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#define CONFIG_PHY_RESET_DELAY 1000
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/* SPL */
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@ -288,12 +288,10 @@ extern int soft_i2c_gpio_scl;
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/* Ethernet support */
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#ifdef CONFIG_SUN4I_EMAC
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#define CONFIG_PHY_ADDR 1
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#define CONFIG_MII /* MII PHY management */
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#endif
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#ifdef CONFIG_SUN7I_GMAC
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#define CONFIG_PHY_ADDR 1
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#define CONFIG_MII /* MII PHY management */
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#define CONFIG_PHY_REALTEK
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#endif
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@ -56,7 +56,6 @@
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#define CONFIG_PHY_SMSC
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#define CONFIG_LPC32XX_ETH
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#define CONFIG_PHY_ADDR 0
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#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
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/* FIXME: remove "Waiting for PHY auto negotiation to complete..." message */
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@ -70,7 +70,6 @@
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/* Ethernet config options */
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#define CONFIG_MII
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#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_SPEAR_GPIO
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@ -1541,7 +1541,6 @@ CONFIG_PERIF2_FREQ
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CONFIG_PERIF3_FREQ
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CONFIG_PERIF4_FREQ
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CONFIG_PHYSMEM
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CONFIG_PHY_ADDR
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CONFIG_PHY_BASE_ADR
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CONFIG_PHY_BCM5421S
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CONFIG_PHY_ET1011C_TX_CLK_FIX
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