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sunxi: add support for Pine H64 board
Pine H64 is a SBC with Allwinner H6 SoC produced by Pine64. It features 1GiB/2GiB/4GiB(3GiB usable) DRAM, two USB 2.0 ports, one USB 3.0 port and a mPCIE slot. Add support for it. The device tree is from Linux next-20180720. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
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@ -390,6 +390,8 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \
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sun50i-h5-orangepi-pc2.dtb \
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sun50i-h5-orangepi-prime.dtb \
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sun50i-h5-orangepi-zero-plus2.dtb
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dtb-$(CONFIG_MACH_SUN50I_H6) += \
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sun50i-h6-pine-h64.dtb
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dtb-$(CONFIG_MACH_SUN50I) += \
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sun50i-a64-amarula-relic.dtb \
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sun50i-a64-bananapi-m64.dtb \
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185
arch/arm/dts/sun50i-h6-pine-h64.dts
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185
arch/arm/dts/sun50i-h6-pine-h64.dts
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@ -0,0 +1,185 @@
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// SPDX-License-Identifier: (GPL-2.0+ or MIT)
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/*
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* Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.io>
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*/
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/dts-v1/;
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#include "sun50i-h6.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Pine H64";
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compatible = "pine64,pine-h64", "allwinner,sun50i-h6";
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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leds {
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compatible = "gpio-leds";
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heartbeat {
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label = "pine-h64:green:heartbeat";
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gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
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};
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link {
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label = "pine-h64:white:link";
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gpios = <&r_pio 0 3 GPIO_ACTIVE_HIGH>; /* PL3 */
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};
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status {
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label = "pine-h64:blue:status";
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gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
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};
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};
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};
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&mmc0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_pins>;
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vmmc-supply = <®_cldo1>;
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cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_pins>;
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vmmc-supply = <®_cldo1>;
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vqmmc-supply = <®_bldo2>;
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non-removable;
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cap-mmc-hw-reset;
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status = "okay";
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};
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&r_i2c {
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status = "okay";
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axp805: pmic@36 {
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compatible = "x-powers,axp805", "x-powers,axp806";
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reg = <0x36>;
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interrupt-parent = <&r_intc>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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interrupt-controller;
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#interrupt-cells = <1>;
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x-powers,self-working-mode;
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regulators {
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reg_aldo1: aldo1 {
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-pl";
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};
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reg_aldo2: aldo2 {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-ac200";
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};
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reg_aldo3: aldo3 {
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/* This regulator is connected with CLDO1 */
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-3v3-1";
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};
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reg_bldo1: bldo1 {
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regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc-bias-pll";
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};
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reg_bldo2: bldo2 {
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regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc-efuse-pcie-hdmi-io";
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};
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reg_bldo3: bldo3 {
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regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc-dcxoio";
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};
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bldo4 {
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/* unused */
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};
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reg_cldo1: cldo1 {
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/* This regulator is connected with ALDO3 */
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-3v3-2";
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};
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reg_cldo2: cldo2 {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-wifi-1";
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};
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reg_cldo3: cldo3 {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-wifi-2";
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};
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reg_dcdca: dcdca {
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regulator-always-on;
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regulator-min-microvolt = <810000>;
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regulator-max-microvolt = <1080000>;
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regulator-name = "vdd-cpu";
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};
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reg_dcdcc: dcdcc {
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regulator-min-microvolt = <810000>;
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regulator-max-microvolt = <1080000>;
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regulator-name = "vdd-gpu";
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};
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reg_dcdcd: dcdcd {
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regulator-always-on;
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regulator-min-microvolt = <960000>;
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regulator-max-microvolt = <960000>;
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regulator-name = "vdd-sys";
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};
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reg_dcdce: dcdce {
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regulator-always-on;
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-name = "vcc-dram";
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};
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sw {
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/* unused */
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};
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};
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};
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pcf8563: rtc@51 {
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compatible = "nxp,pcf8563";
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reg = <0x51>;
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#clock-cells = <0>;
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};
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_ph_pins>;
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status = "okay";
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};
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@ -370,6 +370,11 @@ M: Andre Przywara <andre.przywara@arm.com>
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S: Maintained
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F: configs/pine64_plus_defconfig
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PINE H64 BOARD
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M: Icenowy Zheng <icenowy@aosc.io>
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S: Maintained
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F: configs/pine_h64_defconfig
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R16 EVB PARROT BOARD
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M: Quentin Schulz <quentin.schulz@free-electrons.com>
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S: Maintained
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15
configs/pine_h64_defconfig
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15
configs/pine_h64_defconfig
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CONFIG_ARM=y
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CONFIG_ARCH_SUNXI=y
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CONFIG_MACH_SUN50I_H6=y
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CONFIG_DRAM_ODT_EN=y
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CONFIG_MMC0_CD_PIN="PF6"
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CONFIG_MMC_SUNXI_SLOT_EXTRA=2
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# CONFIG_PSCI_RESET is not set
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CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-pine-h64"
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SPL=y
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# CONFIG_CMD_FLASH is not set
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# CONFIG_CMD_FPGA is not set
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# CONFIG_SPL_DOS_PARTITION is not set
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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