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Merge tag 'u-boot-imx-next-20231220' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next

Browse source 
- Put the USB hub out of reset on colibri-imx8x
- Fix VDDx brownout interrupt register of i.MX23/i.MX28
- Fix Phytec imx8m SoM detection
- Add TPM support for gw72xx boards
This commit is contained in:
Tom Rini 2023-12-20 14:14:46 -05:00
commit a0d0e132b3
16 changed files with 137 additions and 87 deletions
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8
arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
View file

@ -1177,8 +1177,9 @@ static void mxs_power_set_vddx(const struct mxs_vddx_cfg *cfg,
if (adjust_up && cfg->bo_irq) {
if (powered_by_linreg) {
bo_int = readl(cfg->reg);
clrbits_le32(cfg->reg, cfg->bo_enirq);
bo_int = readl(&power_regs->hw_power_ctrl);
clrbits_le32(&power_regs->hw_power_ctrl,
cfg->bo_enirq);
}
setbits_le32(cfg->reg, cfg->bo_offset_mask);
}
@ -1220,7 +1221,8 @@ static void mxs_power_set_vddx(const struct mxs_vddx_cfg *cfg,
if (adjust_up && powered_by_linreg) {
writel(cfg->bo_irq, &power_regs->hw_power_ctrl_clr);
if (bo_int & cfg->bo_enirq)
setbits_le32(cfg->reg, cfg->bo_enirq);
setbits_le32(&power_regs->hw_power_ctrl,
cfg->bo_enirq);
}
clrsetbits_le32(cfg->reg, cfg->bo_offset_mask,

1
arch/arm/dts/fsl-imx8qm-apalis.dts
View file

@ -9,7 +9,6 @@
/memreserve/ 0x80000000 0x00020000;
#include "fsl-imx8qm.dtsi"
#include "fsl-imx8qm-apalis-u-boot.dtsi"
/ {
model = "Toradex Apalis iMX8";

15
arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi
View file

@ -84,6 +84,21 @@
bootph-some-ram;
};
&gpio_expander_43 {
usb-bypass-n-hog {
gpio-hog;
gpios = <5 GPIO_ACTIVE_LOW>;
line-name = "usb-bypass-n";
output-high;
};
usb-reset-n-hog {
gpio-hog;
gpios = <4 GPIO_ACTIVE_LOW>;
line-name = "usb-reset-n";
output-low;
};
};
&gpio0 {
bootph-some-ram;
};

3
arch/arm/dts/fsl-imx8qxp-colibri.dts
View file

@ -6,7 +6,6 @@
/dts-v1/;
#include "fsl-imx8qxp.dtsi"
#include "fsl-imx8qxp-colibri-u-boot.dtsi"
/ {
model = "Toradex Colibri iMX8X";
@ -320,8 +319,6 @@
gpio-controller;
#gpio-cells = <2>;
reg = <0x43>;
initial_io_dir = <0xff>;
initial_output = <0x05>;
};
};

7
arch/arm/dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi
View file

@ -39,6 +39,13 @@
gpios = <9 GPIO_ACTIVE_HIGH>;
line-name = "dio1";
};
tpm_rst {
gpio-hog;
output-high;
gpios = <11 GPIO_ACTIVE_HIGH>;
line-name = "tpm_rst#";
};
};
&gpio4 {

10
arch/arm/dts/imx8mm-venice-gw72xx.dtsi
View file

@ -84,8 +84,15 @@
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2>;
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
<&gpio1 10 GPIO_ACTIVE_LOW>;
status = "okay";
tpm@1 {
compatible = "tcg,tpm_tis-spi";
reg = <0x1>;
spi-max-frequency = <36000000>;
};
};
&gpio1 {
@ -314,6 +321,7 @@
MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6
MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6
MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6
MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0xd6
>;
};

9
arch/arm/dts/imx8mp-venice-gw72xx-2x-u-boot.dtsi
View file

@ -4,6 +4,15 @@
*/
#include "imx8mp-venice-gw702x-u-boot.dtsi"
&gpio1 {
tpm_rst {
gpio-hog;
output-high;
gpios = <11 GPIO_ACTIVE_HIGH>;
line-name = "tpm_rst#";
};
};
&gpio4 {
dio_1 {
gpio-hog;

9
arch/arm/dts/imx8mp-venice-gw72xx.dtsi
View file

@ -83,8 +83,14 @@
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2>;
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
<&gpio1 10 GPIO_ACTIVE_LOW>;
status = "okay";
tpm@1 {
compatible = "tcg,tpm_tis-spi";
reg = <0x1>;
spi-max-frequency = <36000000>;
};
};
&gpio4 {
@ -286,6 +292,7 @@
MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140
MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140
MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140
MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x140
>;
};

40
board/phytec/common/imx8m_som_detection.c
View file

@ -15,6 +15,8 @@
extern struct phytec_eeprom_data eeprom_data;
#if IS_ENABLED(CONFIG_PHYTEC_IMX8M_SOM_DETECTION)
/* Check if the SoM is actually one of the following products:
* - i.MX8MM
* - i.MX8MN
@ -23,18 +25,18 @@ extern struct phytec_eeprom_data eeprom_data;
*
* Returns 0 in case it's a known SoM. Otherwise, returns -1.
*/
u8 __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data)
int __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data)
{
char *opt;
u8 som;
if (!data)
data = &eeprom_data;
/* We can not do the check for early API revisions */
if (data->api_rev < PHYTEC_API_REV2)
return -1;
if (!data)
data = &eeprom_data;
som = data->data.data_api2.som_no;
debug("%s: som id: %u\n", __func__, som);
@ -166,3 +168,33 @@ u8 __maybe_unused phytec_get_imx8mp_rtc(struct phytec_eeprom_data *data)
debug("%s: rtc: %u\n", __func__, rtc);
return rtc;
}
#else
inline int __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data)
{
return -1;
}
inline u8 __maybe_unused
phytec_get_imx8m_ddr_size(struct phytec_eeprom_data *data)
{
return PHYTEC_EEPROM_INVAL;
}
inline u8 __maybe_unused phytec_get_imx8mp_rtc(struct phytec_eeprom_data *data)
{
return PHYTEC_EEPROM_INVAL;
}
inline u8 __maybe_unused phytec_get_imx8m_spi(struct phytec_eeprom_data *data)
{
return PHYTEC_EEPROM_INVAL;
}
inline u8 __maybe_unused phytec_get_imx8m_eth(struct phytec_eeprom_data *data)
{
return PHYTEC_EEPROM_INVAL;
}
#endif /* IS_ENABLED(CONFIG_PHYTEC_IMX8M_SOM_DETECTION) */

34
board/phytec/common/imx8m_som_detection.h
View file

@ -13,42 +13,10 @@
#define PHYTEC_IMX8MM_SOM 69
#define PHYTEC_IMX8MP_SOM 70
#if IS_ENABLED(CONFIG_PHYTEC_IMX8M_SOM_DETECTION)
u8 __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data);
int __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8m_ddr_size(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8mp_rtc(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8m_spi(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8m_eth(struct phytec_eeprom_data *data);
#else
inline u8 __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data)
{
return -1;
}
inline u8 __maybe_unused
phytec_get_imx8m_ddr_size(struct phytec_eeprom_data *data)
{
return PHYTEC_EEPROM_INVAL;
}
inline u8 __maybe_unused phytec_get_imx8mp_rtc(struct phytec_eeprom_data *data)
{
return PHYTEC_EEPROM_INVAL;
}
inline u8 __maybe_unused phytec_get_imx8m_spi(struct phytec_eeprom_data *data)
{
return PHYTEC_EEPROM_INVAL;
}
inline u8 __maybe_unused phytec_get_imx8m_eth(struct phytec_eeprom_data *data)
{
return PHYTEC_EEPROM_INVAL;
}
#endif /* IS_ENABLED(CONFIG_PHYTEC_IMX8M_SOM_DETECTION) */
#endif /* _PHYTEC_IMX8M_SOM_DETECTION_H */

46
board/phytec/common/phytec_som_detection.c
View file

@ -16,6 +16,8 @@
struct phytec_eeprom_data eeprom_data;
#if IS_ENABLED(CONFIG_PHYTEC_SOM_DETECTION)
int phytec_eeprom_data_setup_fallback(struct phytec_eeprom_data *data,
int bus_num, int addr, int addr_fallback)
{
@ -83,8 +85,8 @@ int phytec_eeprom_data_init(struct phytec_eeprom_data *data,
}
ptr = (int *)data;
for (i = 0; i < sizeof(struct phytec_eeprom_data); i += sizeof(ptr))
if (*ptr != 0x0)
for (i = 0; i < sizeof(struct phytec_eeprom_data); i++)
if (ptr[i] != 0x0)
break;
if (i == sizeof(struct phytec_eeprom_data)) {
@ -159,7 +161,8 @@ void __maybe_unused phytec_print_som_info(struct phytec_eeprom_data *data)
sub_som_type2 = 2;
break;
default:
break;
pr_err("%s: Invalid SoM type: %i", __func__, api2->som_type);
return;
};
printf("SoM: %s-%03u-%s-%03u ",
@ -201,3 +204,40 @@ u8 __maybe_unused phytec_get_rev(struct phytec_eeprom_data *data)
return api2->pcb_rev;
}
#else
inline int phytec_eeprom_data_setup(struct phytec_eeprom_data *data,
int bus_num, int addr)
{
return PHYTEC_EEPROM_INVAL;
}
inline int phytec_eeprom_data_setup_fallback(struct phytec_eeprom_data *data,
int bus_num, int addr,
int addr_fallback)
{
return PHYTEC_EEPROM_INVAL;
}
inline int phytec_eeprom_data_init(struct phytec_eeprom_data *data,
int bus_num, int addr)
{
return PHYTEC_EEPROM_INVAL;
}
inline void __maybe_unused phytec_print_som_info(struct phytec_eeprom_data *data)
{
}
inline char *__maybe_unused phytec_get_opt(struct phytec_eeprom_data *data)
{
return NULL;
}
u8 __maybe_unused phytec_get_rev(struct phytec_eeprom_data *data)
{
return PHYTEC_EEPROM_INVAL;
}
#endif /* IS_ENABLED(CONFIG_PHYTEC_SOM_DETECTION) */

38
board/phytec/common/phytec_som_detection.h
View file

@ -56,8 +56,6 @@ struct phytec_eeprom_data {
} data;
} __packed;
#if IS_ENABLED(CONFIG_PHYTEC_SOM_DETECTION)
int phytec_eeprom_data_setup_fallback(struct phytec_eeprom_data *data,
int bus_num, int addr,
int addr_fallback);
@ -70,40 +68,4 @@ void __maybe_unused phytec_print_som_info(struct phytec_eeprom_data *data);
char * __maybe_unused phytec_get_opt(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_rev(struct phytec_eeprom_data *data);
#else
inline int phytec_eeprom_data_setup(struct phytec_eeprom_data *data,
int bus_num, int addr)
{
return PHYTEC_EEPROM_INVAL;
}
inline int phytec_eeprom_data_setup_fallback(struct phytec_eeprom_data *data,
int bus_num, int addr,
int addr_fallback)
{
return PHYTEC_EEPROM_INVAL;
}
inline int phytec_eeprom_data_init(struct phytec_eeprom_data *data,
int bus_num, int addr)
{
return PHYTEC_EEPROM_INVAL;
}
inline void __maybe_unused phytec_print_som_info(struct phytec_eeprom_data *data)
{
}
inline char *__maybe_unused phytec_get_opt(struct phytec_eeprom_data *data)
{
return NULL;
}
u8 __maybe_unused phytec_get_rev(struct phytec_eeprom_data *data)
{
return PHYTEC_EEPROM_INVAL;
}
#endif /* IS_ENABLED(CONFIG_PHYTEC_SOM_DETECTION) */
#endif /* _PHYTEC_SOM_DETECTION_H */

1
configs/colibri-imx8x_defconfig
View file

@ -65,6 +65,7 @@ CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_CLK_IMX8=y
CONFIG_CPU=y
CONFIG_GPIO_HOG=y
CONFIG_FXL6408_GPIO=y
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y

1
configs/imx8mm_venice_defconfig
View file

@ -31,6 +31,7 @@ CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="gsc wd-disable"
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000

1
configs/imx8mn_venice_defconfig
View file

@ -32,6 +32,7 @@ CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="gsc wd-disable"
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x25000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y

1
configs/imx8mp_venice_defconfig
View file

@ -32,6 +32,7 @@ CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="gsc wd-disable"
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y