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mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE

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We have a number of CONFIG symbols to express the fixed size of system
memory.  For now, rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
and adjust usage to match that CONFIG_SYS_SDRAM_SIZE expects the entire
size rather than MiB.

Cc: Marek Behún <marek.behun@nic.cz>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Marek Behún <marek.behun@nic.cz>
This commit is contained in:
Tom Rini 2021-08-21 13:50:14 -04:00
parent 5b527c505f
commit 94752f5fb1
3 changed files with 8 additions and 4 deletions
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4
drivers/ddr/marvell/axp/ddr3_axp.h
View file

@ -19,10 +19,10 @@
#define FAR_END_DIMM_ADDR 0x50
#define MAX_DIMM_ADDR 0x60
#ifndef CONFIG_DDR_FIXED_SIZE
#ifndef CONFIG_SYS_SDRAM_SIZE
#define SDRAM_CS_SIZE 0xFFFFFFF
#else
#define SDRAM_CS_SIZE (CONFIG_DDR_FIXED_SIZE - 1)
#define SDRAM_CS_SIZE ((CONFIG_SYS_SDRAM_SIZE >> 10) - 1)
#endif
#define SDRAM_CS_BASE 0x0
#define SDRAM_DIMM_SIZE 0x80000000

4
include/configs/maxbcm.h
View file

@ -6,6 +6,8 @@
#ifndef _CONFIG_DB_MV7846MP_GP_H
#define _CONFIG_DB_MV7846MP_GP_H
#include <linux/sizes.h>
/*
* High Level Configuration Options (easy to change)
*/
@ -61,7 +63,7 @@
/* SPL related SPI defines */
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
#define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */
#define CONFIG_SYS_SDRAM_SIZE SZ_1G
#define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */
#endif /* _CONFIG_DB_MV7846MP_GP_H */

4
include/configs/theadorable.h
View file

@ -6,6 +6,8 @@
#ifndef _CONFIG_THEADORABLE_H
#define _CONFIG_THEADORABLE_H
#include <linux/sizes.h>
/*
* High Level Configuration Options (easy to change)
*/
@ -89,6 +91,6 @@
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
#define CONFIG_DDR_FIXED_SIZE (2 << 20) /* 2GiB */
#define CONFIG_SYS_SDRAM_SIZE SZ_2G
#endif /* _CONFIG_THEADORABLE_H */