mirror of
https://github.com/AsahiLinux/u-boot
synced 2025-03-17 15:27:00 +00:00
Merge branch '2019-05-24-master-imports'
- Import Angelo's series to add basic DT support to m68k
This commit is contained in:
commit
6760cef385
137 changed files with 2495 additions and 486 deletions
|
@ -28,6 +28,7 @@ config M68K
|
|||
select HAVE_PRIVATE_LIBGCC
|
||||
select SYS_BOOT_GET_CMDLINE
|
||||
select SYS_BOOT_GET_KBD
|
||||
select SUPPORT_OF_CONTROL
|
||||
|
||||
config MICROBLAZE
|
||||
bool "MicroBlaze architecture"
|
||||
|
|
|
@ -6,36 +6,69 @@ config SYS_ARCH
|
|||
|
||||
# processor family
|
||||
config MCF520x
|
||||
select OF_CONTROL
|
||||
select DM
|
||||
select DM_SERIAL
|
||||
bool
|
||||
|
||||
config MCF52x2
|
||||
select OF_CONTROL
|
||||
select DM
|
||||
select DM_SERIAL
|
||||
bool
|
||||
|
||||
config MCF523x
|
||||
select OF_CONTROL
|
||||
select DM
|
||||
select DM_SERIAL
|
||||
bool
|
||||
|
||||
config MCF530x
|
||||
select OF_CONTROL
|
||||
select DM
|
||||
select DM_SERIAL
|
||||
bool
|
||||
|
||||
config MCF5301x
|
||||
select OF_CONTROL
|
||||
select DM
|
||||
select DM_SERIAL
|
||||
bool
|
||||
|
||||
config MCF532x
|
||||
select OF_CONTROL
|
||||
select DM
|
||||
select DM_SERIAL
|
||||
bool
|
||||
|
||||
config MCF537x
|
||||
select OF_CONTROL
|
||||
select DM
|
||||
select DM_SERIAL
|
||||
bool
|
||||
|
||||
config MCF5441x
|
||||
select OF_CONTROL
|
||||
select DM
|
||||
select DM_SERIAL
|
||||
bool
|
||||
|
||||
config MCF5445x
|
||||
select OF_CONTROL
|
||||
select DM
|
||||
select DM_SERIAL
|
||||
bool
|
||||
|
||||
config MCF5227x
|
||||
select OF_CONTROL
|
||||
select DM
|
||||
select DM_SERIAL
|
||||
bool
|
||||
|
||||
config MCF547x_8x
|
||||
select OF_CONTROL
|
||||
select DM
|
||||
select DM_SERIAL
|
||||
bool
|
||||
|
||||
# processor type
|
||||
|
|
|
@ -6,4 +6,4 @@
|
|||
# ccflags-y += -DET_DEBUG
|
||||
|
||||
extra-y = start.o
|
||||
obj-y = cpu.o speed.o cpu_init.o interrupts.o
|
||||
obj-y = cpu.o speed.o cpu_init.o interrupts.o dspi.o
|
||||
|
|
|
@ -16,6 +16,15 @@
|
|||
#include <asm/rtc.h>
|
||||
#include <linux/compiler.h>
|
||||
|
||||
void cfspi_port_conf(void)
|
||||
{
|
||||
gpio_t *gpio = (gpio_t *)MMAP_GPIO;
|
||||
|
||||
out_8(&gpio->par_dspi,
|
||||
GPIO_PAR_DSPI_SIN_SIN | GPIO_PAR_DSPI_SOUT_SOUT |
|
||||
GPIO_PAR_DSPI_SCK_SCK);
|
||||
}
|
||||
|
||||
/*
|
||||
* Breath some life into the CPU...
|
||||
*
|
||||
|
@ -93,6 +102,8 @@ void cpu_init_f(void)
|
|||
#endif
|
||||
|
||||
icache_enable();
|
||||
|
||||
cfspi_port_conf();
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -137,57 +148,3 @@ void uart_port_conf(int port)
|
|||
break;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CF_DSPI
|
||||
void cfspi_port_conf(void)
|
||||
{
|
||||
gpio_t *gpio = (gpio_t *) MMAP_GPIO;
|
||||
|
||||
out_8(&gpio->par_dspi,
|
||||
GPIO_PAR_DSPI_SIN_SIN | GPIO_PAR_DSPI_SOUT_SOUT |
|
||||
GPIO_PAR_DSPI_SCK_SCK);
|
||||
}
|
||||
|
||||
int cfspi_claim_bus(uint bus, uint cs)
|
||||
{
|
||||
dspi_t *dspi = (dspi_t *) MMAP_DSPI;
|
||||
gpio_t *gpio = (gpio_t *) MMAP_GPIO;
|
||||
|
||||
if ((in_be32(&dspi->sr) & DSPI_SR_TXRXS) != DSPI_SR_TXRXS)
|
||||
return -1;
|
||||
|
||||
/* Clear FIFO and resume transfer */
|
||||
clrbits_be32(&dspi->mcr, DSPI_MCR_CTXF | DSPI_MCR_CRXF);
|
||||
|
||||
switch (cs) {
|
||||
case 0:
|
||||
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_UNMASK);
|
||||
setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
|
||||
break;
|
||||
case 2:
|
||||
clrbits_8(&gpio->par_timer, ~GPIO_PAR_TIMER_T2IN_UNMASK);
|
||||
setbits_8(&gpio->par_timer, GPIO_PAR_TIMER_T2IN_DSPIPCS2);
|
||||
break;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void cfspi_release_bus(uint bus, uint cs)
|
||||
{
|
||||
dspi_t *dspi = (dspi_t *) MMAP_DSPI;
|
||||
gpio_t *gpio = (gpio_t *) MMAP_GPIO;
|
||||
|
||||
/* Clear FIFO */
|
||||
clrbits_be32(&dspi->mcr, DSPI_MCR_CTXF | DSPI_MCR_CRXF);
|
||||
|
||||
switch (cs) {
|
||||
case 0:
|
||||
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
|
||||
break;
|
||||
case 2:
|
||||
clrbits_8(&gpio->par_timer, ~GPIO_PAR_TIMER_T2IN_UNMASK);
|
||||
break;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
|
43
arch/m68k/cpu/mcf5227x/dspi.c
Normal file
43
arch/m68k/cpu/mcf5227x/dspi.c
Normal file
|
@ -0,0 +1,43 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* (C) Copyright 2019
|
||||
* Angelo Dureghello <angleo@sysam.it>
|
||||
*
|
||||
* CPU specific dspi routines
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/immap.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#ifdef CONFIG_CF_DSPI
|
||||
void dspi_chip_select(int cs)
|
||||
{
|
||||
struct gpio *gpio = (struct gpio *)MMAP_GPIO;
|
||||
|
||||
switch (cs) {
|
||||
case 0:
|
||||
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_UNMASK);
|
||||
setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
|
||||
break;
|
||||
case 2:
|
||||
clrbits_8(&gpio->par_timer, ~GPIO_PAR_TIMER_T2IN_UNMASK);
|
||||
setbits_8(&gpio->par_timer, GPIO_PAR_TIMER_T2IN_DSPIPCS2);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void dspi_chip_unselect(int cs)
|
||||
{
|
||||
struct gpio *gpio = (struct gpio *)MMAP_GPIO;
|
||||
|
||||
switch (cs) {
|
||||
case 0:
|
||||
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
|
||||
break;
|
||||
case 2:
|
||||
clrbits_8(&gpio->par_timer, ~GPIO_PAR_TIMER_T2IN_UNMASK);
|
||||
break;
|
||||
}
|
||||
}
|
||||
#endif /* CONFIG_CF_DSPI */
|
|
@ -378,7 +378,8 @@ _start:
|
|||
clr.l %sp@-
|
||||
|
||||
/* run low-level board init code (from flash) */
|
||||
bsr board_init_f
|
||||
move.l #board_init_f, %a1
|
||||
jsr (%a1)
|
||||
|
||||
/* board_init_f() does not return */
|
||||
|
||||
|
|
|
@ -6,4 +6,4 @@
|
|||
# ccflags-y += -DET_DEBUG
|
||||
|
||||
extra-y = start.o
|
||||
obj-y = cpu.o speed.o cpu_init.o interrupts.o pci.o
|
||||
obj-y = cpu.o speed.o cpu_init.o interrupts.o pci.o dspi.o
|
||||
|
|
|
@ -66,6 +66,32 @@ void init_fbcs(void)
|
|||
#endif
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CF_DSPI
|
||||
void cfspi_port_conf(void)
|
||||
{
|
||||
gpio_t *gpio = (gpio_t *)MMAP_GPIO;
|
||||
|
||||
#ifdef CONFIG_MCF5445x
|
||||
out_8(&gpio->par_dspi,
|
||||
GPIO_PAR_DSPI_SIN_SIN |
|
||||
GPIO_PAR_DSPI_SOUT_SOUT |
|
||||
GPIO_PAR_DSPI_SCK_SCK);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MCF5441x
|
||||
pm_t *pm = (pm_t *)MMAP_PM;
|
||||
|
||||
out_8(&gpio->par_dspi0,
|
||||
GPIO_PAR_DSPI0_SIN_DSPI0SIN | GPIO_PAR_DSPI0_SOUT_DSPI0SOUT |
|
||||
GPIO_PAR_DSPI0_SCK_DSPI0SCK);
|
||||
out_8(&gpio->srcr_dspiow, 3);
|
||||
|
||||
/* DSPI0 */
|
||||
out_8(&pm->pmcr0, 23);
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Breath some life into the CPU...
|
||||
*
|
||||
|
@ -204,6 +230,10 @@ void cpu_init_f(void)
|
|||
GPIO_PAR_FBCTL_OE | GPIO_PAR_FBCTL_TA_TA |
|
||||
GPIO_PAR_FBCTL_RW_RW | GPIO_PAR_FBCTL_TS_TS);
|
||||
|
||||
#ifdef CONFIG_CF_SPI
|
||||
cfspi_port_conf();
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SYS_FSL_I2C
|
||||
out_be16(&gpio->par_feci2c,
|
||||
GPIO_PAR_FECI2C_SCL_SCL | GPIO_PAR_FECI2C_SDA_SDA);
|
||||
|
@ -433,115 +463,3 @@ int fecpin_setclear(struct eth_device *dev, int setclear)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CF_DSPI
|
||||
void cfspi_port_conf(void)
|
||||
{
|
||||
gpio_t *gpio = (gpio_t *) MMAP_GPIO;
|
||||
|
||||
#ifdef CONFIG_MCF5445x
|
||||
out_8(&gpio->par_dspi,
|
||||
GPIO_PAR_DSPI_SIN_SIN |
|
||||
GPIO_PAR_DSPI_SOUT_SOUT |
|
||||
GPIO_PAR_DSPI_SCK_SCK);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MCF5441x
|
||||
pm_t *pm = (pm_t *) MMAP_PM;
|
||||
|
||||
out_8(&gpio->par_dspi0,
|
||||
GPIO_PAR_DSPI0_SIN_DSPI0SIN | GPIO_PAR_DSPI0_SOUT_DSPI0SOUT |
|
||||
GPIO_PAR_DSPI0_SCK_DSPI0SCK);
|
||||
out_8(&gpio->srcr_dspiow, 3);
|
||||
|
||||
/* DSPI0 */
|
||||
out_8(&pm->pmcr0, 23);
|
||||
#endif
|
||||
}
|
||||
|
||||
int cfspi_claim_bus(uint bus, uint cs)
|
||||
{
|
||||
dspi_t *dspi = (dspi_t *) MMAP_DSPI;
|
||||
gpio_t *gpio = (gpio_t *) MMAP_GPIO;
|
||||
|
||||
if ((in_be32(&dspi->sr) & DSPI_SR_TXRXS) != DSPI_SR_TXRXS)
|
||||
return -1;
|
||||
|
||||
/* Clear FIFO and resume transfer */
|
||||
clrbits_be32(&dspi->mcr, DSPI_MCR_CTXF | DSPI_MCR_CRXF);
|
||||
|
||||
#ifdef CONFIG_MCF5445x
|
||||
switch (cs) {
|
||||
case 0:
|
||||
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
|
||||
setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
|
||||
break;
|
||||
case 1:
|
||||
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1);
|
||||
setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1);
|
||||
break;
|
||||
case 2:
|
||||
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2);
|
||||
setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2);
|
||||
break;
|
||||
case 3:
|
||||
clrbits_8(&gpio->par_dma, ~GPIO_PAR_DMA_DACK0_UNMASK);
|
||||
setbits_8(&gpio->par_dma, GPIO_PAR_DMA_DACK0_PCS3);
|
||||
break;
|
||||
case 5:
|
||||
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5);
|
||||
setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5);
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MCF5441x
|
||||
switch (cs) {
|
||||
case 0:
|
||||
clrbits_8(&gpio->par_dspi0, ~GPIO_PAR_DSPI0_PCS0_MASK);
|
||||
setbits_8(&gpio->par_dspi0, GPIO_PAR_DSPI0_PCS0_DSPI0PCS0);
|
||||
break;
|
||||
case 1:
|
||||
clrbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1);
|
||||
setbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1);
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void cfspi_release_bus(uint bus, uint cs)
|
||||
{
|
||||
dspi_t *dspi = (dspi_t *) MMAP_DSPI;
|
||||
gpio_t *gpio = (gpio_t *) MMAP_GPIO;
|
||||
|
||||
/* Clear FIFO */
|
||||
clrbits_be32(&dspi->mcr, DSPI_MCR_CTXF | DSPI_MCR_CRXF);
|
||||
|
||||
#ifdef CONFIG_MCF5445x
|
||||
switch (cs) {
|
||||
case 0:
|
||||
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
|
||||
break;
|
||||
case 1:
|
||||
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1);
|
||||
break;
|
||||
case 2:
|
||||
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2);
|
||||
break;
|
||||
case 3:
|
||||
clrbits_8(&gpio->par_dma, ~GPIO_PAR_DMA_DACK0_UNMASK);
|
||||
break;
|
||||
case 5:
|
||||
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5);
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MCF5441x
|
||||
if (cs == 1)
|
||||
clrbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1);
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
88
arch/m68k/cpu/mcf5445x/dspi.c
Normal file
88
arch/m68k/cpu/mcf5445x/dspi.c
Normal file
|
@ -0,0 +1,88 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* (C) Copyright 2019
|
||||
* Angelo Dureghello <angleo@sysam.it>
|
||||
*
|
||||
* CPU specific dspi routines
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/immap.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#ifdef CONFIG_CF_DSPI
|
||||
void dspi_chip_select(int cs)
|
||||
{
|
||||
struct gpio *gpio = (struct gpio *)MMAP_GPIO;
|
||||
|
||||
#ifdef CONFIG_MCF5445x
|
||||
switch (cs) {
|
||||
case 0:
|
||||
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
|
||||
setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
|
||||
break;
|
||||
case 1:
|
||||
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1);
|
||||
setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1);
|
||||
break;
|
||||
case 2:
|
||||
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2);
|
||||
setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2);
|
||||
break;
|
||||
case 3:
|
||||
clrbits_8(&gpio->par_dma, ~GPIO_PAR_DMA_DACK0_UNMASK);
|
||||
setbits_8(&gpio->par_dma, GPIO_PAR_DMA_DACK0_PCS3);
|
||||
break;
|
||||
case 5:
|
||||
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5);
|
||||
setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5);
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
#ifdef CONFIG_MCF5441x
|
||||
switch (cs) {
|
||||
case 0:
|
||||
clrbits_8(&gpio->par_dspi0,
|
||||
~GPIO_PAR_DSPI0_PCS0_MASK);
|
||||
setbits_8(&gpio->par_dspi0,
|
||||
GPIO_PAR_DSPI0_PCS0_DSPI0PCS0);
|
||||
break;
|
||||
case 1:
|
||||
clrbits_8(&gpio->par_dspiow,
|
||||
GPIO_PAR_DSPIOW_DSPI0PSC1);
|
||||
setbits_8(&gpio->par_dspiow,
|
||||
GPIO_PAR_DSPIOW_DSPI0PSC1);
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void dspi_chip_unselect(int cs)
|
||||
{
|
||||
struct gpio *gpio = (struct gpio *)MMAP_GPIO;
|
||||
|
||||
#ifdef CONFIG_MCF5445x
|
||||
switch (cs) {
|
||||
case 0:
|
||||
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
|
||||
break;
|
||||
case 1:
|
||||
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1);
|
||||
break;
|
||||
case 2:
|
||||
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2);
|
||||
break;
|
||||
case 3:
|
||||
clrbits_8(&gpio->par_dma, ~GPIO_PAR_DMA_DACK0_UNMASK);
|
||||
break;
|
||||
case 5:
|
||||
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5);
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
#ifdef CONFIG_MCF5441x
|
||||
if (cs == 1)
|
||||
clrbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1);
|
||||
#endif
|
||||
}
|
||||
#endif /* CONFIG_CF_DSPI */
|
|
@ -131,7 +131,8 @@ _start:
|
|||
* then (and always) gd struct space will be reserved
|
||||
*/
|
||||
move.l %sp, -(%sp)
|
||||
bsr board_init_f_alloc_reserve
|
||||
move.l #board_init_f_alloc_reserve, %a1
|
||||
jsr (%a1)
|
||||
|
||||
/* update stack and frame-pointers */
|
||||
move.l %d0, %sp
|
||||
|
@ -139,7 +140,8 @@ _start:
|
|||
|
||||
/* initialize reserved area */
|
||||
move.l %d0, -(%sp)
|
||||
bsr board_init_f_init_reserve
|
||||
move.l #board_init_f_init_reserve, %a1
|
||||
jsr (%a1)
|
||||
|
||||
/* run low-level CPU init code (from flash) */
|
||||
jbsr cpu_init_f
|
||||
|
|
|
@ -68,13 +68,15 @@ SECTIONS
|
|||
__ex_table : { *(__ex_table) }
|
||||
__stop___ex_table = .;
|
||||
|
||||
. = ALIGN(256);
|
||||
. = ALIGN(4);
|
||||
__init_begin = .;
|
||||
.text.init : { *(.text.init) }
|
||||
.data.init : { *(.data.init) }
|
||||
. = ALIGN(256);
|
||||
. = ALIGN(4);
|
||||
__init_end = .;
|
||||
|
||||
_end = .;
|
||||
|
||||
__bss_start = .;
|
||||
.bss (NOLOAD) :
|
||||
{
|
||||
|
|
22
arch/m68k/dts/M5208EVBE.dts
Normal file
22
arch/m68k/dts/M5208EVBE.dts
Normal file
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5208.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5208EVBE";
|
||||
compatible = "fsl,M5208EVBE";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
25
arch/m68k/dts/M52277EVB.dts
Normal file
25
arch/m68k/dts/M52277EVB.dts
Normal file
|
@ -0,0 +1,25 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5227x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M52277EVB";
|
||||
compatible = "fsl,M52277EVB";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dspi0 {
|
||||
status = "okay";
|
||||
};
|
22
arch/m68k/dts/M52277EVB_stmicro.dts
Normal file
22
arch/m68k/dts/M52277EVB_stmicro.dts
Normal file
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5227x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M52277_stmicro";
|
||||
compatible = "fsl,M52277_stmicro";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
22
arch/m68k/dts/M5235EVB.dts
Normal file
22
arch/m68k/dts/M5235EVB.dts
Normal file
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf523x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5235EVB";
|
||||
compatible = "fsl,M5235EVB";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
22
arch/m68k/dts/M5235EVB_Flash32.dts
Normal file
22
arch/m68k/dts/M5235EVB_Flash32.dts
Normal file
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf523x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5235EVB_Flash32";
|
||||
compatible = "fsl,M5235EVB_Flash32";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
22
arch/m68k/dts/M5249EVB.dts
Normal file
22
arch/m68k/dts/M5249EVB.dts
Normal file
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5249.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5249EVB";
|
||||
compatible = "fsl,M5249EVB";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
22
arch/m68k/dts/M5253DEMO.dts
Normal file
22
arch/m68k/dts/M5253DEMO.dts
Normal file
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5253.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5253DEMO";
|
||||
compatible = "fsl,M5253DEMO";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
22
arch/m68k/dts/M5272C3.dts
Normal file
22
arch/m68k/dts/M5272C3.dts
Normal file
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5272.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5272C3";
|
||||
compatible = "fsl,M5272C3";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
22
arch/m68k/dts/M5275EVB.dts
Normal file
22
arch/m68k/dts/M5275EVB.dts
Normal file
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5275.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5275EVB";
|
||||
compatible = "fsl,M5275EVB";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
22
arch/m68k/dts/M5282EVB.dts
Normal file
22
arch/m68k/dts/M5282EVB.dts
Normal file
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5282.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5282EVB";
|
||||
compatible = "fsl,M5282EVB";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
22
arch/m68k/dts/M53017EVB.dts
Normal file
22
arch/m68k/dts/M53017EVB.dts
Normal file
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5301x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M53017EVB";
|
||||
compatible = "fsl,M53017EVB";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
22
arch/m68k/dts/M5329AFEE.dts
Normal file
22
arch/m68k/dts/M5329AFEE.dts
Normal file
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5329.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5329AFEE";
|
||||
compatible = "fsl,M5329AFEE";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
22
arch/m68k/dts/M5329BFEE.dts
Normal file
22
arch/m68k/dts/M5329BFEE.dts
Normal file
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5329.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5329BFEE";
|
||||
compatible = "fsl,M5329BFEE";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
22
arch/m68k/dts/M5373EVB.dts
Normal file
22
arch/m68k/dts/M5373EVB.dts
Normal file
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf537x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5373EVB";
|
||||
compatible = "fsl,M5373EVB";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
25
arch/m68k/dts/M54418TWR.dts
Normal file
25
arch/m68k/dts/M54418TWR.dts
Normal file
|
@ -0,0 +1,25 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5441x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M54418TWR";
|
||||
compatible = "fsl,M54418TWR";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dspi0 {
|
||||
status = "okay";
|
||||
};
|
25
arch/m68k/dts/M54418TWR_nand_mii.dts
Normal file
25
arch/m68k/dts/M54418TWR_nand_mii.dts
Normal file
|
@ -0,0 +1,25 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5441x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M54418TWR_nand_mii";
|
||||
compatible = "fsl,M54418TWR_nand_mii";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dspi0 {
|
||||
status = "okay";
|
||||
};
|
25
arch/m68k/dts/M54418TWR_nand_rmii.dts
Normal file
25
arch/m68k/dts/M54418TWR_nand_rmii.dts
Normal file
|
@ -0,0 +1,25 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5441x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M54418TWR_nand_rmii";
|
||||
compatible = "fsl,M54418TWR_nand_rmii";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dspi0 {
|
||||
status = "okay";
|
||||
};
|
25
arch/m68k/dts/M54418TWR_nand_rmii_lowfreq.dts
Normal file
25
arch/m68k/dts/M54418TWR_nand_rmii_lowfreq.dts
Normal file
|
@ -0,0 +1,25 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5441x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M54418TWR_nand_rmii_lowfreq";
|
||||
compatible = "fsl,M54418TWR_nand_rmii_lowfreq";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dspi0 {
|
||||
status = "okay";
|
||||
};
|
25
arch/m68k/dts/M54418TWR_serial_mii.dts
Normal file
25
arch/m68k/dts/M54418TWR_serial_mii.dts
Normal file
|
@ -0,0 +1,25 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5441x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M54418TWR_serial_mii";
|
||||
compatible = "fsl,M54418TWR_serial_mii";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dspi0 {
|
||||
status = "okay";
|
||||
};
|
25
arch/m68k/dts/M54418TWR_serial_rmii.dts
Normal file
25
arch/m68k/dts/M54418TWR_serial_rmii.dts
Normal file
|
@ -0,0 +1,25 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5441x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M54418TWR_serial_rmii";
|
||||
compatible = "fsl,M54418TWR_serial_rmii";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dspi0 {
|
||||
status = "okay";
|
||||
};
|
25
arch/m68k/dts/M54451EVB.dts
Normal file
25
arch/m68k/dts/M54451EVB.dts
Normal file
|
@ -0,0 +1,25 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5445x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M54451EVB";
|
||||
compatible = "fsl,M54451EVB";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dspi0 {
|
||||
status = "okay";
|
||||
};
|
25
arch/m68k/dts/M54451EVB_stmicro.dts
Normal file
25
arch/m68k/dts/M54451EVB_stmicro.dts
Normal file
|
@ -0,0 +1,25 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5445x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M54451EVB_stmicro";
|
||||
compatible = "fsl,M54451EVB";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dspi0 {
|
||||
status = "okay";
|
||||
};
|
25
arch/m68k/dts/M54455EVB.dts
Normal file
25
arch/m68k/dts/M54455EVB.dts
Normal file
|
@ -0,0 +1,25 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5445x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M54455EVB";
|
||||
compatible = "fsl,M54455EVB";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dspi0 {
|
||||
status = "okay";
|
||||
};
|
25
arch/m68k/dts/M54455EVB_a66.dts
Normal file
25
arch/m68k/dts/M54455EVB_a66.dts
Normal file
|
@ -0,0 +1,25 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5445x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M54455EVB_a66";
|
||||
compatible = "fsl,M54455EVB_a66";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dspi0 {
|
||||
status = "okay";
|
||||
};
|
25
arch/m68k/dts/M54455EVB_i66.dts
Normal file
25
arch/m68k/dts/M54455EVB_i66.dts
Normal file
|
@ -0,0 +1,25 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5445x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M54455EVB_i66";
|
||||
compatible = "fsl,M54455EVB_i66";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dspi0 {
|
||||
status = "okay";
|
||||
};
|
26
arch/m68k/dts/M54455EVB_intel.dts
Normal file
26
arch/m68k/dts/M54455EVB_intel.dts
Normal file
|
@ -0,0 +1,26 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5445x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M54455EVB_intel";
|
||||
compatible = "fsl,M5275EVB_intel";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dspi0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
25
arch/m68k/dts/M54455EVB_stm33.dts
Normal file
25
arch/m68k/dts/M54455EVB_stm33.dts
Normal file
|
@ -0,0 +1,25 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5445x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M54455EVB_stm33";
|
||||
compatible = "fsl,M5275EVB_stm33";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dspi0 {
|
||||
status = "okay";
|
||||
};
|
13
arch/m68k/dts/M5475AFE.dts
Normal file
13
arch/m68k/dts/M5475AFE.dts
Normal file
|
@ -0,0 +1,13 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf54xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5475AFE";
|
||||
compatible = "fsl,M5475AFE";
|
||||
};
|
||||
|
13
arch/m68k/dts/M5475BFE.dts
Normal file
13
arch/m68k/dts/M5475BFE.dts
Normal file
|
@ -0,0 +1,13 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf54xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5475BFE";
|
||||
compatible = "fsl,M5475BFE";
|
||||
};
|
||||
|
13
arch/m68k/dts/M5475CFE.dts
Normal file
13
arch/m68k/dts/M5475CFE.dts
Normal file
|
@ -0,0 +1,13 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf54xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5475CFE";
|
||||
compatible = "fsl,M5475CFE";
|
||||
};
|
||||
|
13
arch/m68k/dts/M5475DFE.dts
Normal file
13
arch/m68k/dts/M5475DFE.dts
Normal file
|
@ -0,0 +1,13 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf54xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5475DFE";
|
||||
compatible = "fsl,M5475DFE";
|
||||
};
|
||||
|
13
arch/m68k/dts/M5475EFE.dts
Normal file
13
arch/m68k/dts/M5475EFE.dts
Normal file
|
@ -0,0 +1,13 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf54xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5475EFE";
|
||||
compatible = "fsl,M5475EFE";
|
||||
};
|
||||
|
13
arch/m68k/dts/M5475FFE.dts
Normal file
13
arch/m68k/dts/M5475FFE.dts
Normal file
|
@ -0,0 +1,13 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf54xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5475FFE";
|
||||
compatible = "fsl,M5475FFE";
|
||||
};
|
||||
|
13
arch/m68k/dts/M5475GFE.dts
Normal file
13
arch/m68k/dts/M5475GFE.dts
Normal file
|
@ -0,0 +1,13 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf54xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5475GFE";
|
||||
compatible = "fsl,M5475GFE";
|
||||
};
|
||||
|
17
arch/m68k/dts/M5485AFE.dts
Normal file
17
arch/m68k/dts/M5485AFE.dts
Normal file
|
@ -0,0 +1,17 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf54xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5485AFE";
|
||||
compatible = "fsl,M5485AFE";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
17
arch/m68k/dts/M5485BFE.dts
Normal file
17
arch/m68k/dts/M5485BFE.dts
Normal file
|
@ -0,0 +1,17 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf54xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5485BFE";
|
||||
compatible = "fsl,M5485BFE";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
17
arch/m68k/dts/M5485CFE.dts
Normal file
17
arch/m68k/dts/M5485CFE.dts
Normal file
|
@ -0,0 +1,17 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf54xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5485CFE";
|
||||
compatible = "fsl,M5485CFE";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
17
arch/m68k/dts/M5485DFE.dts
Normal file
17
arch/m68k/dts/M5485DFE.dts
Normal file
|
@ -0,0 +1,17 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf54xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5485DFE";
|
||||
compatible = "fsl,M5485DFE";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
17
arch/m68k/dts/M5485EFE.dts
Normal file
17
arch/m68k/dts/M5485EFE.dts
Normal file
|
@ -0,0 +1,17 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf54xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5485EFE";
|
||||
compatible = "fsl,M5485EFE";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
17
arch/m68k/dts/M5485FFE.dts
Normal file
17
arch/m68k/dts/M5485FFE.dts
Normal file
|
@ -0,0 +1,17 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf54xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5485FFE";
|
||||
compatible = "fsl,M5485FFE";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
17
arch/m68k/dts/M5485GFE.dts
Normal file
17
arch/m68k/dts/M5485GFE.dts
Normal file
|
@ -0,0 +1,17 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf54xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5485GFE";
|
||||
compatible = "fsl,M5485GFE";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
17
arch/m68k/dts/M5485HFE.dts
Normal file
17
arch/m68k/dts/M5485HFE.dts
Normal file
|
@ -0,0 +1,17 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf54xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale M5485HFE";
|
||||
compatible = "fsl,M5485HFE";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
59
arch/m68k/dts/Makefile
Normal file
59
arch/m68k/dts/Makefile
Normal file
|
@ -0,0 +1,59 @@
|
|||
# SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
dtb-$(CONFIG_TARGET_M52277EVB) += M52277EVB.dtb \
|
||||
M52277EVB_stmicro.dtb
|
||||
dtb-$(CONFIG_TARGET_M5235EVB) += M5235EVB.dtb \
|
||||
M5235EVB_Flash32.dtb
|
||||
dtb-$(CONFIG_TARGET_COBRA5272) += cobra5272.dtb
|
||||
dtb-$(CONFIG_TARGET_EB_CPU5282) += eb_cpu5282.dtb \
|
||||
eb_cpu5282_internal.dtb
|
||||
dtb-$(CONFIG_TARGET_M5208EVBE) += M5208EVBE.dtb
|
||||
dtb-$(CONFIG_TARGET_M5249EVB) += M5249EVB.dtb
|
||||
dtb-$(CONFIG_TARGET_M5253DEMO) += M5253DEMO.dtb
|
||||
dtb-$(CONFIG_TARGET_M5272C3) += M5272C3.dtb
|
||||
dtb-$(CONFIG_TARGET_M5275EVB) += M5275EVB.dtb
|
||||
dtb-$(CONFIG_TARGET_M5282EVB) += M5282EVB.dtb
|
||||
dtb-$(CONFIG_TARGET_ASTRO_MCF5373L) += astro_mcf5373l.dtb
|
||||
dtb-$(CONFIG_TARGET_M53017EVB) += M53017EVB.dtb
|
||||
dtb-$(CONFIG_TARGET_M5329EVB) += M5329AFEE.dtb M5329BFEE.dtb
|
||||
dtb-$(CONFIG_TARGET_M5373EVB) += M5373EVB.dtb
|
||||
dtb-$(CONFIG_TARGET_M54418TWR) += M54418TWR.dtb \
|
||||
M54418TWR_nand_mii.dtb \
|
||||
M54418TWR_nand_rmii.dtb \
|
||||
M54418TWR_serial_mii.dtb \
|
||||
M54418TWR_serial_rmii.dtb \
|
||||
M54418TWR_nand_rmii_lowfreq.dtb
|
||||
dtb-$(CONFIG_TARGET_M54451EVB) += M54451EVB.dtb \
|
||||
M54451EVB_stmicro.dtb
|
||||
dtb-$(CONFIG_TARGET_M54455EVB) += M54455EVB.dtb \
|
||||
M54455EVB_intel.dtb \
|
||||
M54455EVB_stm33.dtb \
|
||||
M54455EVB_a66.dtb \
|
||||
M54455EVB_i66.dtb
|
||||
dtb-$(CONFIG_TARGET_AMCORE) += amcore.dtb
|
||||
dtb-$(CONFIG_TARGET_STMARK2) += stmark2.dtb
|
||||
dtb-$(CONFIG_TARGET_M5475EVB) += M5475AFE.dtb \
|
||||
M5475BFE.dtb \
|
||||
M5475CFE.dtb \
|
||||
M5475DFE.dtb \
|
||||
M5475EFE.dtb \
|
||||
M5475FFE.dtb \
|
||||
M5475GFE.dtb
|
||||
dtb-$(CONFIG_TARGET_M5485EVB) += M5485AFE.dtb \
|
||||
M5485BFE.dtb \
|
||||
M5485CFE.dtb \
|
||||
M5485DFE.dtb \
|
||||
M5485EFE.dtb \
|
||||
M5485FFE.dtb \
|
||||
M5485GFE.dtb \
|
||||
M5485HFE.dtb
|
||||
|
||||
targets += $(dtb-y)
|
||||
|
||||
DTC_FLAGS += -R 4 -p 0x1000
|
||||
|
||||
PHONY += dtbs
|
||||
dtbs: $(addprefix $(obj)/, $(dtb-y))
|
||||
@:
|
||||
|
||||
clean-files := *.dtb
|
22
arch/m68k/dts/amcore.dts
Normal file
22
arch/m68k/dts/amcore.dts
Normal file
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5307.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Sysam AMCORE";
|
||||
compatible = "sysam,AMCORE";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
22
arch/m68k/dts/astro_mcf5373l.dts
Normal file
22
arch/m68k/dts/astro_mcf5373l.dts
Normal file
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf537x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Astro mcf5373l";
|
||||
compatible = "astro,mcf5373l";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
22
arch/m68k/dts/cobra5272.dts
Normal file
22
arch/m68k/dts/cobra5272.dts
Normal file
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5272.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Cobra 5272";
|
||||
compatible = "cobra,M5272";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
22
arch/m68k/dts/eb_cpu5282.dts
Normal file
22
arch/m68k/dts/eb_cpu5282.dts
Normal file
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5282.dtsi"
|
||||
|
||||
/ {
|
||||
model = "BuS eb_cpuM5282";
|
||||
compatible = "bus,eb_cpuM5282";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
22
arch/m68k/dts/eb_cpu5282_internal.dts
Normal file
22
arch/m68k/dts/eb_cpu5282_internal.dts
Normal file
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5282.dtsi"
|
||||
|
||||
/ {
|
||||
model = "BuS eb_cpu5282_internals";
|
||||
compatible = "bus,eb_cpu5282_internals";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
36
arch/m68k/dts/mcf5208.dtsi
Normal file
36
arch/m68k/dts/mcf5208.dtsi
Normal file
|
@ -0,0 +1,36 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/ {
|
||||
compatible = "fsl,mcf5208";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
uart0: uart@fc060000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc060000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@fc064000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc064000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: uart@fc068000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc068000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
48
arch/m68k/dts/mcf5227x.dtsi
Normal file
48
arch/m68k/dts/mcf5227x.dtsi
Normal file
|
@ -0,0 +1,48 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/ {
|
||||
compatible = "fsl,mcf5227x";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
spi0 = &dspi0;
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
uart0: uart@fc060000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc060000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@fc064000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc064000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: uart@fc068000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc068000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dspi0: dspi@fc05c000 {
|
||||
compatible = "fsl,mcf-dspi";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0xfc05c000 0x100>;
|
||||
spi-max-frequency = <50000000>;
|
||||
num-cs = <4>;
|
||||
spi-mode = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
44
arch/m68k/dts/mcf523x.dtsi
Normal file
44
arch/m68k/dts/mcf523x.dtsi
Normal file
|
@ -0,0 +1,44 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/ {
|
||||
compatible = "fsl,mcf523x";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
ipsbar: ipsbar@4000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x00000000 0x40000000 0x40000000>;
|
||||
reg = <0x40000000 0x40000000>;
|
||||
|
||||
uart0: uart@200 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0x200 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@240 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0x240 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: uart@280 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0x280 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
38
arch/m68k/dts/mcf5249.dtsi
Normal file
38
arch/m68k/dts/mcf5249.dtsi
Normal file
|
@ -0,0 +1,38 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/ {
|
||||
compatible = "fsl,mcf5249";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
mbar: mbar@10000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x00000000 0x10000000 0x10000>;
|
||||
reg = <0x10000000 0x10000>;
|
||||
|
||||
uart0: uart@1c0 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0x1c0 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@200 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0x200 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
44
arch/m68k/dts/mcf5253.dtsi
Normal file
44
arch/m68k/dts/mcf5253.dtsi
Normal file
|
@ -0,0 +1,44 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/ {
|
||||
compatible = "fsl,mcf5253";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
mbar: mbar@10000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x00000000 0x10000000 0x10000>;
|
||||
reg = <0x10000000 0x10000>;
|
||||
|
||||
uart0: uart@1c0 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0x1c0 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@200 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0x200 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart3: uart@c00 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xc00 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
44
arch/m68k/dts/mcf5271.dtsi
Normal file
44
arch/m68k/dts/mcf5271.dtsi
Normal file
|
@ -0,0 +1,44 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/ {
|
||||
compatible = "fsl,mcf5271";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
ipsbar: ipsbar@4000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x00000000 0x40000000 0x40000000>;
|
||||
reg = <0x40000000 0x40000000>;
|
||||
|
||||
uart0: uart@200 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0x200 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@240 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0x240 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: uart@280 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0x280 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
38
arch/m68k/dts/mcf5272.dtsi
Normal file
38
arch/m68k/dts/mcf5272.dtsi
Normal file
|
@ -0,0 +1,38 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/ {
|
||||
compatible = "fsl,mcf5272";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
mbar: mbar@10000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x00000000 0x10000000 0x10000>;
|
||||
reg = <0x10000000 0x10000>;
|
||||
|
||||
uart0: uart@100 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0x100 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@140 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0x140 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
44
arch/m68k/dts/mcf5275.dtsi
Normal file
44
arch/m68k/dts/mcf5275.dtsi
Normal file
|
@ -0,0 +1,44 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/ {
|
||||
compatible = "fsl,mcf5275";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
ipsbar: ipsbar@4000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x00000000 0x40000000 0x40000000>;
|
||||
reg = <0x40000000 0x40000000>;
|
||||
|
||||
uart0: uart@200 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0x200 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@240 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0x240 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: uart@280 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0x280 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
44
arch/m68k/dts/mcf5282.dtsi
Normal file
44
arch/m68k/dts/mcf5282.dtsi
Normal file
|
@ -0,0 +1,44 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/ {
|
||||
compatible = "fsl,mcf5282";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
ipsbar: ipsbar@4000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x00000000 0x40000000 0x40000000>;
|
||||
reg = <0x40000000 0x40000000>;
|
||||
|
||||
uart0: uart@200 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0x200 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@240 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0x240 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: uart@280 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0x280 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
48
arch/m68k/dts/mcf5301x.dtsi
Normal file
48
arch/m68k/dts/mcf5301x.dtsi
Normal file
|
@ -0,0 +1,48 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/ {
|
||||
compatible = "fsl,mcf5301x";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
spi0 = &dspi0;
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
uart0: uart@fc060000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc060000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@fc064000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc064000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: uart@fc068000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc068000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dspi0: dspi@fc05c000 {
|
||||
compatible = "fsl,mcf-dspi";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0xfc05c000 0x100>;
|
||||
spi-max-frequency = <50000000>;
|
||||
num-cs = <4>;
|
||||
spi-mode = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
39
arch/m68k/dts/mcf5307.dtsi
Normal file
39
arch/m68k/dts/mcf5307.dtsi
Normal file
|
@ -0,0 +1,39 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/ {
|
||||
compatible = "fsl,mcf5307";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
/* MBAR */
|
||||
mbar: mbar@10000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x00000000 0x10000000 0x10000>;
|
||||
reg = <0x10000000 0x10000>;
|
||||
|
||||
uart0: uart@1c0 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0x1c0 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@200 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0x200 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
36
arch/m68k/dts/mcf5329.dtsi
Normal file
36
arch/m68k/dts/mcf5329.dtsi
Normal file
|
@ -0,0 +1,36 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/ {
|
||||
compatible = "fsl,mcf5329";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
uart0: uart@fc060000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc060000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@fc064000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc064000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: uart@fc068000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc068000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
36
arch/m68k/dts/mcf537x.dtsi
Normal file
36
arch/m68k/dts/mcf537x.dtsi
Normal file
|
@ -0,0 +1,36 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/ {
|
||||
compatible = "fsl,mcf5329";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
uart0: uart@fc060000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc060000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@fc064000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc064000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: uart@fc068000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc068000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
87
arch/m68k/dts/mcf5441x.dtsi
Normal file
87
arch/m68k/dts/mcf5441x.dtsi
Normal file
|
@ -0,0 +1,87 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/ {
|
||||
compatible = "fsl,mcf5441x";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
spi0 = &dspi0;
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
uart0: uart@fc060000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc060000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@fc064000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc064000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: uart@fc068000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc068000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart3: uart@fc06c000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc06c000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dspi0: dspi@fc05c000 {
|
||||
compatible = "fsl,mcf-dspi";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0xfc05c000 0x100>;
|
||||
spi-max-frequency = <50000000>;
|
||||
num-cs = <4>;
|
||||
spi-mode = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dspi1: dspi@fc03c000 {
|
||||
compatible = "fsl,mcf-dspi";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0xfc03c000 0x100>;
|
||||
spi-max-frequency = <50000000>;
|
||||
num-cs = <4>;
|
||||
spi-mode = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dspi2: dspi@ec038000 {
|
||||
compatible = "fsl,mcf-dspi";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0xec038000 0x100>;
|
||||
spi-max-frequency = <50000000>;
|
||||
num-cs = <4>;
|
||||
spi-mode = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dspi3: dspi@ec03c000 {
|
||||
compatible = "fsl,mcf-dspi";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0xec03c00 0x100>;
|
||||
spi-max-frequency = <50000000>;
|
||||
num-cs = <4>;
|
||||
spi-mode = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
48
arch/m68k/dts/mcf5445x.dtsi
Normal file
48
arch/m68k/dts/mcf5445x.dtsi
Normal file
|
@ -0,0 +1,48 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/ {
|
||||
compatible = "fsl,mcf5445x";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
spi0 = &dspi0;
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
uart0: uart@fc060000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc060000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@fc064000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc064000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: uart@fc068000 {
|
||||
compatible = "fsl,mcf-uart";
|
||||
reg = <0xfc068000 0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dspi0: dspi@fc05c000 {
|
||||
compatible = "fsl,mcf-dspi";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0xfc05c000 0x100>;
|
||||
spi-max-frequency = <50000000>;
|
||||
num-cs = <4>;
|
||||
spi-mode = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
40
arch/m68k/dts/mcf54xx.dtsi
Normal file
40
arch/m68k/dts/mcf54xx.dtsi
Normal file
|
@ -0,0 +1,40 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/ {
|
||||
compatible = "fsl,mcf54x5";
|
||||
|
||||
aliases {
|
||||
/* TO DO, clarify on serial, this SoC seems to have SPC and
|
||||
* no UARTS.
|
||||
*/
|
||||
spi0 = &dspi0;
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
mbar: mbar@80000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x00000000 0x80000000 0x10000>;
|
||||
reg = <0x80000000 0x10000>;
|
||||
|
||||
dspi0: dspi@8a00 {
|
||||
compatible = "fsl,mcf-dspi";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x8a00 0x100>;
|
||||
spi-max-frequency = <50000000>;
|
||||
num-cs = <4>;
|
||||
spi-mode = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
34
arch/m68k/dts/stmark2.dts
Normal file
34
arch/m68k/dts/stmark2.dts
Normal file
|
@ -0,0 +1,34 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mcf5441x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Sysam stmark2";
|
||||
compatible = "sysam,stmark2";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dspi0 {
|
||||
spi-mode = <3>;
|
||||
status = "okay";
|
||||
|
||||
flash: is25lp128@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spi-flash";
|
||||
spi-max-frequency = <60000000>;
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
|
@ -138,4 +138,8 @@ typedef struct dspi {
|
|||
/* Bit definitions and macros for DRFDR group */
|
||||
#define DSPI_RFDR_RXDATA(x) (((x)&0x0000FFFF))
|
||||
|
||||
/* Architecture-related operations */
|
||||
void dspi_chip_select(int cs);
|
||||
void dspi_chip_unselect(int cs);
|
||||
|
||||
#endif /* __DSPI_H__ */
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x0
|
||||
CONFIG_TARGET_M5208EVBE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5208EVBE"
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x0
|
||||
CONFIG_TARGET_M52277EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M52277EVB"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_SPANSION_BOOT"
|
||||
CONFIG_BOOTDELAY=3
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
|
@ -25,4 +26,5 @@ CONFIG_SYS_FLASH_CFI=y
|
|||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_CF_SPI=y
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x43E00000
|
||||
CONFIG_TARGET_M52277EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M52277EVB_stmicro"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT"
|
||||
CONFIG_BOOTDELAY=3
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
|
@ -26,4 +27,5 @@ CONFIG_SYS_FLASH_CFI=y
|
|||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_CF_SPI=y
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFFC00000
|
||||
CONFIG_TARGET_M5235EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5235EVB_Flash32"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="NORFLASH_PS32BIT"
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFFE00000
|
||||
CONFIG_TARGET_M5235EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5235EVB"
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFFE00000
|
||||
CONFIG_TARGET_M5249EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5249EVB"
|
||||
CONFIG_SYS_CONSOLE_INFO_QUIET=y
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFF800000
|
||||
CONFIG_TARGET_M5253DEMO=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5253DEMO"
|
||||
CONFIG_BOOTDELAY=5
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFFE00000
|
||||
CONFIG_TARGET_M5272C3=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5272C3"
|
||||
CONFIG_BOOTDELAY=5
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFFE00000
|
||||
CONFIG_TARGET_M5275EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5275EVB"
|
||||
CONFIG_BOOTDELAY=5
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFFE00000
|
||||
CONFIG_TARGET_M5282EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5282EVB"
|
||||
CONFIG_BOOTDELAY=5
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x0
|
||||
CONFIG_TARGET_M53017EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M53017EVB"
|
||||
CONFIG_BOOTDELAY=1
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="root=/dev/mtdblock3 rw rootfstype=jffs2"
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x0
|
||||
CONFIG_TARGET_M5329EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5329AFEE"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=0"
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x0
|
||||
CONFIG_TARGET_M5329EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5329BFEE"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16"
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x0
|
||||
CONFIG_TARGET_M5373EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5373EVB"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16"
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x47E00000
|
||||
CONFIG_TARGET_M54418TWR=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M54418TWR"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=50000000"
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200"
|
||||
|
@ -27,3 +28,4 @@ CONFIG_SPI_FLASH_ATMEL=y
|
|||
CONFIG_MII=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_CF_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x47E00000
|
||||
CONFIG_TARGET_M54418TWR=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_nand_mii"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,SYS_INPUT_CLKSRC=25000000"
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200"
|
||||
|
@ -23,4 +24,5 @@ CONFIG_SPI_FLASH=y
|
|||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_CF_SPI=y
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x47E00000
|
||||
CONFIG_TARGET_M54418TWR=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_nand_rmii"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,SYS_INPUT_CLKSRC=50000000"
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200"
|
||||
|
@ -23,4 +24,5 @@ CONFIG_SPI_FLASH=y
|
|||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_CF_SPI=y
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x47E00000
|
||||
CONFIG_TARGET_M54418TWR=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_nand_rmii_lowfreq"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,LOW_MCFCLK,SYS_INPUT_CLKSRC=50000000"
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200"
|
||||
|
@ -23,4 +24,5 @@ CONFIG_SPI_FLASH=y
|
|||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_CF_SPI=y
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x47E00000
|
||||
CONFIG_TARGET_M54418TWR=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_serial_mii"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=25000000"
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200"
|
||||
|
@ -26,4 +27,5 @@ CONFIG_SPI_FLASH=y
|
|||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_CF_SPI=y
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x47E00000
|
||||
CONFIG_TARGET_M54418TWR=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_serial_rmii"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=50000000"
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200"
|
||||
|
@ -26,4 +27,5 @@ CONFIG_SPI_FLASH=y
|
|||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_CF_SPI=y
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x0
|
||||
CONFIG_TARGET_M54451EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M54451EVB"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_INPUT_CLKSRC=24000000"
|
||||
CONFIG_BOOTDELAY=1
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
|
@ -30,4 +31,5 @@ CONFIG_SPI_FLASH=y
|
|||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_CF_SPI=y
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x47E00000
|
||||
CONFIG_TARGET_M54451EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M54451EVB_stmicro"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT,SYS_INPUT_CLKSRC=24000000"
|
||||
CONFIG_BOOTDELAY=1
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
|
@ -31,4 +32,5 @@ CONFIG_SPI_FLASH=y
|
|||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_CF_SPI=y
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4000000
|
||||
CONFIG_TARGET_M54455EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M54455EVB_a66"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_INPUT_CLKSRC=66666666"
|
||||
CONFIG_BOOTDELAY=1
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
|
@ -34,4 +35,5 @@ CONFIG_SPI_FLASH=y
|
|||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_CF_SPI=y
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Add table
Reference in a new issue