mirror of
https://github.com/AsahiLinux/u-boot
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nand_spl: remove MPC8572DS_NAND support
Commit 3d5a335c announced that all the nand_spl boards
would be removed before v2014.07 release.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
This commit is contained in:
Masahiro Yamada
Tom Rini
parent
26bf6d77a6
commit
5dc0d60df7
4 changed files with 0 additions and 189 deletions
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@ -794,7 +794,6 @@ Active powerpc mpc85xx - freescale mpc8569mds
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Active powerpc mpc85xx - freescale mpc8569mds MPC8569MDS_NAND MPC8569MDS:NAND -
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Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS - York Sun <yorksun@freescale.com>
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Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS_36BIT MPC8572DS:36BIT York Sun <yorksun@freescale.com>
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Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS_NAND MPC8572DS:NAND -
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Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_NAND P1010RDB:P1010RDB_PA,36BIT,NAND -
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Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_NAND_SECBOOT P1010RDB:P1010RDB_PA,36BIT,NAND_SECBOOT,SECURE_BOOT -
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Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_NOR P1010RDB:P1010RDB_PA,36BIT -
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@ -20,18 +20,6 @@
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#define CONFIG_PHYS_64BIT
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#endif
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#ifdef CONFIG_NAND
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#define CONFIG_NAND_U_BOOT
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#define CONFIG_RAMBOOT_NAND
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#ifdef CONFIG_NAND_SPL
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#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
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#else
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#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds
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#define CONFIG_SYS_TEXT_BASE 0xf8f82000
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#endif /* CONFIG_NAND_SPL */
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#endif
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#ifndef CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_TEXT_BASE 0xeff40000
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#endif
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@ -208,12 +196,7 @@
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#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
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#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
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#if defined(CONFIG_RAMBOOT_NAND)
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#define CONFIG_SYS_RAMBOOT
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#define CONFIG_SYS_EXTRA_ENV_RELOC
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#else
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#undef CONFIG_SYS_RAMBOOT
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#endif
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_FLASH_CFI
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@ -353,17 +336,10 @@
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| OR_FCM_TRLX \
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| OR_FCM_EHTR)
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#ifdef CONFIG_RAMBOOT_NAND
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#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
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#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
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#define CONFIG_SYS_BR2_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */
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#define CONFIG_SYS_OR2_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */
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#else
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#define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */
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#define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */
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#define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
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#define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
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#endif
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#define CONFIG_SYS_BR4_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS + 0x40000) \
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| (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
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| BR_PS_8 /* Port Size = 8 bit */ \
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@ -600,12 +576,6 @@
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*/
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#if defined(CONFIG_SYS_RAMBOOT)
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#if defined(CONFIG_RAMBOOT_NAND)
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#define CONFIG_ENV_IS_IN_NAND 1
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#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
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#define CONFIG_ENV_OFFSET ((512 * 1024)\
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+ CONFIG_SYS_NAND_BLOCK_SIZE)
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#endif
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#else
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#define CONFIG_ENV_IS_IN_FLASH 1
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@ -1,91 +0,0 @@
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#
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# (C) Copyright 2007
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# Stefan Roese, DENX Software Engineering, sr@denx.de.
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#
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# Copyright 2009-2011 Freescale Semiconductor, Inc.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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CONFIG_SYS_TEXT_BASE_SPL := 0xfff00000
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PAD_TO := 0xfff01000
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nandobj := $(objtree)/nand_spl/
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LDSCRIPT= $(srctree)/$(CPUDIR)/u-boot-nand_spl.lds
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LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \
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$(LDFLAGS) $(LDFLAGS_FINAL)
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asflags-y += -DCONFIG_NAND_SPL
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ccflags-y += -DCONFIG_NAND_SPL
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SOBJS = start.o resetvec.o
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COBJS = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
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nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
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OBJS := $(addprefix $(obj)/,$(SOBJS) $(COBJS))
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__OBJS := $(SOBJS) $(COBJS)
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LNDIR := $(nandobj)board/$(BOARDDIR)
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targets += $(__OBJS)
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all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
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$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
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$(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
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$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
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$(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
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$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds
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cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
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-Map $(nandobj)u-boot-spl.map -o $@
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$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT)
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$(CPP) $(cpp_flags) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \
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-ansi -D__ASSEMBLY__ -P - <$< >$@
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# create symbolic links for common files
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$(obj)/cache.c:
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@rm -f $@
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ln -sf $(srctree)/arch/powerpc/lib/cache.c $@
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$(obj)/cpu_init_early.c:
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@rm -f $@
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ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $@
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$(obj)/spl_minimal.c:
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@rm -f $@
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ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/spl_minimal.c $@
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$(obj)/fsl_law.c:
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@rm -f $@
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ln -sf $(srctree)/arch/powerpc/cpu/mpc8xxx/law.c $@
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$(obj)/law.c:
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@rm -f $@
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ln -sf $(srctree)/board/$(BOARDDIR)/law.c $@
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$(obj)/nand_boot_fsl_elbc.c:
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@rm -f $@
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ln -sf $(srctree)/nand_spl/nand_boot_fsl_elbc.c $@
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$(obj)/ns16550.c:
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@rm -f $@
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ln -sf $(srctree)/drivers/serial/ns16550.c $@
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$(obj)/resetvec.S:
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@rm -f $@
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ln -s $(srctree)/$(CPUDIR)/resetvec.S $@
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$(obj)/start.S:
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@rm -f $@
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ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/start.S $@
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$(obj)/tlb.c:
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@rm -f $@
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ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/tlb.c $@
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$(obj)/tlb_table.c:
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@rm -f $@
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ln -sf $(srctree)/board/$(BOARDDIR)/tlb.c $@
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@ -1,67 +0,0 @@
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/*
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* Copyright 2009-2010 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <ns16550.h>
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#include <asm/io.h>
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#include <nand.h>
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u32 sysclk_tbl[] = {
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33333000, 39999600, 49999500, 66666000,
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83332500, 99999000, 133332000, 166665000
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};
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void board_init_f(ulong bootflag)
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{
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int px_spd;
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u32 plat_ratio, bus_clk, sys_clk;
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ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
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#if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM)
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/* for FPGA */
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set_lbc_br(3, CONFIG_SYS_BR3_PRELIM);
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set_lbc_or(3, CONFIG_SYS_OR3_PRELIM);
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#else
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#error CONFIG_SYS_BR3_PRELIM, CONFIG_SYS_OR3_PRELIM must be defined
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#endif
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/* initialize selected port with appropriate baud rate */
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px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD));
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sys_clk = sysclk_tbl[px_spd & PIXIS_SPD_SYSCLK_MASK];
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plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
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bus_clk = sys_clk * plat_ratio / 2;
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NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
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bus_clk / 16 / CONFIG_BAUDRATE);
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puts("\nNAND boot... ");
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/* copy code to RAM and jump to it - this should not return */
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/* NOTE - code has to be copied out of NAND buffer before
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* other blocks can be read.
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*/
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relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0,
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CONFIG_SYS_NAND_U_BOOT_RELOC);
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}
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void board_init_r(gd_t *gd, ulong dest_addr)
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{
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nand_boot();
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}
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void putc(char c)
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{
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if (c == '\n')
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NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r');
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NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c);
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}
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void puts(const char *str)
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{
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while (*str)
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putc(*str++);
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}
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