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Merge branch 'riscv-fixes' of https://source.denx.de/u-boot/custodians/u-boot-riscv

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This commit is contained in:
Tom Rini 2023-06-27 09:39:58 -04:00
commit 580eb31199
3 changed files with 2 additions and 5 deletions
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4
arch/riscv/cpu/u-boot.lds
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@ -48,7 +48,7 @@ SECTIONS
KEEP(*(SORT(__u_boot_list*)));
}
. = ALIGN(4);
. = ALIGN(8);
.efi_runtime_rel : {
__efi_runtime_rel_start = .;
@ -57,8 +57,6 @@ SECTIONS
__efi_runtime_rel_stop = .;
}
. = ALIGN(8);
/DISCARD/ : { *(.rela.plt*) }
.rela.dyn : {
__rel_dyn_start = .;

1
board/sifive/unmatched/MAINTAINERS
View file

@ -1,6 +1,5 @@
SiFive HiFive Unmatched FU740 BOARD
M: Paul Walmsley <paul.walmsley@sifive.com>
M: Pragnesh Patel <pragnesh.patel@sifive.com>
M: Green Wan <green.wan@sifive.com>
S: Maintained
F: board/sifive/unmatched/

2
board/starfive/visionfive2/MAINTAINERS
View file

@ -1,5 +1,5 @@
STARFIVE JH7110 VISIONFIVE2 BOARD
M: startfive
M: Yanhong Wang <yanhong.wang@starfivetech.com>
S: Maintained
F: arch/riscv/include/asm/arch-jh7110/
F: board/starfive/visionfive2/