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https://github.com/AsahiLinux/u-boot
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arm: Remove edminiv2 board
This board is not converted to use CONFIG_DM, well passed the migration deadline. Remove it. Cc: Simon Guinot <simon.guinot@sequanux.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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7 changed files with 0 additions and 304 deletions
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@ -6,21 +6,8 @@ config 88F5182
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config FEROCEON
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bool
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choice
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prompt "Marvell Orion board select"
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optional
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config TARGET_EDMINIV2
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bool "LaCie Ethernet Disk mini V2"
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select 88F5182
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select FEROCEON
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select SUPPORT_SPL
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endchoice
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config SYS_SOC
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default "orion5x"
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source "board/LaCie/edminiv2/Kconfig"
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endif
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@ -1,12 +0,0 @@
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if TARGET_EDMINIV2
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config SYS_BOARD
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default "edminiv2"
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config SYS_VENDOR
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default "LaCie"
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config SYS_CONFIG_NAME
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default "edminiv2"
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endif
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@ -1,6 +0,0 @@
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EDMINIV2 BOARD
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M: Simon Guinot <simon.guinot@sequanux.org>
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S: Maintained
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F: board/LaCie/edminiv2/
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F: include/configs/edminiv2.h
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F: configs/edminiv2_defconfig
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@ -1,10 +0,0 @@
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# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
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#
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# Based on original Kirkwood support which is
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# (C) Copyright 2009
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# Marvell Semiconductor <www.marvell.com>
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# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
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obj-y := edminiv2.o ../common/common.o
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@ -1,57 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
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*
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* (C) Copyright 2009
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* Marvell Semiconductor <www.marvell.com>
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* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
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*/
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#include <common.h>
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#include <miiphy.h>
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#include <net.h>
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#include <asm/arch/orion5x.h>
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#include <asm/global_data.h>
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#include "../common/common.h"
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#include <spl.h>
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#include <ns16550.h>
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#include <asm/mach-types.h>
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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/* arch number of board */
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gd->bd->bi_arch_number = MACH_TYPE_EDMINI_V2;
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/* boot parameter start at 256th byte of RAM base */
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gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
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return 0;
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}
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#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
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/* Configure and enable MV88E1116 PHY */
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void reset_phy(void)
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{
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mv_phy_88e1116_init("egiga0", 8);
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}
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#endif /* CONFIG_RESET_PHY_R */
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/*
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* SPL serial setup and NOR boot device selection
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*/
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#ifdef CONFIG_SPL_BUILD
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void spl_board_init(void)
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{
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preloader_console_init();
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}
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u32 spl_boot_device(void)
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{
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return BOOT_DEVICE_NOR;
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}
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#endif /* CONFIG_SPL_BUILD */
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@ -1,72 +0,0 @@
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CONFIG_ARM=y
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CONFIG_ARCH_CPU_INIT=y
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CONFIG_ARCH_ORION5X=y
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CONFIG_SYS_TEXT_BASE=0x00800000
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CONFIG_SYS_MALLOC_LEN=0x40000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SPL_LDSCRIPT="arch/arm/mach-orion5x/u-boot-spl.lds"
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CONFIG_ENV_SIZE=0x2000
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CONFIG_ENV_SECT_SIZE=0x2000
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CONFIG_SPL_TEXT_BASE=0xffff0000
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CONFIG_TARGET_EDMINIV2=y
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CONFIG_SPL_SERIAL=y
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CONFIG_SPL=y
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CONFIG_IDENT_STRING=" EDMiniV2"
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CONFIG_SYS_LOAD_ADDR=0x800000
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CONFIG_ENV_ADDR=0xFFF84000
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CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xf40
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CONFIG_BOOTDELAY=3
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_ARCH_MISC_INIT=y
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CONFIG_RESET_PHY_R=y
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CONFIG_SPL_MAX_SIZE=0xfff0
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CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
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CONFIG_SPL_BSS_START_ADDR=0x20000
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CONFIG_SPL_BSS_MAX_SIZE=0x1ffff
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CONFIG_SPL_BOARD_INIT=y
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# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
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CONFIG_SPL_STACK=0x20000
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CONFIG_SYS_SPL_MALLOC=y
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CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
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CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x40000
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CONFIG_SYS_SPL_MALLOC_SIZE=0x1ffff
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CONFIG_SPL_NOR_SUPPORT=y
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CONFIG_HUSH_PARSER=y
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# CONFIG_AUTO_COMPLETE is not set
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CONFIG_SYS_PROMPT="EDMiniV2> "
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CONFIG_SYS_PBSIZE=1051
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CONFIG_CMD_IMLS=y
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CONFIG_CMD_IDE=y
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CONFIG_CMD_I2C=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_EXT2=y
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CONFIG_ISO_PARTITION=y
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CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_IS_IN_FLASH=y
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CONFIG_NETCONSOLE=y
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CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
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CONFIG_SYS_IDE_MAXBUS=1
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CONFIG_SYS_IDE_MAXDEVICE=1
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CONFIG_SYS_ATA_BASE_ADDR=0xf1080000
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CONFIG_SYS_ATA_STRIDE=4
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CONFIG_SYS_ATA_DATA_OFFSET=0x100
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CONFIG_SYS_ATA_REG_OFFSET=0x100
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CONFIG_SYS_ATA_ALT_OFFSET=0x100
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CONFIG_SYS_ATA_IDE0_OFFSET=0x4000
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CONFIG_LBA48=y
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CONFIG_SYS_I2C_LEGACY=y
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CONFIG_SPL_SYS_I2C_LEGACY=y
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CONFIG_SYS_I2C_MVTWSI=y
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CONFIG_SYS_I2C_SLAVE=0x0
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# CONFIG_MMC is not set
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_SYS_MAX_FLASH_SECT=11
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CONFIG_MVGBE=y
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CONFIG_MII=y
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CONFIG_SYS_NS16550=y
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CONFIG_USB=y
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@ -1,134 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
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*
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* Based on original Kirkwood support which is
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* (C) Copyright 2009
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* Marvell Semiconductor <www.marvell.com>
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* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
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*/
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#ifndef _CONFIG_EDMINIV2_H
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#define _CONFIG_EDMINIV2_H
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/*
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* SPL
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*/
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#define CONFIG_SYS_UBOOT_BASE 0xfff90000
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#define CONFIG_SYS_UBOOT_START 0x00800000
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/*
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* High Level Configuration Options (easy to change)
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*/
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#include <asm/arch/orion5x.h>
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/*
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* CLKs configurations
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*/
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/*
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* Board-specific values for Orion5x MPP low level init:
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* - MPPs 12 to 15 are SATA LEDs (mode 5)
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* - Others are GPIO/unused (mode 3 for MPP0, mode 5 for
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* MPP16 to MPP19, mode 0 for others
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*/
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#define ORION5X_MPP0_7 0x00000003
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#define ORION5X_MPP8_15 0x55550000
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#define ORION5X_MPP16_23 0x00005555
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/*
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* Board-specific values for Orion5x GPIO low level init:
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* - GPIO3 is input (RTC interrupt)
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* - GPIO16 is Power LED control (0 = on, 1 = off)
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* - GPIO17 is Power LED source select (0 = CPLD, 1 = GPIO16)
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* - GPIO18 is Power Button status (0 = Released, 1 = Pressed)
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* - GPIO19 is SATA disk power toggle (toggles on 0-to-1)
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* - GPIO22 is SATA disk power status ()
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* - GPIO23 is supply status for SATA disk ()
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* - GPIO24 is supply control for board (write 1 to power off)
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* Last GPIO is 25, further bits are supposed to be 0.
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* Enable mask has ones for INPUT, 0 for OUTPUT.
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* Default is LED ON, board ON :)
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*/
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#define ORION5X_GPIO_OUT_ENABLE 0xfef4f0ca
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#define ORION5X_GPIO_OUT_VALUE 0x00000000
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#define ORION5X_GPIO_IN_POLARITY 0x000000d0
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/*
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* NS16550 Configuration
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*/
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
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#define CONFIG_SYS_NS16550_COM1 ORION5X_UART0_BASE
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/*
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* Serial Port configuration
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* The following definitions let you select what serial you want to use
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* for your console driver.
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*/
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#define CONFIG_SYS_BAUDRATE_TABLE \
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{ 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 }
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/*
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* FLASH configuration
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*/
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#define CONFIG_SYS_FLASH_BASE 0xfff80000
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/* auto boot */
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/*
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* Network
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*/
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#ifdef CONFIG_CMD_NET
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#define CONFIG_MVGBE_PORTS {1} /* enable port 0 only */
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#define CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION /* don't randomize MAC */
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#define CONFIG_PHY_BASE_ADR 0x8
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#endif
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/*
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* IDE
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*/
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#ifdef CONFIG_IDE
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#define __io
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/* Data, registers and alternate blocks are at the same offset */
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/* Each 8-bit ATA register is aligned to a 4-bytes address */
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/* A single bus, a single device */
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/* ATA registers base is at SATA controller base */
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/* ATA bus 0 is orion5x port 1 on ED Mini V2 */
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/* end of IDE defines */
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#endif /* CMD_IDE */
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/*
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* Common USB/EHCI configuration
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*/
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#ifdef CONFIG_CMD_USB
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#define ORION5X_USB20_HOST_PORT_BASE ORION5X_USB20_PORT0_BASE
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#endif /* CONFIG_CMD_USB */
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/*
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* I2C related stuff
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*/
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#ifdef CONFIG_CMD_I2C
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#define CONFIG_I2C_MVTWSI_BASE0 ORION5X_TWSI_BASE
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#endif
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/*
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* Environment variables configurations
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*/
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/* Enable command line editing */
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/* provide extensive help */
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/* additions for new relocation code, must be added to all boards */
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#define CONFIG_SYS_SDRAM_BASE 0
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#endif /* _CONFIG_EDMINIV2_H */
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