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- Fixes on STM32 I2C drivers
- Activate SCMI regulator for STM32MP15 defconfig, fix the usb start command for scmi device tree -----BEGIN PGP SIGNATURE----- iQEyBAABCgAdFiEE56Yx6b9SnloYCWtD4rK92eCqk3UFAmMjPigACgkQ4rK92eCq k3XvhAf4nV4kTsQ9pORh+vBdWPU0A3xUGmLQny9Sqt8zPa8pFqYRqbJ7PQgPk4mu reKeTTgNDfQgAk74py/gIa65iAIEKmcDcGT0Csoy6HiHuJcBUYz526GkX3b1hYmq zOS7Kz+itHmNwB3Lb97h2OgiS+qM2rfzTiucpG8XRnthfYb2dJ9ZkTkJ7Dr/w3CG 8ayNitrNR6fycnUOhVG60eLvvbA8C6ztAoen9jU70zxl0waV0qaKXj+mpW1WM8bH 7szLRF8F7UEbFSZkO7umSvwbOQosm2MX0mwyVqXohbIM//WiSMKPuqtxU+xNQ3Iy MjqXrnY5YAgo1yocurKGTs2NhzoV =fYNP -----END PGP SIGNATURE----- Merge tag 'u-boot-stm32-20220915' of https://source.denx.de/u-boot/custodians/u-boot-stm - Fixes on STM32 I2C drivers - Activate SCMI regulator for STM32MP15 defconfig, fix the usb start command for scmi device tree
This commit is contained in:
commit
4f2c559b9a
2 changed files with 17 additions and 17 deletions
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@ -120,6 +120,7 @@ CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_DM_REGULATOR_STM32_VREFBUF=y
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CONFIG_DM_REGULATOR_STPMIC1=y
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CONFIG_DM_REGULATOR_SCMI=y
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CONFIG_REMOTEPROC_STM32_COPRO=y
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CONFIG_RESET_SCMI=y
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CONFIG_DM_RNG=y
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@ -57,7 +57,6 @@ struct stm32_i2c_regs {
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#define STM32_I2C_CR1_PE BIT(0)
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/* STM32 I2C control 2 */
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#define STM32_I2C_CR2_AUTOEND BIT(25)
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#define STM32_I2C_CR2_RELOAD BIT(24)
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#define STM32_I2C_CR2_NBYTES_MASK GENMASK(23, 16)
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#define STM32_I2C_CR2_NBYTES(n) ((n & 0xff) << 16)
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@ -283,7 +282,7 @@ static int stm32_i2c_check_device_busy(struct stm32_i2c_priv *i2c_priv)
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}
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static void stm32_i2c_message_start(struct stm32_i2c_priv *i2c_priv,
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struct i2c_msg *msg, bool stop)
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struct i2c_msg *msg)
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{
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struct stm32_i2c_regs *regs = i2c_priv->regs;
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u32 cr2 = readl(®s->cr2);
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@ -304,9 +303,8 @@ static void stm32_i2c_message_start(struct stm32_i2c_priv *i2c_priv,
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cr2 |= STM32_I2C_CR2_SADD7(msg->addr);
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}
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/* Set nb bytes to transfer and reload or autoend bits */
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cr2 &= ~(STM32_I2C_CR2_NBYTES_MASK | STM32_I2C_CR2_RELOAD |
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STM32_I2C_CR2_AUTOEND);
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/* Set nb bytes to transfer and reload (if needed) */
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cr2 &= ~(STM32_I2C_CR2_NBYTES_MASK | STM32_I2C_CR2_RELOAD);
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if (msg->len > STM32_I2C_MAX_LEN) {
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cr2 |= STM32_I2C_CR2_NBYTES(STM32_I2C_MAX_LEN);
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cr2 |= STM32_I2C_CR2_RELOAD;
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@ -327,7 +325,7 @@ static void stm32_i2c_message_start(struct stm32_i2c_priv *i2c_priv,
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*/
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static void stm32_i2c_handle_reload(struct stm32_i2c_priv *i2c_priv,
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struct i2c_msg *msg, bool stop)
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struct i2c_msg *msg)
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{
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struct stm32_i2c_regs *regs = i2c_priv->regs;
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u32 cr2 = readl(®s->cr2);
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@ -413,7 +411,7 @@ static int stm32_i2c_check_end_of_message(struct stm32_i2c_priv *i2c_priv)
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setbits_le32(®s->icr, STM32_I2C_ICR_STOPCF);
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/* Clear control register 2 */
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setbits_le32(®s->cr2, STM32_I2C_CR2_RESET_MASK);
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clrbits_le32(®s->cr2, STM32_I2C_CR2_RESET_MASK);
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}
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return ret;
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@ -433,7 +431,7 @@ static int stm32_i2c_message_xfer(struct stm32_i2c_priv *i2c_priv,
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/* Add errors */
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mask |= STM32_I2C_ISR_ERRORS;
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stm32_i2c_message_start(i2c_priv, msg, stop);
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stm32_i2c_message_start(i2c_priv, msg);
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while (msg->len) {
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/*
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@ -471,7 +469,7 @@ static int stm32_i2c_message_xfer(struct stm32_i2c_priv *i2c_priv,
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mask = msg->flags & I2C_M_RD ? STM32_I2C_ISR_RXNE :
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STM32_I2C_ISR_TXIS | STM32_I2C_ISR_NACKF;
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stm32_i2c_handle_reload(i2c_priv, msg, stop);
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stm32_i2c_handle_reload(i2c_priv, msg);
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} else if (!bytes_to_rw) {
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/* Wait until TC flag is set */
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mask = STM32_I2C_ISR_TC;
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@ -485,9 +483,9 @@ static int stm32_i2c_message_xfer(struct stm32_i2c_priv *i2c_priv,
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}
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}
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/* End of transfer, send stop condition */
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mask = STM32_I2C_CR2_STOP;
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setbits_le32(®s->cr2, mask);
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/* End of transfer, send stop condition if appropriate */
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if (!ret && !(status & (STM32_I2C_ISR_NACKF | STM32_I2C_ISR_ERRORS)))
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setbits_le32(®s->cr2, STM32_I2C_CR2_STOP);
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return stm32_i2c_check_end_of_message(i2c_priv);
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}
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@ -916,18 +914,19 @@ static int stm32_of_to_plat(struct udevice *dev)
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{
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const struct stm32_i2c_data *data;
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struct stm32_i2c_priv *i2c_priv = dev_get_priv(dev);
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u32 rise_time, fall_time;
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int ret;
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data = (const struct stm32_i2c_data *)dev_get_driver_data(dev);
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if (!data)
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return -EINVAL;
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rise_time = dev_read_u32_default(dev, "i2c-scl-rising-time-ns",
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STM32_I2C_RISE_TIME_DEFAULT);
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i2c_priv->setup.rise_time = dev_read_u32_default(dev,
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"i2c-scl-rising-time-ns",
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STM32_I2C_RISE_TIME_DEFAULT);
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fall_time = dev_read_u32_default(dev, "i2c-scl-falling-time-ns",
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STM32_I2C_FALL_TIME_DEFAULT);
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i2c_priv->setup.fall_time = dev_read_u32_default(dev,
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"i2c-scl-falling-time-ns",
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STM32_I2C_FALL_TIME_DEFAULT);
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i2c_priv->dnf_dt = dev_read_u32_default(dev, "i2c-digital-filter-width-ns", 0);
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if (!dev_read_bool(dev, "i2c-digital-filter"))
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