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ARM: at91: spl: Adjust switching to oscillator for SAMA5D2

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As said in 29.5.7 section of SAMA5D2 datasheet, before switching to
the crystal oscillator, a check must be carried out to ensure that
the oscillator is present and that its freqency is valid.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Wenyou Yang 2017-09-13 14:58:48 +08:00 committed by Tom Rini
parent 82e0646af7
commit 3ceb5118c6
2 changed files with 19 additions and 1 deletions
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2
arch/arm/mach-at91/include/mach/at91_pmc.h
View file

@ -87,6 +87,8 @@ typedef struct at91_pmc {
#define AT91_PMC_MCFR_MAINRDY 0x00010000 #define AT91_PMC_MCFR_MAINRDY 0x00010000
#define AT91_PMC_MCFR_MAINF_MASK 0x0000FFFF #define AT91_PMC_MCFR_MAINF_MASK 0x0000FFFF
#define AT91_PMC_MCFR_RCMEAS 0x00100000
#define AT91_PMC_MCFR_CCSS_XTAL_OSC 0x01000000
#define AT91_PMC_MCKR_CSS_SLOW 0x00000000 #define AT91_PMC_MCKR_CSS_SLOW 0x00000000
#define AT91_PMC_MCKR_CSS_MAIN 0x00000001 #define AT91_PMC_MCKR_CSS_MAIN 0x00000001

18
arch/arm/mach-at91/spl_atmel.c
View file

@ -32,6 +32,20 @@ static void switch_to_main_crystal_osc(void)
while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS)) while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS))
; ;
#if defined(CONFIG_SAMA5D2)
/* Enable a measurement of the external oscillator */
tmp = readl(&pmc->mcfr);
tmp |= AT91_PMC_MCFR_CCSS_XTAL_OSC;
tmp |= AT91_PMC_MCFR_RCMEAS;
writel(tmp, &pmc->mcfr);
while (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINRDY))
;
if (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINF_MASK))
hang();
#endif
tmp = readl(&pmc->mor); tmp = readl(&pmc->mor);
tmp &= ~AT91_PMC_MOR_OSCBYPASS; tmp &= ~AT91_PMC_MOR_OSCBYPASS;
tmp &= ~AT91_PMC_MOR_KEY(0xff); tmp &= ~AT91_PMC_MOR_KEY(0xff);
@ -47,11 +61,13 @@ static void switch_to_main_crystal_osc(void)
while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCSELS)) while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCSELS))
; ;
#if !defined(CONFIG_SAMA5D2)
/* Wait until MAINRDY field is set to make sure main clock is stable */ /* Wait until MAINRDY field is set to make sure main clock is stable */
while (!(readl(&pmc->mcfr) & AT91_PMC_MAINRDY)) while (!(readl(&pmc->mcfr) & AT91_PMC_MAINRDY))
; ;
#endif
#ifndef CONFIG_SAMA5D4 #if !defined(CONFIG_SAMA5D4) && !defined(CONFIG_SAMA5D2)
tmp = readl(&pmc->mor); tmp = readl(&pmc->mor);
tmp &= ~AT91_PMC_MOR_MOSCRCEN; tmp &= ~AT91_PMC_MOR_MOSCRCEN;
tmp &= ~AT91_PMC_MOR_KEY(0xff); tmp &= ~AT91_PMC_MOR_KEY(0xff);