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Convert CONFIG_SYS_DV_CLKMODE et al to Kconfig

Browse source 
This converts the following to Kconfig:
   CONFIG_SYS_DV_CLKMODE
   CONFIG_SYS_DA850_PLL0_POSTDIV
   CONFIG_SYS_DA850_PLL0_PLLDIV1
   CONFIG_SYS_DA850_PLL0_PLLDIV2
   CONFIG_SYS_DA850_PLL0_PLLDIV3
   CONFIG_SYS_DA850_PLL0_PLLDIV4
   CONFIG_SYS_DA850_PLL0_PLLDIV5
   CONFIG_SYS_DA850_PLL0_PLLDIV6
   CONFIG_SYS_DA850_PLL0_PLLDIV7
   CONFIG_SYS_DA850_PLL1_POSTDIV
   CONFIG_SYS_DA850_PLL1_PLLDIV1
   CONFIG_SYS_DA850_PLL1_PLLDIV2
   CONFIG_SYS_DA850_PLL1_PLLDIV3

Signed-off-by: Adam Ford <aford173@gmail.com>
This commit is contained in:
Adam Ford 2018-01-23 04:04:28 -06:00 • committed by Tom Rini
parent 405fc8305b
commit 76e22222d3
8 changed files with 85 additions and 84 deletions
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85
arch/arm/mach-davinci/Kconfig
View file

@ -24,7 +24,7 @@ config TARGET_EA20
config TARGET_OMAPL138_LCDK
bool "OMAPL138 LCDK"
select SOC_DA8XX
select SOC_DA850
select SUPPORT_SPL
config TARGET_CALIMAIN
@ -63,6 +63,89 @@ config SOC_DA8XX
config MACH_DAVINCI_DA850_EVM
bool
if SYS_DA850_PLL_INIT
comment "DA850 PLL Initialization Parameters"
config SYS_DV_CLKMODE
int "PLLCTL Clock Mode"
default 0 if SOC_DA850
help
Set PLLCTL Clock Mode bit as External Clock or On Chip oscillator
config SYS_DA850_PLL0_POSTDIV
int "PLLC0 PLL Post-Divider"
default 1 if SOC_DA850
help
Value written to PLLC0 PLL Post-Divider Control Register
config SYS_DA850_PLL0_PLLDIV1
hex "PLLC0 Divider 1"
default 0x8000 if SOC_DA850
help
Value written to PLLC0 Divider 1 register
config SYS_DA850_PLL0_PLLDIV2
hex "PLLC0 Divider 2"
default 0x8001 if SOC_DA850
help
Value written to PLLC0 Divider 2 register
config SYS_DA850_PLL0_PLLDIV3
hex "PLLC0 Divider 3"
default 0x8002 if SOC_DA850
help
Value written to PLLC0 Divider 3 register
config SYS_DA850_PLL0_PLLDIV4
hex "PLLC0 Divider 4"
default 0x8003 if SOC_DA850
help
Value written to PLLC0 Divider 4 register
config SYS_DA850_PLL0_PLLDIV5
hex "PLLC0 Divider 5"
default 0x8002 if SOC_DA850
help
Value written to PLLC0 Divider 5 register
config SYS_DA850_PLL0_PLLDIV6
hex "PLLC0 Divider 6"
default 0x8000 if SOC_DA850
help
Value written to PLLC0 Divider 6 register
config SYS_DA850_PLL0_PLLDIV7
hex "PLLC0 Divider 7"
default 0x8005 if SOC_DA850
help
Value written to PLLC0 Divider 7 register
config SYS_DA850_PLL1_POSTDIV
hex "PLLC1 PLL Post-Divider"
default 1 if SOC_DA850
help
Value written to PLLC1 PLL Post-Divider Control Register
config SYS_DA850_PLL1_PLLDIV1
hex "PLLC1 Divider 2"
default 0x8000 if SOC_DA850
help
Value written to PLLC1 Divider 1 register
config SYS_DA850_PLL1_PLLDIV2
hex "PLLC1 Divider 2"
default 0x8001 if SOC_DA850
help
Value written to PLLC1 Divider 2 register
config SYS_DA850_PLL1_PLLDIV3
hex "PLLC1 Divider 3"
default 0x8002 if SOC_DA850
help
Value written to PLLC1 Divider 3 register
endif
source "board/Barix/ipam390/Kconfig"
source "board/davinci/da8xxevm/Kconfig"
source "board/davinci/ea20/Kconfig"

1
configs/omapl138_lcdk_defconfig
View file

@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_OMAPL138_LCDK=y
CONFIG_SYS_DA850_PLL1_PLLDIV3=0x8003
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y

14
include/configs/calimain.h
View file

@ -39,20 +39,6 @@
/*
* PLL configuration
*/
#define CONFIG_SYS_DV_CLKMODE 0
#define CONFIG_SYS_DA850_PLL0_POSTDIV 1
#define CONFIG_SYS_DA850_PLL0_PLLDIV1 0x8000
#define CONFIG_SYS_DA850_PLL0_PLLDIV2 0x8001
#define CONFIG_SYS_DA850_PLL0_PLLDIV3 0x8002
#define CONFIG_SYS_DA850_PLL0_PLLDIV4 0x8003
#define CONFIG_SYS_DA850_PLL0_PLLDIV5 0x8002
#define CONFIG_SYS_DA850_PLL0_PLLDIV6 CONFIG_SYS_DA850_PLL0_PLLDIV1
#define CONFIG_SYS_DA850_PLL0_PLLDIV7 0x8005
#define CONFIG_SYS_DA850_PLL1_POSTDIV 1
#define CONFIG_SYS_DA850_PLL1_PLLDIV1 0x8000
#define CONFIG_SYS_DA850_PLL1_PLLDIV2 0x8001
#define CONFIG_SYS_DA850_PLL1_PLLDIV3 0x8002
#define CONFIG_SYS_DA850_PLL0_PLLM \
((calimain_get_osc_freq() == 25000000) ? 23 : 24)

14
include/configs/da850evm.h
View file

@ -74,20 +74,6 @@
/*
* PLL configuration
*/
#define CONFIG_SYS_DV_CLKMODE 0
#define CONFIG_SYS_DA850_PLL0_POSTDIV 1
#define CONFIG_SYS_DA850_PLL0_PLLDIV1 0x8000
#define CONFIG_SYS_DA850_PLL0_PLLDIV2 0x8001
#define CONFIG_SYS_DA850_PLL0_PLLDIV3 0x8002
#define CONFIG_SYS_DA850_PLL0_PLLDIV4 0x8003
#define CONFIG_SYS_DA850_PLL0_PLLDIV5 0x8002
#define CONFIG_SYS_DA850_PLL0_PLLDIV6 CONFIG_SYS_DA850_PLL0_PLLDIV1
#define CONFIG_SYS_DA850_PLL0_PLLDIV7 0x8005
#define CONFIG_SYS_DA850_PLL1_POSTDIV 1
#define CONFIG_SYS_DA850_PLL1_PLLDIV1 0x8000
#define CONFIG_SYS_DA850_PLL1_PLLDIV2 0x8001
#define CONFIG_SYS_DA850_PLL1_PLLDIV3 0x8002
#define CONFIG_SYS_DA850_PLL0_PLLM 24
#define CONFIG_SYS_DA850_PLL1_PLLM 21

14
include/configs/ipam390.h
View file

@ -56,20 +56,6 @@
/*
* PLL configuration
*/
#define CONFIG_SYS_DV_CLKMODE 0
#define CONFIG_SYS_DA850_PLL0_POSTDIV 1
#define CONFIG_SYS_DA850_PLL0_PLLDIV1 0x8000
#define CONFIG_SYS_DA850_PLL0_PLLDIV2 0x8001
#define CONFIG_SYS_DA850_PLL0_PLLDIV3 0x8002
#define CONFIG_SYS_DA850_PLL0_PLLDIV4 0x8003
#define CONFIG_SYS_DA850_PLL0_PLLDIV5 0x8002
#define CONFIG_SYS_DA850_PLL0_PLLDIV6 CONFIG_SYS_DA850_PLL0_PLLDIV1
#define CONFIG_SYS_DA850_PLL0_PLLDIV7 0x8005
#define CONFIG_SYS_DA850_PLL1_POSTDIV 1
#define CONFIG_SYS_DA850_PLL1_PLLDIV1 0x8000
#define CONFIG_SYS_DA850_PLL1_PLLDIV2 0x8001
#define CONFIG_SYS_DA850_PLL1_PLLDIV3 0x8002
#define CONFIG_SYS_DA850_PLL0_PLLM 24
#define CONFIG_SYS_DA850_PLL1_PLLM 24

14
include/configs/legoev3.h
View file

@ -52,20 +52,6 @@
/*
* PLL configuration
*/
#define CONFIG_SYS_DV_CLKMODE 0
#define CONFIG_SYS_DA850_PLL0_POSTDIV 1
#define CONFIG_SYS_DA850_PLL0_PLLDIV1 0x8000
#define CONFIG_SYS_DA850_PLL0_PLLDIV2 0x8001
#define CONFIG_SYS_DA850_PLL0_PLLDIV3 0x8002
#define CONFIG_SYS_DA850_PLL0_PLLDIV4 0x8003
#define CONFIG_SYS_DA850_PLL0_PLLDIV5 0x8002
#define CONFIG_SYS_DA850_PLL0_PLLDIV6 CONFIG_SYS_DA850_PLL0_PLLDIV1
#define CONFIG_SYS_DA850_PLL0_PLLDIV7 0x8005
#define CONFIG_SYS_DA850_PLL1_POSTDIV 1
#define CONFIG_SYS_DA850_PLL1_PLLDIV1 0x8000
#define CONFIG_SYS_DA850_PLL1_PLLDIV2 0x8001
#define CONFIG_SYS_DA850_PLL1_PLLDIV3 0x8002
#define CONFIG_SYS_DA850_PLL0_PLLM 24
#define CONFIG_SYS_DA850_PLL1_PLLM 21

14
include/configs/omapl138_lcdk.h
View file

@ -58,20 +58,6 @@
/*
* PLL configuration
*/
#define CONFIG_SYS_DV_CLKMODE 0
#define CONFIG_SYS_DA850_PLL0_POSTDIV 1
#define CONFIG_SYS_DA850_PLL0_PLLDIV1 0x8000
#define CONFIG_SYS_DA850_PLL0_PLLDIV2 0x8001
#define CONFIG_SYS_DA850_PLL0_PLLDIV3 0x8002
#define CONFIG_SYS_DA850_PLL0_PLLDIV4 0x8003
#define CONFIG_SYS_DA850_PLL0_PLLDIV5 0x8002
#define CONFIG_SYS_DA850_PLL0_PLLDIV6 CONFIG_SYS_DA850_PLL0_PLLDIV1
#define CONFIG_SYS_DA850_PLL0_PLLDIV7 0x8005
#define CONFIG_SYS_DA850_PLL1_POSTDIV 1
#define CONFIG_SYS_DA850_PLL1_PLLDIV1 0x8000
#define CONFIG_SYS_DA850_PLL1_PLLDIV2 0x8001
#define CONFIG_SYS_DA850_PLL1_PLLDIV3 0x8003
#define CONFIG_SYS_DA850_PLL0_PLLM 37
#define CONFIG_SYS_DA850_PLL1_PLLM 21

13
scripts/config_whitelist.txt
View file

@ -2438,21 +2438,9 @@ CONFIG_SYS_DA850_DDR2_SDBCR2
CONFIG_SYS_DA850_DDR2_SDRCR
CONFIG_SYS_DA850_DDR2_SDTIMR
CONFIG_SYS_DA850_DDR2_SDTIMR2
CONFIG_SYS_DA850_PLL0_PLLDIV1
CONFIG_SYS_DA850_PLL0_PLLDIV2
CONFIG_SYS_DA850_PLL0_PLLDIV3
CONFIG_SYS_DA850_PLL0_PLLDIV4
CONFIG_SYS_DA850_PLL0_PLLDIV5
CONFIG_SYS_DA850_PLL0_PLLDIV6
CONFIG_SYS_DA850_PLL0_PLLDIV7
CONFIG_SYS_DA850_PLL0_PLLM
CONFIG_SYS_DA850_PLL0_POSTDIV
CONFIG_SYS_DA850_PLL0_PREDIV
CONFIG_SYS_DA850_PLL1_PLLDIV1
CONFIG_SYS_DA850_PLL1_PLLDIV2
CONFIG_SYS_DA850_PLL1_PLLDIV3
CONFIG_SYS_DA850_PLL1_PLLM
CONFIG_SYS_DA850_PLL1_POSTDIV
CONFIG_SYS_DA850_SYSCFG_SUSPSRC
CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
CONFIG_SYS_DAVINCI_I2C_SLAVE
@ -2695,7 +2683,6 @@ CONFIG_SYS_DSPI_CTAR4
CONFIG_SYS_DSPI_CTAR5
CONFIG_SYS_DSPI_CTAR6
CONFIG_SYS_DSPI_CTAR7
CONFIG_SYS_DV_CLKMODE
CONFIG_SYS_DV_NOR_BOOT_CFG
CONFIG_SYS_EBI_CFGR_VAL
CONFIG_SYS_EBI_CSA_VAL