mpc85xx/t102xqds: convert deep sleep to generic board interface

A new deep sleep interface is introduced to support generic
board structure. Converts it to use new interface.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
tang yuantian 2014-12-18 09:55:07 +08:00 committed by York Sun
parent e26416a3f1
commit 2c537642e9
3 changed files with 33 additions and 12 deletions

View file

@ -11,6 +11,7 @@
#include <fsl_ddr_sdram.h> #include <fsl_ddr_sdram.h>
#include <fsl_ddr_dimm_params.h> #include <fsl_ddr_dimm_params.h>
#include <asm/fsl_law.h> #include <asm/fsl_law.h>
#include <asm/mpc85xx_gpio.h>
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
@ -152,6 +153,19 @@ found:
#endif #endif
} }
#if defined(CONFIG_DEEP_SLEEP)
void board_mem_sleep_setup(void)
{
void __iomem *qixis_base = (void *)QIXIS_BASE;
/* does not provide HW signals for power management */
clrbits_8(qixis_base + 0x21, 0x2);
/* Disable MCKE isolation */
gpio_set_value(2, 0);
udelay(1);
}
#endif
phys_size_t initdram(int board_type) phys_size_t initdram(int board_type)
{ {
phys_size_t dram_size; phys_size_t dram_size;
@ -166,5 +180,10 @@ phys_size_t initdram(int board_type)
/* DDR has been initialised by first stage boot loader */ /* DDR has been initialised by first stage boot loader */
dram_size = fsl_ddr_sdram_size(); dram_size = fsl_ddr_sdram_size();
#endif #endif
#if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_SPL_BUILD)
fsl_dp_resume();
#endif
return dram_size; return dram_size;
} }

View file

@ -19,10 +19,10 @@
#include <asm/fsl_liodn.h> #include <asm/fsl_liodn.h>
#include <fm_eth.h> #include <fm_eth.h>
#include <hwconfig.h> #include <hwconfig.h>
#include <asm/mpc85xx_gpio.h>
#include "../common/qixis.h" #include "../common/qixis.h"
#include "t102xqds.h" #include "t102xqds.h"
#include "t102xqds_qixis.h" #include "t102xqds_qixis.h"
#include "../common/sleep.h"
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
@ -242,6 +242,16 @@ void board_retimer_ds125df111_init(void)
i2c_write(I2C_RETIMER_ADDR, 0x64, 1, &reg, 1); i2c_write(I2C_RETIMER_ADDR, 0x64, 1, &reg, 1);
} }
int board_early_init_f(void)
{
#if defined(CONFIG_DEEP_SLEEP)
if (is_warm_boot())
fsl_dp_disable_console();
#endif
return 0;
}
int board_early_init_r(void) int board_early_init_r(void)
{ {
#ifdef CONFIG_SYS_FLASH_BASE #ifdef CONFIG_SYS_FLASH_BASE
@ -395,14 +405,3 @@ void qixis_dump_switch(void)
printf("SW%d = (0x%02x)\n", i, QIXIS_READ(cms[1])); printf("SW%d = (0x%02x)\n", i, QIXIS_READ(cms[1]));
} }
} }
#ifdef CONFIG_DEEP_SLEEP
void board_mem_sleep_setup(void)
{
/* does not provide HW signals for power management */
QIXIS_WRITE(pwr_ctl[1], (QIXIS_READ(pwr_ctl[1]) & ~0x2));
/* Disable MCKE isolation */
gpio_set_value(2, 0);
udelay(1);
}
#endif

View file

@ -35,7 +35,10 @@
#define CONFIG_ENV_OVERWRITE #define CONFIG_ENV_OVERWRITE
#define CONFIG_DEEP_SLEEP #define CONFIG_DEEP_SLEEP
#if defined(CONFIG_DEEP_SLEEP)
#define CONFIG_SILENT_CONSOLE #define CONFIG_SILENT_CONSOLE
#define CONFIG_BOARD_EARLY_INIT_F
#endif
#ifdef CONFIG_RAMBOOT_PBL #ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xqds/t1024_pbi.cfg #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xqds/t1024_pbi.cfg