mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-09-22 07:32:03 +00:00
Merge branch '2022-01-04-platform-updates' into next
- Assorted updates for vexpress64, apple m1, iot2050 and stemmy platforms.
This commit is contained in:
Tom Rini
commit
2a4b89a8ff
13 changed files with 153 additions and 39 deletions
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@ -7,7 +7,7 @@ config SYS_VENDOR
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default "armltd"
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config SYS_CONFIG_NAME
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default "vexpress_aemv8a"
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default "vexpress_aemv8"
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config JUNO_DTB_PART
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string "NOR flash partition holding DTB"
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@ -3,5 +3,5 @@
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# (C) Copyright 2000-2004
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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obj-y := vexpress64.o
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obj-y := vexpress64.o lowlevel_init.o
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obj-$(CONFIG_TARGET_VEXPRESS64_JUNO) += pcie.o
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12
board/armltd/vexpress64/lowlevel_init.S
Normal file
12
board/armltd/vexpress64/lowlevel_init.S
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@ -0,0 +1,12 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* (C) Copyright 2021 Arm Limited
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*/
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.global save_boot_params
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save_boot_params:
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adr x8, prior_stage_fdt_address
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str x0, [x8]
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b save_boot_params_ret
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@ -18,6 +18,10 @@
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#include <dm/platform_data/serial_pl01x.h>
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#include "pcie.h"
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#include <asm/armv8/mmu.h>
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#ifdef CONFIG_VIRTIO_NET
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#include <virtio_types.h>
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#include <virtio.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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@ -64,6 +68,9 @@ __weak void vexpress64_pcie_init(void)
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int board_init(void)
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{
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vexpress64_pcie_init();
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#ifdef CONFIG_VIRTIO_NET
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virtio_init();
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#endif
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return 0;
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}
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@ -85,7 +92,15 @@ int dram_init_banksize(void)
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return 0;
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}
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/* Assigned in lowlevel_init.S
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* Push the variable into the .data section so that it
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* does not get cleared later.
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*/
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unsigned long __section(".data") prior_stage_fdt_address;
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#ifdef CONFIG_OF_BOARD
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#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
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#define JUNO_FLASH_SEC_SIZE (256 * 1024)
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static phys_addr_t find_dtb_in_nor_flash(const char *partname)
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{
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@ -130,9 +145,11 @@ static phys_addr_t find_dtb_in_nor_flash(const char *partname)
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return ~0;
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}
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#endif
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void *board_fdt_blob_setup(int *err)
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{
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#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
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phys_addr_t fdt_rom_addr = find_dtb_in_nor_flash(CONFIG_JUNO_DTB_PART);
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*err = 0;
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@ -142,6 +159,22 @@ void *board_fdt_blob_setup(int *err)
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}
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return (void *)fdt_rom_addr;
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#endif
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#ifdef VEXPRESS_FDT_ADDR
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if (fdt_magic(VEXPRESS_FDT_ADDR) == FDT_MAGIC) {
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*err = 0;
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return (void *)VEXPRESS_FDT_ADDR;
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}
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#endif
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if (fdt_magic(prior_stage_fdt_address) == FDT_MAGIC) {
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*err = 0;
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return (void *)prior_stage_fdt_address;
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}
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*err = -ENXIO;
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return NULL;
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}
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#endif
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@ -60,7 +60,6 @@ CONFIG_CMD_TIME=y
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# CONFIG_ISO_PARTITION is not set
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CONFIG_OF_CONTROL=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_LIST="k3-am6528-iot2050-basic k3-am6548-iot2050-advanced"
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CONFIG_SPL_MULTI_DTB_FIT=y
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CONFIG_SPL_OF_LIST="k3-am65-iot2050-spl"
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CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
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@ -15,7 +15,7 @@ CONFIG_ANDROID_BOOT_IMAGE=y
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CONFIG_BOOTDELAY=1
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c090000 debug user_debug=31 loglevel=9"
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CONFIG_BOOTCOMMAND="if smhload ${boot_name} ${boot_addr}; then set bootargs; abootimg addr ${boot_addr}; abootimg get dtb --index=0 fdt_addr; bootm ${boot_addr} ${boot_addr} ${fdt_addr}; else; set fdt_high 0xffffffffffffffff; set initrd_high 0xffffffffffffffff; smhload ${kernel_name} ${kernel_addr}; smhload ${fdtfile} ${fdt_addr}; smhload ${initrd_name} ${initrd_addr} initrd_end; fdt addr ${fdt_addr}; fdt resize; fdt chosen ${initrd_addr} ${initrd_end}; booti $kernel_addr - $fdt_addr; fi"
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CONFIG_BOOTCOMMAND="if smhload ${boot_name} ${boot_addr_r}; then set bootargs; abootimg addr ${boot_addr_r}; abootimg get dtb --index=0 fdt_addr_r; bootm ${boot_addr_r} ${boot_addr_r} ${fdt_addr_r}; else; set fdt_high 0xffffffffffffffff; set initrd_high 0xffffffffffffffff; smhload ${kernel_name} ${kernel_addr}; smhload ${fdtfile} ${fdt_addr_r}; smhload ${ramdisk_name} ${ramdisk_addr_r} ramdisk_end; fdt addr ${fdt_addr_r}; fdt resize; fdt chosen ${ramdisk_addr_r} ${ramdisk_end}; booti $kernel_addr - $fdt_addr_r; fi"
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# CONFIG_DISPLAY_CPUINFO is not set
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_SYS_PROMPT="VExpress64# "
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@ -25,7 +25,7 @@ or turning on CONFIG_BASE_FVP for the more full featured model.
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Rather than create a new armv8 board similar to armltd/vexpress64, add
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semihosting calls to the existing one, enabled with CONFIG_SEMIHOSTING
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and CONFIG_BASE_FVP both set. Also reuse the existing board config file
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vexpress_aemv8a.h but differentiate the two models by the presence or
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vexpress_aemv8.h but differentiate the two models by the presence or
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absence of CONFIG_BASE_FVP. This change is tested and works on both the
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Foundation and Base fastmodel simulators.
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9
doc/board/armltd/index.rst
Normal file
9
doc/board/armltd/index.rst
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@ -0,0 +1,9 @@
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.. SPDX-License-Identifier: GPL-2.0
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Arm Ltd
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=============
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.. toctree::
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:maxdepth: 2
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vexpress64.rst
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51
doc/board/armltd/vexpress64.rst
Normal file
51
doc/board/armltd/vexpress64.rst
Normal file
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@ -0,0 +1,51 @@
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.. SPDX-License-Identifier: GPL-2.0
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Arm Versatile Express
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=====================
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The vexpress_* board configuration supports the following platforms:
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* FVP_Base_RevC-2xAEMvA
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* Juno development board
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Fixed Virtual Platforms
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-----------------------
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The Fixed Virtual Platforms (FVP) are complete simulations of an Arm system,
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including processor, memory and peripherals. They are set out in a "programmer's
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view", which gives a comprehensive model on which to build and test software.
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The supported FVPs are available free of charge and can be downloaded from the
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Arm developer site [1]_ (user registration might be required).
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Supported features:
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* GICv3
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* Generic timer
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* PL011 UART
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The default configuration assumes that U-Boot is bootstrapped using a suitable
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bootloader, such as Trusted Firmware-A [4]_. The u-boot binary can be passed
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into the TF-A build: ``make PLAT=<platform> all fip BL33=u-boot.bin``
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The FVPs can be debugged using Arm Development Studio [2]_.
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Juno
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----
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Juno is an Arm development board with the following features:
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* Arm Cortex-A72/A57 and Arm Cortex-A53 in a "big.LITTLE" configuration
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* A PCIe Gen2.0 bus with 4 lanes
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* 8GB of DRAM
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* GICv2
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More details can be found in the board documentation [3]_.
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References
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----------
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.. [1] https://developer.arm.com/tools-and-software/simulation-models/fixed-virtual-platforms
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.. [2] https://developer.arm.com/tools-and-software/embedded/arm-development-studio
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.. [3] https://developer.arm.com/tools-and-software/development-boards/juno-development-board
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.. [4] https://trustedfirmware-a.readthedocs.io/
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@ -12,6 +12,7 @@ Board-specific doc
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allwinner/index
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amlogic/index
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apple/index
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armltd/index
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atmel/index
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congatec/index
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coreboot/index
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@ -3,8 +3,6 @@
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#include <linux/sizes.h>
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#define CONFIG_SYS_SDRAM_BASE 0x880000000
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/* Environment */
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#define ENV_DEVICE_SETTINGS \
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"stdin=serial,usbkbd\0" \
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@ -14,6 +14,7 @@
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* bootloader. New images are loaded at the same address for compatibility.
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*/
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#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_BOOTM_LEN SZ_64M
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/* FIXME: This should be loaded from device tree... */
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#define CONFIG_SYS_L2_PL310
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@ -4,36 +4,39 @@
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* configurations.
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*/
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#ifndef __VEXPRESS_AEMV8A_H
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#define __VEXPRESS_AEMV8A_H
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#ifndef __VEXPRESS_AEMV8_H
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#define __VEXPRESS_AEMV8_H
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#include <linux/stringify.h>
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#define CONFIG_REMAKE_ELF
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/* Link Definitions */
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#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
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#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
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#else
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/* ATF loads u-boot here for BASE_FVP model */
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
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#elif CONFIG_TARGET_VEXPRESS64_JUNO
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
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#endif
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#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
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/* CS register bases for the original memory map. */
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#define V2M_PA_CS0 0x00000000
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#define V2M_PA_CS1 0x14000000
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#define V2M_PA_CS2 0x18000000
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#define V2M_PA_CS3 0x1c000000
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#define V2M_PA_CS4 0x0c000000
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#define V2M_PA_CS5 0x10000000
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#define V2M_BASE 0x80000000
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#define V2M_PA_BASE 0x00000000
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#define V2M_PA_CS0 (V2M_PA_BASE + 0x00000000)
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#define V2M_PA_CS1 (V2M_PA_BASE + 0x14000000)
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#define V2M_PA_CS2 (V2M_PA_BASE + 0x18000000)
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#define V2M_PA_CS3 (V2M_PA_BASE + 0x1c000000)
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#define V2M_PA_CS4 (V2M_PA_BASE + 0x0c000000)
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#define V2M_PA_CS5 (V2M_PA_BASE + 0x10000000)
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#define V2M_PERIPH_OFFSET(x) (x << 16)
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#define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))
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#define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))
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#define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))
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#define V2M_BASE 0x80000000
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/* Common peripherals relative to CS7. */
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#define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
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#define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
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@ -72,23 +75,23 @@
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/* Generic Interrupt Controller Definitions */
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#ifdef CONFIG_GICV3
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#define GICD_BASE (0x2f000000)
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#define GICR_BASE (0x2f100000)
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#define GICD_BASE (V2M_PA_BASE + 0x2f000000)
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#define GICR_BASE (V2M_PA_BASE + 0x2f100000)
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#else
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#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
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#define GICD_BASE (0x2f000000)
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#define GICC_BASE (0x2c000000)
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#elif CONFIG_TARGET_VEXPRESS64_JUNO
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#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
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#define GICD_BASE (0x2C010000)
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#define GICC_BASE (0x2C02f000)
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#else
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#define GICD_BASE (V2M_PA_BASE + 0x2f000000)
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#define GICC_BASE (V2M_PA_BASE + 0x2c000000)
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#endif
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#endif /* !CONFIG_GICV3 */
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#ifndef CONFIG_TARGET_VEXPRESS64_JUNO
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/* The Vexpress64 simulators use SMSC91C111 */
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#if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) && !defined(CONFIG_DM_ETH)
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/* The Vexpress64 BASE_FVP simulator uses SMSC91C111 */
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#define CONFIG_SMC91111 1
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#define CONFIG_SMC91111_BASE (0x01A000000)
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#define CONFIG_SMC91111_BASE (V2M_PA_BASE + 0x01A000000)
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#endif
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/* PL011 Serial Configuration */
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@ -113,7 +116,7 @@
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#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
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#define PHYS_SDRAM_2 (0x880000000)
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#define PHYS_SDRAM_2_SIZE 0x180000000
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#elif CONFIG_TARGET_VEXPRESS64_BASE_FVP && CONFIG_NR_DRAM_BANKS == 2
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#elif CONFIG_NR_DRAM_BANKS == 2
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#define PHYS_SDRAM_2 (0x880000000)
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#define PHYS_SDRAM_2_SIZE 0x80000000
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#endif
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@ -171,15 +174,22 @@
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BOOTENV
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#elif CONFIG_TARGET_VEXPRESS64_BASE_FVP
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#define VEXPRESS_KERNEL_ADDR 0x80080000
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#define VEXPRESS_FDT_ADDR 0x8fc00000
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#define VEXPRESS_BOOT_ADDR 0x8fd00000
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#define VEXPRESS_RAMDISK_ADDR 0x8fe00000
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"kernel_name=Image\0" \
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"kernel_addr=0x80080000\0" \
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"initrd_name=ramdisk.img\0" \
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"initrd_addr=0x88000000\0" \
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"fdtfile=devtree.dtb\0" \
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"fdt_addr=0x83000000\0" \
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"boot_name=boot.img\0" \
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"boot_addr=0x8007f800\0"
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"kernel_addr_r=" __stringify(VEXPRESS_KERNEL_ADDR) "\0" \
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"ramdisk_name=ramdisk.img\0" \
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"ramdisk_addr_r=" __stringify(VEXPRESS_RAMDISK_ADDR) "\0" \
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"fdtfile=devtree.dtb\0" \
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"fdt_addr_r=" __stringify(VEXPRESS_FDT_ADDR) "\0" \
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"boot_name=boot.img\0" \
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"boot_addr_r=" __stringify(VEXPRESS_BOOT_ADDR) "\0"
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#endif
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/* Monitor Command Prompt */
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@ -193,7 +203,7 @@
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/* Store environment at top of flash in the same location as blank.img */
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/* in the Juno firmware. */
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#else
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#define CONFIG_SYS_FLASH_BASE 0x0C000000
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#define CONFIG_SYS_FLASH_BASE (V2M_PA_BASE + 0x0C000000)
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/* 256 x 256KiB sectors */
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#define CONFIG_SYS_MAX_FLASH_SECT 256
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/* Store environment at top of flash */
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@ -210,4 +220,4 @@
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#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
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#define FLASH_MAX_SECTOR_SIZE 0x00040000
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#endif /* __VEXPRESS_AEMV8A_H */
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#endif /* __VEXPRESS_AEMV8_H */
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