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mxs: Fix VDDx brownout interrupt disable/enable

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Incorrect registers HW_POWER_VDDIOCTRL, HW_POWER_VDDACTRL
and HW_POWER_VDDDCTRL are used in the current code to disable/enable
brownout interrupts in 'mxs_power_set_vddx()'.
Change register to HW_POWER_CTRL which contains brownout interrupt
enable bits ENIRQ_VDDIO_BO, ENIRQ_VDDA_BO and ENIRQ_VDDD_BO.

Signed-off-by: Cody Green <cody@londelec.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
This commit is contained in:
Cody Green 2023-07-03 21:57:00 +01:00 committed by Fabio Estevam
parent f7655af980
commit 2264bfba19
1 changed files with 5 additions and 3 deletions
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8
arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
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@ -1177,8 +1177,9 @@ static void mxs_power_set_vddx(const struct mxs_vddx_cfg *cfg,
if (adjust_up && cfg->bo_irq) {
if (powered_by_linreg) {
bo_int = readl(cfg->reg);
clrbits_le32(cfg->reg, cfg->bo_enirq);
bo_int = readl(&power_regs->hw_power_ctrl);
clrbits_le32(&power_regs->hw_power_ctrl,
cfg->bo_enirq);
}
setbits_le32(cfg->reg, cfg->bo_offset_mask);
}
@ -1220,7 +1221,8 @@ static void mxs_power_set_vddx(const struct mxs_vddx_cfg *cfg,
if (adjust_up && powered_by_linreg) {
writel(cfg->bo_irq, &power_regs->hw_power_ctrl_clr);
if (bo_int & cfg->bo_enirq)
setbits_le32(cfg->reg, cfg->bo_enirq);
setbits_le32(&power_regs->hw_power_ctrl,
cfg->bo_enirq);
}
clrsetbits_le32(cfg->reg, cfg->bo_offset_mask,