ata: fsl_sata: Remove legacy non-BLK code

The migration deadline for this has passed and all boards have been
updated, remove this legacy code and references for it.

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2022-06-10 22:59:26 -04:00
parent 7b976f7a0b
commit 21af94f882
16 changed files with 3 additions and 153 deletions

View file

@ -6,10 +6,13 @@
*/
#include <common.h>
#include <ahci.h>
#include <blk.h>
#include <command.h>
#include <console.h>
#include <cpu_func.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <log.h>
#include <asm/io.h>
#include <asm/processor.h>
@ -21,33 +24,6 @@
#include <linux/delay.h>
#include "fsl_sata.h"
#if CONFIG_IS_ENABLED(BLK)
#include <dm.h>
#include <ahci.h>
#include <blk.h>
#include <dm/device-internal.h>
#else
#ifndef CONFIG_SYS_SATA1_FLAGS
#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
#endif
#ifndef CONFIG_SYS_SATA2_FLAGS
#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
#endif
static struct fsl_sata_info fsl_sata_info[] = {
#ifdef CONFIG_SATA1
{CONFIG_SYS_SATA1, CONFIG_SYS_SATA1_FLAGS},
#else
{0, 0},
#endif
#ifdef CONFIG_SATA2
{CONFIG_SYS_SATA2, CONFIG_SYS_SATA2_FLAGS},
#else
{0, 0},
#endif
};
#endif
static inline void sdelay(unsigned long sec)
{
unsigned long i;
@ -86,11 +62,7 @@ static int ata_wait_register(unsigned __iomem *addr, u32 mask,
return (i < timeout_msec) ? 0 : -1;
}
#if !CONFIG_IS_ENABLED(BLK)
int init_sata(int dev)
#else
static int init_sata(struct fsl_ata_priv *priv, int dev)
#endif
{
u32 length, align;
cmd_hdr_tbl_t *cmd_hdr;
@ -129,15 +101,9 @@ static int init_sata(struct fsl_ata_priv *priv, int dev)
snprintf(sata->name, 12, "SATA%d:", dev);
/* Set the controller register base address to device struct */
#if !CONFIG_IS_ENABLED(BLK)
sata_dev_desc[dev].priv = (void *)sata;
reg = (fsl_sata_reg_t *)(fsl_sata_info[dev].sata_reg_base);
sata->dma_flag = fsl_sata_info[dev].flags;
#else
reg = (fsl_sata_reg_t *)(priv->base + priv->offset * dev);
sata->dma_flag = priv->flag;
priv->fsl_sata = sata;
#endif
sata->reg_base = reg;
/* Allocate the command header table, 4 bytes aligned */
@ -738,17 +704,11 @@ static u32 ata_low_level_rw_lba28(fsl_sata_t *sata, u32 blknr, u32 blkcnt,
/*
* SATA interface between low level driver and command layer
*/
#if !CONFIG_IS_ENABLED(BLK)
ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer)
{
fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
#else
static ulong sata_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
void *buffer)
{
struct fsl_ata_priv *priv = dev_get_plat(dev);
fsl_sata_t *sata = priv->fsl_sata;
#endif
u32 rc;
if (sata->lba48)
@ -760,17 +720,11 @@ static ulong sata_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
return rc;
}
#if !CONFIG_IS_ENABLED(BLK)
ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer)
{
fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
#else
static ulong sata_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
const void *buffer)
{
struct fsl_ata_priv *priv = dev_get_plat(dev);
fsl_sata_t *sata = priv->fsl_sata;
#endif
u32 rc;
if (sata->lba48) {
@ -801,17 +755,11 @@ static void fsl_sata_identify(fsl_sata_t *sata, u16 *id)
ata_swap_buf_le16(id, ATA_ID_WORDS);
}
#if !CONFIG_IS_ENABLED(BLK)
int scan_sata(int dev)
{
fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
#else
static int scan_sata(struct udevice *dev)
{
struct blk_desc *desc = dev_get_uclass_plat(dev);
struct fsl_ata_priv *priv = dev_get_plat(dev);
fsl_sata_t *sata = priv->fsl_sata;
#endif
unsigned char serial[ATA_ID_SERNO_LEN + 1];
unsigned char firmware[ATA_ID_FW_REV_LEN + 1];
@ -853,22 +801,12 @@ static int scan_sata(struct udevice *dev)
debug("Device supports LBA28\n\r");
#endif
#if !CONFIG_IS_ENABLED(BLK)
memcpy(sata_dev_desc[dev].product, serial, sizeof(serial));
memcpy(sata_dev_desc[dev].revision, firmware, sizeof(firmware));
memcpy(sata_dev_desc[dev].vendor, product, sizeof(product));
sata_dev_desc[dev].lba = (u32)n_sectors;
#ifdef CONFIG_LBA48
sata_dev_desc[dev].lba48 = sata->lba48;
#endif
#else
memcpy(desc->product, serial, sizeof(serial));
memcpy(desc->revision, firmware, sizeof(firmware));
memcpy(desc->vendor, product, sizeof(product));
desc->lba = n_sectors;
#ifdef CONFIG_LBA48
desc->lba48 = sata->lba48;
#endif
#endif
/* Get the NCQ queue depth from device */
@ -890,7 +828,6 @@ static int scan_sata(struct udevice *dev)
return 0;
}
#if CONFIG_IS_ENABLED(BLK)
static const struct blk_ops sata_fsl_blk_ops = {
.read = sata_read,
.write = sata_write,
@ -1042,4 +979,3 @@ U_BOOT_DRIVER(fsl_ahci) = {
.remove = fsl_ata_remove,
.priv_auto = sizeof(struct fsl_ata_priv),
};
#endif

View file

@ -319,7 +319,6 @@ typedef struct fsl_sata {
#define READ_CMD 0
#define WRITE_CMD 1
#if CONFIG_IS_ENABLED(BLK)
struct fsl_ata_priv {
u32 base;
u32 flag;
@ -327,6 +326,5 @@ struct fsl_ata_priv {
u32 offset;
fsl_sata_t *fsl_sata;
};
#endif
#endif /* __FSL_SATA_H__ */

View file

@ -265,15 +265,6 @@
/*
* SATA
*/
#define CONFIG_SATA1
#define CONFIG_SYS_SATA1_OFFSET 0x18000
#define CONFIG_SYS_SATA1 (CONFIG_SYS_IMMR + CONFIG_SYS_SATA1_OFFSET)
#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
#define CONFIG_SATA2
#define CONFIG_SYS_SATA2_OFFSET 0x19000
#define CONFIG_SYS_SATA2 (CONFIG_SYS_IMMR + CONFIG_SYS_SATA2_OFFSET)
#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
#ifdef CONFIG_FSL_SATA
#define CONFIG_LBA48
#endif

View file

@ -476,13 +476,6 @@ extern unsigned long get_sdram_size(void);
#define CONFIG_FSL_SATA_V2
#ifdef CONFIG_FSL_SATA
#define CONFIG_SATA1
#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR
#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
#define CONFIG_SATA2
#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR
#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
#define CONFIG_LBA48
#endif /* #ifdef CONFIG_FSL_SATA */

View file

@ -340,13 +340,6 @@
#define CONFIG_FSL_SATA_V2
#ifdef CONFIG_FSL_SATA_V2
#define CONFIG_SATA1
#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR
#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
#define CONFIG_SATA2
#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR
#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
#define CONFIG_LBA48
#endif

View file

@ -393,10 +393,6 @@
/* SATA */
#define CONFIG_FSL_SATA_V2
#ifdef CONFIG_FSL_SATA_V2
#define CONFIG_SATA1
#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR
#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
#define CONFIG_LBA48
#endif

View file

@ -462,12 +462,6 @@
* SATA
*/
#ifdef CONFIG_FSL_SATA_V2
#define CONFIG_SATA1
#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR
#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
#define CONFIG_SATA2
#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR
#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
#define CONFIG_LBA48
#endif

View file

@ -418,12 +418,6 @@
* SATA
*/
#ifdef CONFIG_FSL_SATA_V2
#define CONFIG_SATA1
#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR
#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
#define CONFIG_SATA2
#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR
#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
#define CONFIG_LBA48
#endif

View file

@ -155,13 +155,6 @@
/* SATA */
#ifdef CONFIG_FSL_SATA_V2
#define CONFIG_SATA1
#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR
#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
#define CONFIG_SATA2
#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR
#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
#define CONFIG_LBA48
#endif
@ -435,13 +428,6 @@
/* SATA */
#ifdef CONFIG_FSL_SATA_V2
#define CONFIG_SATA1
#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR
#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
#define CONFIG_SATA2
#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR
#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
#define CONFIG_LBA48
#endif

View file

@ -339,13 +339,6 @@
/* SATA */
#ifdef CONFIG_FSL_SATA_V2
#define CONFIG_SATA1
#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR
#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
#define CONFIG_SATA2
#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR
#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
#define CONFIG_LBA48
#endif

View file

@ -60,7 +60,6 @@
/* SATA */
#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1
#ifndef SPL_NO_ENV
#undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \

View file

@ -53,7 +53,6 @@
#define SCSI_VEND_ID 0x1b4b
#define SCSI_DEV_ID 0x9170
#define CONFIG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID}
#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1
/* Initial environment variables */
#ifndef SPL_NO_ENV

View file

@ -115,11 +115,6 @@ unsigned long long get_qixis_addr(void);
/* Miscellaneous configurable options */
/* SATA */
#ifdef CONFIG_SCSI
#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1
#endif
/* Physical Memory Map */
#define CONFIG_HWCONFIG

View file

@ -29,11 +29,6 @@
#define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1
#endif
/* SATA */
#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1
#define CONFIG_SYS_SATA2 AHCI_BASE_ADDR2
#define CONFIG_SYS_NOR0_CSPR_EXT (0x0)
#define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024)
#define CONFIG_SYS_NOR_AMASK_EARLY IFC_AMASK(64*1024*1024)

View file

@ -34,11 +34,6 @@
#define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1
#endif
/* SATA */
#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1
#define CONFIG_SYS_SATA2 AHCI_BASE_ADDR2
#if !defined(CONFIG_FSL_QSPI) || defined(CONFIG_TFABOOT)
#define CONFIG_SYS_NOR0_CSPR_EXT (0x0)

View file

@ -95,13 +95,6 @@
#define CONFIG_PCI_SCAN_SHOW
#endif
/* SATA */
#ifdef CONFIG_SCSI
#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1
#define CONFIG_SYS_SATA2 AHCI_BASE_ADDR2
#endif
/* USB */
#ifdef CONFIG_USB_HOST
#ifndef CONFIG_TARGET_LX2162AQDS