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ata: dwc_ahsata: Remove legacy non-CONFIG_AHCI code

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The migration deadline for this has passed and all boards have been
updated, remove this legacy code and references for it.

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2022-06-10 22:59:25 -04:00
parent d64d338fcc
commit 7b976f7a0b
10 changed files with 0 additions and 151 deletions
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133
drivers/ata/dwc_ahsata.c
View file

@ -844,138 +844,6 @@ static ulong sata_write_common(struct ahci_uc_priv *uc_priv,
return rc;
}
#if !CONFIG_IS_ENABLED(AHCI)
static int ahci_init_one(int pdev)
{
int rc;
struct ahci_uc_priv *uc_priv = NULL;
uc_priv = malloc(sizeof(struct ahci_uc_priv));
if (!uc_priv)
return -ENOMEM;
memset(uc_priv, 0, sizeof(struct ahci_uc_priv));
uc_priv->dev = pdev;
uc_priv->host_flags = ATA_FLAG_SATA
| ATA_FLAG_NO_LEGACY
| ATA_FLAG_MMIO
| ATA_FLAG_PIO_DMA
| ATA_FLAG_NO_ATAPI;
uc_priv->mmio_base = (void __iomem *)CONFIG_DWC_AHSATA_BASE_ADDR;
/* initialize adapter */
rc = ahci_host_init(uc_priv);
if (rc)
goto err_out;
ahci_print_info(uc_priv);
/* Save the uc_private struct to block device struct */
sata_dev_desc[pdev].priv = uc_priv;
return 0;
err_out:
if (uc_priv)
free(uc_priv);
return rc;
}
int init_sata(int dev)
{
struct ahci_uc_priv *uc_priv = NULL;
#if defined(CONFIG_MX6)
if (!is_mx6dq() && !is_mx6dqp())
return 1;
#endif
if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) {
printf("The sata index %d is out of ranges\n\r", dev);
return -1;
}
ahci_init_one(dev);
uc_priv = sata_dev_desc[dev].priv;
return dwc_ahci_start_ports(uc_priv) ? 1 : 0;
}
int reset_sata(int dev)
{
struct ahci_uc_priv *uc_priv;
struct sata_host_regs *host_mmio;
if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) {
printf("The sata index %d is out of ranges\n\r", dev);
return -1;
}
uc_priv = sata_dev_desc[dev].priv;
if (NULL == uc_priv)
/* not initialized, so nothing to reset */
return 0;
host_mmio = uc_priv->mmio_base;
setbits_le32(&host_mmio->ghc, SATA_HOST_GHC_HR);
while (readl(&host_mmio->ghc) & SATA_HOST_GHC_HR)
udelay(100);
free(uc_priv);
memset(&sata_dev_desc[dev], 0, sizeof(struct blk_desc));
return 0;
}
int sata_port_status(int dev, int port)
{
struct sata_port_regs *port_mmio;
struct ahci_uc_priv *uc_priv = NULL;
if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1))
return -EINVAL;
if (sata_dev_desc[dev].priv == NULL)
return -ENODEV;
uc_priv = sata_dev_desc[dev].priv;
port_mmio = uc_priv->port[port].port_mmio;
return readl(&port_mmio->ssts) & SATA_PORT_SSTS_DET_MASK;
}
/*
* SATA interface between low level driver and command layer
*/
ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer)
{
struct ahci_uc_priv *uc_priv = sata_dev_desc[dev].priv;
return sata_read_common(uc_priv, &sata_dev_desc[dev], blknr, blkcnt,
buffer);
}
ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer)
{
struct ahci_uc_priv *uc_priv = sata_dev_desc[dev].priv;
return sata_write_common(uc_priv, &sata_dev_desc[dev], blknr, blkcnt,
buffer);
}
int scan_sata(int dev)
{
struct ahci_uc_priv *uc_priv = sata_dev_desc[dev].priv;
struct blk_desc *pdev = &sata_dev_desc[dev];
return dwc_ahsata_scan_common(uc_priv, pdev);
}
#endif /* CONFIG_IS_ENABLED(AHCI) */
#if CONFIG_IS_ENABLED(AHCI)
int dwc_ahsata_port_status(struct udevice *dev, int port)
{
struct ahci_uc_priv *uc_priv = dev_get_uclass_priv(dev);
@ -1109,4 +977,3 @@ U_BOOT_DRIVER(dwc_ahsata_ahci) = {
.probe = dwc_ahsata_probe,
};
#endif
#endif

2
include/configs/cm_fx6.h
View file

@ -151,8 +151,6 @@
/* SATA */
#define CONFIG_LBA48
#define CONFIG_DWC_AHSATA_PORT_ID 0
#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
/* Boot */
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)

2
include/configs/ge_bx50v3.h
View file

@ -19,8 +19,6 @@
/* SATA Configs */
#ifdef CONFIG_CMD_SATA
#define CONFIG_DWC_AHSATA_PORT_ID 0
#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
#define CONFIG_LBA48
#endif

2
include/configs/gw_ventana.h
View file

@ -32,8 +32,6 @@
* SATA Configs
*/
#ifdef CONFIG_CMD_SATA
#define CONFIG_DWC_AHSATA_PORT_ID 0
#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
#define CONFIG_LBA48
#endif

2
include/configs/m53menlo.h
View file

@ -86,8 +86,6 @@
* SATA
*/
#ifdef CONFIG_CMD_SATA
#define CONFIG_DWC_AHSATA_PORT_ID 0
#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
#define CONFIG_LBA48
#endif

2
include/configs/mx53loco.h
View file

@ -101,8 +101,6 @@
#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
#ifdef CONFIG_CMD_SATA
#define CONFIG_DWC_AHSATA_PORT_ID 0
#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
#define CONFIG_LBA48
#endif

2
include/configs/mx6cuboxi.h
View file

@ -18,8 +18,6 @@
/* SATA Configuration */
#ifdef CONFIG_CMD_SATA
#define CONFIG_DWC_AHSATA_PORT_ID 0
#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
#define CONFIG_LBA48
#endif

2
include/configs/nitrogen6x.h
View file

@ -23,8 +23,6 @@
* SATA Configs
*/
#ifdef CONFIG_CMD_SATA
#define CONFIG_DWC_AHSATA_PORT_ID 0
#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
#define CONFIG_LBA48
#endif

2
include/configs/tbs2910.h
View file

@ -33,8 +33,6 @@
/* SATA */
#ifdef CONFIG_CMD_SATA
#define CONFIG_DWC_AHSATA_PORT_ID 0
#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
#define CONFIG_LBA48
#define CONFIG_SYS_64BIT_LBA
#endif

2
include/configs/wandboard.h
View file

@ -17,8 +17,6 @@
/* SATA Configs */
#ifdef CONFIG_CMD_SATA
#define CONFIG_DWC_AHSATA_PORT_ID 0
#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
#define CONFIG_LBA48
#endif