mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-28 15:41:40 +00:00
* Patch by Phillippe Robin, 16 Mar 2004:
avoid dereferencing NULL pointer in lib_arm/armlinux.c * Patch by Stephen Williams, 15 Mar 2004: Fix CONFIG_SERIAL_SOFTWARE_FIFO documentation * Patch by Tolunay Orkun, 15 Mar 2004: Initialize bi_opbfreq to real OPB frequency via get_OPB_freq() * Patch by Travis Sawyer, 15 Mar 2004: Update CREDITS & MAINTAINERS files for PPC440GX & Ocotea port
This commit is contained in:
parent
efa329cb89
commit
109c0e3ad3
8 changed files with 26 additions and 11 deletions
12
CHANGELOG
12
CHANGELOG
|
@ -2,6 +2,18 @@
|
||||||
Changes for U-Boot 1.0.2:
|
Changes for U-Boot 1.0.2:
|
||||||
======================================================================
|
======================================================================
|
||||||
|
|
||||||
|
* Patch by Phillippe Robin, 16 Mar 2004:
|
||||||
|
avoid dereferencing NULL pointer in lib_arm/armlinux.c
|
||||||
|
|
||||||
|
* Patch by Stephen Williams, 15 Mar 2004:
|
||||||
|
Fix CONFIG_SERIAL_SOFTWARE_FIFO documentation
|
||||||
|
|
||||||
|
* Patch by Tolunay Orkun, 15 Mar 2004:
|
||||||
|
Initialize bi_opbfreq to real OPB frequency via get_OPB_freq()
|
||||||
|
|
||||||
|
* Patch by Travis Sawyer, 15 Mar 2004:
|
||||||
|
Update CREDITS & MAINTAINERS files for PPC440GX & Ocotea port
|
||||||
|
|
||||||
* Add start-up delay to make sure power has stabilized before
|
* Add start-up delay to make sure power has stabilized before
|
||||||
attempting to switch on USB on SX1 board.
|
attempting to switch on USB on SX1 board.
|
||||||
|
|
||||||
|
|
2
CREDITS
2
CREDITS
|
@ -284,7 +284,7 @@ D: Author of LiMon-1.4.2, which contributed some ideas
|
||||||
|
|
||||||
N: Travis B. Sawyer
|
N: Travis B. Sawyer
|
||||||
E: travis.sawyer@sandburst.com
|
E: travis.sawyer@sandburst.com
|
||||||
D: Support for IBM PPC440GX, XES XPedite1000 440GX PrPMC board.
|
D: Support for IBM PPC440GX, XES XPedite1000 440GX PrPMC board. IBM 440gx Ref Platform (Ocotea)
|
||||||
|
|
||||||
N: Paolo Scaffardi
|
N: Paolo Scaffardi
|
||||||
E: arsenio@tin.it
|
E: arsenio@tin.it
|
||||||
|
|
|
@ -230,6 +230,11 @@ Stefan Roese <stefan.roese@esd-electronics.com>
|
||||||
PMC405 PPC405GP
|
PMC405 PPC405GP
|
||||||
VOH405 PPC405EP
|
VOH405 PPC405EP
|
||||||
|
|
||||||
|
Travis Sawyer (travis.sawyer@sandburst.com>
|
||||||
|
|
||||||
|
XPEDITE1K PPC440GX
|
||||||
|
OCOTEA PPC440GX
|
||||||
|
|
||||||
Peter De Schrijver <p2@mind.be>
|
Peter De Schrijver <p2@mind.be>
|
||||||
|
|
||||||
ML2 PPC4xx
|
ML2 PPC4xx
|
||||||
|
|
4
README
4
README
|
@ -441,8 +441,8 @@ The following options need to be configured:
|
||||||
(RTS/CTS) and UART's built-in FIFO. Set the number of
|
(RTS/CTS) and UART's built-in FIFO. Set the number of
|
||||||
bytes the interrupt driven input buffer should have.
|
bytes the interrupt driven input buffer should have.
|
||||||
|
|
||||||
Set to 0 to disable this feature (this is the default).
|
Leave undefined to disable this feature, including
|
||||||
This will also disable hardware handshake.
|
disable the buffer and hardware handshake.
|
||||||
|
|
||||||
- Console UART Number:
|
- Console UART Number:
|
||||||
CONFIG_UART1_CONSOLE
|
CONFIG_UART1_CONSOLE
|
||||||
|
|
|
@ -211,7 +211,6 @@ int interrupt_init (void)
|
||||||
*(volatile ulong *)(CFG_TIMERBASE + 0) = CFG_TIMER_RELOAD; /* TimerLoad */
|
*(volatile ulong *)(CFG_TIMERBASE + 0) = CFG_TIMER_RELOAD; /* TimerLoad */
|
||||||
*(volatile ulong *)(CFG_TIMERBASE + 4) = CFG_TIMER_RELOAD; /* TimerValue */
|
*(volatile ulong *)(CFG_TIMERBASE + 4) = CFG_TIMER_RELOAD; /* TimerValue */
|
||||||
*(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C;
|
*(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C;
|
||||||
/* *(volatile ulong *)(CFG_TIMERBASE + 8) = CFG_TIMER_CTRL | 0x40; Periodic */
|
|
||||||
#endif /* CONFIG_VERSATILE */
|
#endif /* CONFIG_VERSATILE */
|
||||||
|
|
||||||
/* init the timestamp and lastdec value */
|
/* init the timestamp and lastdec value */
|
||||||
|
|
|
@ -830,8 +830,8 @@ int mpc5xxx_fec_initialize(bd_t * bis)
|
||||||
fec->eth = (ethernet_regs *)MPC5XXX_FEC;
|
fec->eth = (ethernet_regs *)MPC5XXX_FEC;
|
||||||
fec->tbdBase = (FEC_TBD *)FEC_BD_BASE;
|
fec->tbdBase = (FEC_TBD *)FEC_BD_BASE;
|
||||||
fec->rbdBase = (FEC_RBD *)(FEC_BD_BASE + FEC_TBD_NUM * sizeof(FEC_TBD));
|
fec->rbdBase = (FEC_RBD *)(FEC_BD_BASE + FEC_TBD_NUM * sizeof(FEC_TBD));
|
||||||
#if defined(CONFIG_ICECUBE) ||
|
#if defined(CONFIG_ICECUBE) || \
|
||||||
defined(CONFIG_PM520) ||
|
defined(CONFIG_PM520) || \
|
||||||
defined(CONFIG_TOP5200)
|
defined(CONFIG_TOP5200)
|
||||||
# ifndef CONFIG_FEC_10MBIT
|
# ifndef CONFIG_FEC_10MBIT
|
||||||
fec->xcv_type = MII100;
|
fec->xcv_type = MII100;
|
||||||
|
|
|
@ -312,6 +312,9 @@ static void setup_commandline_tag (bd_t *bd, char *commandline)
|
||||||
{
|
{
|
||||||
char *p;
|
char *p;
|
||||||
|
|
||||||
|
if (!commandline)
|
||||||
|
return;
|
||||||
|
|
||||||
/* eat leading white space */
|
/* eat leading white space */
|
||||||
for (p = commandline; *p == ' '; p++);
|
for (p = commandline; *p == ' '; p++);
|
||||||
|
|
||||||
|
|
|
@ -507,12 +507,8 @@ void board_init_f (ulong bootflag)
|
||||||
bd->bi_plb_busfreq = gd->bus_clk;
|
bd->bi_plb_busfreq = gd->bus_clk;
|
||||||
#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
|
#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
|
||||||
bd->bi_pci_busfreq = get_PCI_freq ();
|
bd->bi_pci_busfreq = get_PCI_freq ();
|
||||||
|
bd->bi_opbfreq = get_OPB_freq ();
|
||||||
|
|
||||||
#ifdef CFG_OPB_FREQ
|
|
||||||
bd->bi_opbfreq = CFG_OPB_FREQ;
|
|
||||||
#else
|
|
||||||
bd->bi_opbfreq = 50000000;
|
|
||||||
#endif
|
|
||||||
bd->bi_iic_fast[0] = 0;
|
bd->bi_iic_fast[0] = 0;
|
||||||
bd->bi_iic_fast[1] = 0;
|
bd->bi_iic_fast[1] = 0;
|
||||||
#elif defined(CONFIG_XILINX_ML300)
|
#elif defined(CONFIG_XILINX_ML300)
|
||||||
|
|
Loading…
Reference in a new issue