2005-09-25 13:59:01 +00:00
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/*
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* (C) Copyright 2002
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* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2004
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* BEC Systems <http://bec-systems.com>
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* Cliff Brake <cliff.brake@gmail.com>
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* Support for Accelent/Vibren PXA255 IDP
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2005-09-25 13:59:01 +00:00
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*/
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#include <common.h>
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2009-10-05 05:37:03 +00:00
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#include <netdev.h>
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2005-09-25 13:59:01 +00:00
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#include <command.h>
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2010-09-09 07:50:39 +00:00
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#include <asm/io.h>
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2011-11-26 10:17:32 +00:00
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#include <asm/arch/pxa.h>
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2012-09-30 10:09:49 +00:00
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#include <asm/arch/regs-mmc.h>
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2005-09-25 13:59:01 +00:00
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2006-03-31 16:32:53 +00:00
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DECLARE_GLOBAL_DATA_PTR;
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2005-09-25 13:59:01 +00:00
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/*
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* Miscelaneous platform dependent initialisations
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*/
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int board_init (void)
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{
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2010-10-20 19:20:07 +00:00
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/* We have RAM, disable cache */
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dcache_disable();
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icache_disable();
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2005-09-25 13:59:01 +00:00
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/* arch number of Lubbock-Board */
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gd->bd->bi_arch_number = MACH_TYPE_PXA_IDP;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = 0xa0000100;
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/* turn on serial ports */
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*(volatile unsigned int *)(PXA_CS5_PHYS + 0x03C0002c) = 0x13;
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/* set PWM for LCD */
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/* a value that works is 60Hz, 77% duty cycle */
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2010-09-09 07:50:39 +00:00
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writel(readl(CKEN) | CKEN0_PWM0, CKEN);
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writel(0x3f, PWM_CTRL0);
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writel(0x3ff, PWM_PERVAL0);
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writel(792, PWM_PWDUTY0);
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2005-09-25 13:59:01 +00:00
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/* clear reset to AC97 codec */
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2010-09-09 07:50:39 +00:00
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writel(readl(CKEN) | CKEN2_AC97, CKEN);
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writel(GCR_COLD_RST, GCR);
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2005-09-25 13:59:01 +00:00
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/* enable LCD backlight */
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/* *(volatile unsigned int *)(PXA_CS5_PHYS + 0x03C00030) = 0x7; */
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/* test display */
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/* lcd_puts("This is a test\nTest #2\n"); */
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return 0;
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}
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2012-09-30 10:09:49 +00:00
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#ifdef CONFIG_CMD_MMC
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int board_mmc_init(bd_t *bis)
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{
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pxa_mmc_register(0);
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return 0;
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}
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#endif
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2005-09-25 13:59:01 +00:00
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int board_late_init(void)
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{
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setenv("stdout", "serial");
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setenv("stderr", "serial");
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return 0;
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}
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2010-10-20 19:20:07 +00:00
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int dram_init(void)
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{
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2011-11-26 10:18:57 +00:00
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pxa2xx_dram_init();
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2010-10-20 19:20:07 +00:00
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gd->ram_size = PHYS_SDRAM_1_SIZE;
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return 0;
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}
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2005-09-25 13:59:01 +00:00
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2010-10-20 19:20:07 +00:00
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void dram_init_banksize(void)
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2005-09-25 13:59:01 +00:00
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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}
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#ifdef DEBUG_BLINKC_ENABLE
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void delay_c(void)
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{
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/* reset OSCR to 0 */
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2010-09-09 07:50:39 +00:00
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writel(0, OSCR);
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while (readl(OSCR) > 0x10000)
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2005-09-25 13:59:01 +00:00
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;
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2010-09-09 07:50:39 +00:00
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while (readl(OSCR) < 0xd4000)
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2005-09-25 13:59:01 +00:00
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;
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}
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void blink_c(void)
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{
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int led_bit = (1<<10);
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2010-09-09 07:50:39 +00:00
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writel(led_bit, GPDR0);
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writel(led_bit, GPCR0);
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2005-09-25 13:59:01 +00:00
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delay_c();
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2010-09-09 07:50:39 +00:00
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writel(led_bit, GPSR0);
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2005-09-25 13:59:01 +00:00
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delay_c();
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2010-09-09 07:50:39 +00:00
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writel(led_bit, GPCR0);
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2005-09-25 13:59:01 +00:00
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}
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2010-06-28 20:00:46 +00:00
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int do_idpcmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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2005-09-25 13:59:01 +00:00
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{
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printf("IDPCMD started\n");
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return 0;
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}
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2008-10-16 13:01:15 +00:00
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U_BOOT_CMD(idpcmd, CONFIG_SYS_MAXARGS, 0, do_idpcmd,
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2009-01-28 00:03:12 +00:00
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"custom IDP command",
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2009-05-24 15:06:54 +00:00
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"no args at this time"
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2005-09-25 13:59:01 +00:00
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);
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#endif
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2009-10-05 05:37:03 +00:00
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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return rc;
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}
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#endif
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