2018-05-06 21:58:06 +00:00
|
|
|
/* SPDX-License-Identifier: GPL-2.0 */
|
2008-01-17 03:37:35 +00:00
|
|
|
/*
|
|
|
|
* Freescale non-CPM SPI Controller
|
|
|
|
*
|
|
|
|
* Copyright 2008 Qstreams Networks, Inc.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef _ASM_MPC8XXX_SPI_H_
|
|
|
|
#define _ASM_MPC8XXX_SPI_H_
|
|
|
|
|
|
|
|
#include <asm/types.h>
|
|
|
|
|
2019-01-21 08:17:24 +00:00
|
|
|
#if defined(CONFIG_ARCH_MPC8308) || \
|
2019-01-21 08:17:25 +00:00
|
|
|
defined(CONFIG_ARCH_MPC8313) || \
|
|
|
|
defined(CONFIG_ARCH_MPC8315) || \
|
2019-01-21 08:17:27 +00:00
|
|
|
defined(CONFIG_ARCH_MPC834X) || \
|
2019-01-21 08:17:29 +00:00
|
|
|
defined(CONFIG_ARCH_MPC837X)
|
2008-01-17 03:37:35 +00:00
|
|
|
|
2008-01-17 18:48:00 +00:00
|
|
|
typedef struct spi8xxx {
|
2008-01-17 03:37:35 +00:00
|
|
|
u8 res0[0x20]; /* 0x0-0x01f reserved */
|
|
|
|
u32 mode; /* mode register */
|
|
|
|
u32 event; /* event register */
|
|
|
|
u32 mask; /* mask register */
|
|
|
|
u32 com; /* command register */
|
|
|
|
u32 tx; /* transmit register */
|
|
|
|
u32 rx; /* receive register */
|
2008-01-18 02:07:04 +00:00
|
|
|
u8 res1[0xFC8]; /* fill up to 0x1000 */
|
2008-01-17 03:37:35 +00:00
|
|
|
} spi8xxx_t;
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#endif /* _ASM_MPC8XXX_SPI_H_ */
|