2018-05-06 21:58:06 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0+
|
2016-02-11 23:47:20 +00:00
|
|
|
/*
|
2017-10-23 07:53:58 +00:00
|
|
|
* Copyright (C) 2016, STMicroelectronics - All Rights Reserved
|
|
|
|
* Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
|
2016-02-11 23:47:20 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
#include <common.h>
|
2017-04-10 22:02:54 +00:00
|
|
|
#include <dm.h>
|
2019-11-14 19:57:46 +00:00
|
|
|
#include <init.h>
|
2018-03-02 14:59:28 +00:00
|
|
|
#include <lcd.h>
|
2020-05-10 17:40:05 +00:00
|
|
|
#include <log.h>
|
2019-02-22 14:04:44 +00:00
|
|
|
#include <miiphy.h>
|
|
|
|
#include <phy_interface.h>
|
2017-04-10 22:02:54 +00:00
|
|
|
#include <ram.h>
|
2019-11-14 19:57:24 +00:00
|
|
|
#include <serial.h>
|
2017-05-28 19:55:10 +00:00
|
|
|
#include <spl.h>
|
2018-03-02 14:59:28 +00:00
|
|
|
#include <splash.h>
|
|
|
|
#include <st_logo_data.h>
|
|
|
|
#include <video.h>
|
2020-10-31 03:38:53 +00:00
|
|
|
#include <asm/global_data.h>
|
2016-02-11 23:47:20 +00:00
|
|
|
#include <asm/io.h>
|
|
|
|
#include <asm/armv7m.h>
|
|
|
|
#include <asm/arch/stm32.h>
|
|
|
|
#include <asm/arch/gpio.h>
|
2017-01-22 15:04:27 +00:00
|
|
|
#include <asm/arch/syscfg.h>
|
2017-04-10 22:03:00 +00:00
|
|
|
#include <asm/gpio.h>
|
2020-05-10 17:40:11 +00:00
|
|
|
#include <linux/delay.h>
|
2016-02-11 23:47:20 +00:00
|
|
|
|
|
|
|
DECLARE_GLOBAL_DATA_PTR;
|
|
|
|
|
2016-07-07 16:02:25 +00:00
|
|
|
int dram_init(void)
|
|
|
|
{
|
2017-05-28 19:55:10 +00:00
|
|
|
#ifndef CONFIG_SUPPORT_SPL
|
2018-08-03 11:09:55 +00:00
|
|
|
int rv;
|
2017-05-28 19:55:10 +00:00
|
|
|
struct udevice *dev;
|
2017-04-10 22:02:54 +00:00
|
|
|
rv = uclass_get_device(UCLASS_RAM, 0, &dev);
|
|
|
|
if (rv) {
|
|
|
|
debug("DRAM init failed: %d\n", rv);
|
|
|
|
return rv;
|
|
|
|
}
|
2017-04-10 22:03:01 +00:00
|
|
|
|
2017-05-28 19:55:10 +00:00
|
|
|
#endif
|
2018-08-03 11:09:55 +00:00
|
|
|
return fdtdec_setup_mem_size_base();
|
2017-04-10 22:03:01 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int dram_init_banksize(void)
|
|
|
|
{
|
2018-08-03 11:09:55 +00:00
|
|
|
return fdtdec_setup_memory_banksize();
|
2016-07-07 16:02:25 +00:00
|
|
|
}
|
|
|
|
|
2017-05-28 19:55:10 +00:00
|
|
|
#ifdef CONFIG_SPL_BUILD
|
2017-05-28 19:55:13 +00:00
|
|
|
#ifdef CONFIG_SPL_OS_BOOT
|
|
|
|
int spl_start_uboot(void)
|
|
|
|
{
|
|
|
|
debug("SPL: booting kernel\n");
|
|
|
|
/* break into full u-boot on 'c' */
|
|
|
|
return serial_tstc() && serial_getc() == 'c';
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2017-05-28 19:55:10 +00:00
|
|
|
int spl_dram_init(void)
|
|
|
|
{
|
|
|
|
struct udevice *dev;
|
|
|
|
int rv;
|
|
|
|
rv = uclass_get_device(UCLASS_RAM, 0, &dev);
|
|
|
|
if (rv)
|
|
|
|
debug("DRAM init failed: %d\n", rv);
|
|
|
|
return rv;
|
|
|
|
}
|
|
|
|
void spl_board_init(void)
|
|
|
|
{
|
|
|
|
preloader_console_init();
|
2021-04-04 18:21:35 +00:00
|
|
|
spl_dram_init();
|
2017-05-28 19:55:10 +00:00
|
|
|
arch_cpu_init(); /* to configure mpu for sdram rw permissions */
|
|
|
|
}
|
|
|
|
u32 spl_boot_device(void)
|
|
|
|
{
|
2017-05-28 19:55:14 +00:00
|
|
|
return BOOT_DEVICE_XIP;
|
2017-05-28 19:55:10 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|
2016-02-11 23:47:20 +00:00
|
|
|
u32 get_board_rev(void)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-04-10 22:03:00 +00:00
|
|
|
int board_late_init(void)
|
|
|
|
{
|
|
|
|
struct gpio_desc gpio = {};
|
|
|
|
int node;
|
|
|
|
|
|
|
|
node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,led1");
|
|
|
|
if (node < 0)
|
|
|
|
return -1;
|
|
|
|
|
2017-05-31 03:47:09 +00:00
|
|
|
gpio_request_by_name_nodev(offset_to_ofnode(node), "led-gpio", 0, &gpio,
|
2017-04-10 22:03:00 +00:00
|
|
|
GPIOD_IS_OUT);
|
|
|
|
|
|
|
|
if (dm_gpio_is_valid(&gpio)) {
|
|
|
|
dm_gpio_set_value(&gpio, 0);
|
|
|
|
mdelay(10);
|
|
|
|
dm_gpio_set_value(&gpio, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* read button 1*/
|
|
|
|
node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,button1");
|
|
|
|
if (node < 0)
|
|
|
|
return -1;
|
|
|
|
|
2017-05-31 03:47:09 +00:00
|
|
|
gpio_request_by_name_nodev(offset_to_ofnode(node), "button-gpio", 0,
|
|
|
|
&gpio, GPIOD_IS_IN);
|
2017-04-10 22:03:00 +00:00
|
|
|
|
|
|
|
if (dm_gpio_is_valid(&gpio)) {
|
|
|
|
if (dm_gpio_get_value(&gpio))
|
|
|
|
puts("usr button is at HIGH LEVEL\n");
|
|
|
|
else
|
|
|
|
puts("usr button is at LOW LEVEL\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-02-11 23:47:20 +00:00
|
|
|
int board_init(void)
|
|
|
|
{
|
2017-04-10 22:03:01 +00:00
|
|
|
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
|
2018-01-18 13:10:05 +00:00
|
|
|
|
|
|
|
#ifdef CONFIG_ETH_DESIGNWARE
|
2019-02-22 14:04:44 +00:00
|
|
|
const char *phy_mode;
|
|
|
|
int node;
|
|
|
|
|
|
|
|
node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,stm32-dwmac");
|
|
|
|
if (node < 0)
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
phy_mode = fdt_getprop(gd->fdt_blob, node, "phy-mode", NULL);
|
|
|
|
|
|
|
|
switch (phy_get_interface_by_name(phy_mode)) {
|
|
|
|
case PHY_INTERFACE_MODE_RMII:
|
|
|
|
STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
|
|
|
|
break;
|
|
|
|
case PHY_INTERFACE_MODE_MII:
|
|
|
|
STM32_SYSCFG->pmc &= ~SYSCFG_PMC_MII_RMII_SEL;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
printf("PHY interface %s not supported !\n", phy_mode);
|
|
|
|
}
|
2018-01-18 13:10:05 +00:00
|
|
|
#endif
|
|
|
|
|
2018-03-02 14:59:28 +00:00
|
|
|
#if defined(CONFIG_CMD_BMP)
|
|
|
|
bmp_display((ulong)stmicroelectronics_uboot_logo_8bit_rle,
|
|
|
|
BMP_ALIGN_CENTER, BMP_ALIGN_CENTER);
|
|
|
|
#endif /* CONFIG_CMD_BMP */
|
|
|
|
|
2016-02-11 23:47:20 +00:00
|
|
|
return 0;
|
|
|
|
}
|