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u-boot/arch/arm/mach-kirkwood/include/mach/soc.h

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SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-06 21:58:06 +00:00
/* SPDX-License-Identifier: GPL-2.0+ */
arm: Kirkwood: Basic SOCs support Kirkwood family controllers are highly integrated SOCs based on Feroceon-88FR131/Sheeva-88SV131/arm926ejs cpu core. SOC versions supported:- 1) 88F6281-A0 define CONFIG_KW88F6281_A0 2) 88F6192-A0 define CONFIG_KW88F6192_A0 Other supported features:- 1) get_random_hex() fucntion 2) PCI Express port initialization 3) NS16550 driver support Contributors: Yotam Admon <yotam@marvell.com> Michael Blostein <michaelbl@marvell.com Reviewed-by: Ronen Shitrit <rshitrit@marvell.com> Acked-by: Stefan Rose <sr@denx.de> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-06-20 09:01:53 +00:00
/*
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*
* Header file for the Marvell's Feroceon CPU core.
*/
#ifndef _ASM_ARCH_KIRKWOOD_H
#define _ASM_ARCH_KIRKWOOD_H
#if defined (CONFIG_FEROCEON_88FR131) || defined (CONFIG_SHEEVA_88SV131)
/* SOC specific definations */
#define INTREG_BASE 0xd0000000
#define KW_REGISTER(x) (KW_REGS_PHY_BASE + x)
#define KW_OFFSET_REG (INTREG_BASE + 0x20080)
/* undocumented registers */
#define KW_REG_UNDOC_0x1470 (KW_REGISTER(0x1470))
#define KW_REG_UNDOC_0x1478 (KW_REGISTER(0x1478))
arm: kirkwood: Change naming of dram functions from km_foo() to mvebu_foo() Additionally the SDRAM address decoding register address is not hard coded in the C code any more. A define is introduced for this base address. This makes is possible to use those gpio functions from other MVEBU SoC's as well. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
2014-10-22 10:13:13 +00:00
#define MVEBU_SDRAM_BASE (KW_REGISTER(0x1500))
arm, kirkwood: added KW_TWSI_BASE in kirkwood.h Signed-off-by: Heiko Schocher <hs@denx.de>
2009-07-16 07:59:10 +00:00
#define KW_TWSI_BASE (KW_REGISTER(0x11000))
arm: Kirkwood: Basic SOCs support Kirkwood family controllers are highly integrated SOCs based on Feroceon-88FR131/Sheeva-88SV131/arm926ejs cpu core. SOC versions supported:- 1) 88F6281-A0 define CONFIG_KW88F6281_A0 2) 88F6192-A0 define CONFIG_KW88F6192_A0 Other supported features:- 1) get_random_hex() fucntion 2) PCI Express port initialization 3) NS16550 driver support Contributors: Yotam Admon <yotam@marvell.com> Michael Blostein <michaelbl@marvell.com Reviewed-by: Ronen Shitrit <rshitrit@marvell.com> Acked-by: Stefan Rose <sr@denx.de> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-06-20 09:01:53 +00:00
#define KW_UART0_BASE (KW_REGISTER(0x12000))
arm: Kirkwood: bugfix: UART1 bar correction Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-07-06 10:20:47 +00:00
#define KW_UART1_BASE (KW_REGISTER(0x12100))
arm: Kirkwood: Basic SOCs support Kirkwood family controllers are highly integrated SOCs based on Feroceon-88FR131/Sheeva-88SV131/arm926ejs cpu core. SOC versions supported:- 1) 88F6281-A0 define CONFIG_KW88F6281_A0 2) 88F6192-A0 define CONFIG_KW88F6192_A0 Other supported features:- 1) get_random_hex() fucntion 2) PCI Express port initialization 3) NS16550 driver support Contributors: Yotam Admon <yotam@marvell.com> Michael Blostein <michaelbl@marvell.com Reviewed-by: Ronen Shitrit <rshitrit@marvell.com> Acked-by: Stefan Rose <sr@denx.de> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-06-20 09:01:53 +00:00
#define KW_MPP_BASE (KW_REGISTER(0x10000))
arm: marvell: Extract kirkwood gpio functions into new common file gpio.c This makes is possible to use those gpio functions from other MVEBU SoC's as well. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
2014-10-22 10:13:11 +00:00
#define MVEBU_GPIO0_BASE (KW_REGISTER(0x10100))
#define MVEBU_GPIO1_BASE (KW_REGISTER(0x10140))
drivers/rtc: add Marvell Integrated RTC This driver can be used for kirkwood SoCs by enabling CONFIG_RTC_MV. Tested on Global Scale Technologies Dreamplug. Signed-off-by: Jason Cooper <u-boot@lakedaemon.net>
2011-08-04 15:56:16 +00:00
#define KW_RTC_BASE (KW_REGISTER(0x10300))
arm: Kirkwood: Basic SOCs support Kirkwood family controllers are highly integrated SOCs based on Feroceon-88FR131/Sheeva-88SV131/arm926ejs cpu core. SOC versions supported:- 1) 88F6281-A0 define CONFIG_KW88F6281_A0 2) 88F6192-A0 define CONFIG_KW88F6192_A0 Other supported features:- 1) get_random_hex() fucntion 2) PCI Express port initialization 3) NS16550 driver support Contributors: Yotam Admon <yotam@marvell.com> Michael Blostein <michaelbl@marvell.com Reviewed-by: Ronen Shitrit <rshitrit@marvell.com> Acked-by: Stefan Rose <sr@denx.de> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-06-20 09:01:53 +00:00
#define KW_NANDF_BASE (KW_REGISTER(0x10418))
spi: kirkwood_spi.c: Change KW_SPI_BASE to MVEBU_SPI_BASE This makes is possible to use this SPI driver from other MVEBU SoC's as well. As the upcoming Armada XP support will do. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
2014-10-22 10:13:12 +00:00
#define MVEBU_SPI_BASE (KW_REGISTER(0x10600))
ARM: kirkwood: rename KW_CPU_WIN_BASE to MVEBU_CPU_WIN_BASE This will allow the kirkwood platforms to use more common code with the other mvebu SoCs. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-13 07:47:01 +00:00
#define MVEBU_CPU_WIN_BASE (KW_REGISTER(0x20000))
arm: Kirkwood: Basic SOCs support Kirkwood family controllers are highly integrated SOCs based on Feroceon-88FR131/Sheeva-88SV131/arm926ejs cpu core. SOC versions supported:- 1) 88F6281-A0 define CONFIG_KW88F6281_A0 2) 88F6192-A0 define CONFIG_KW88F6192_A0 Other supported features:- 1) get_random_hex() fucntion 2) PCI Express port initialization 3) NS16550 driver support Contributors: Yotam Admon <yotam@marvell.com> Michael Blostein <michaelbl@marvell.com Reviewed-by: Ronen Shitrit <rshitrit@marvell.com> Acked-by: Stefan Rose <sr@denx.de> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-06-20 09:01:53 +00:00
#define KW_CPU_REG_BASE (KW_REGISTER(0x20100))
arm: marvell: Rework timer.c to make it usable for other MVEBU platforms This patch does the following: - Rename defines and registers to not use kirkwood - Remove unused defines - Use clrsetbits() accessor functions - Coding style cleanup - Clear 25MHZ bit in timer controller register init for Armada XP There is no functional change for kirkwood. At least not intentionally. This will be used by the upcoming Armada XP support. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
2014-10-22 10:13:08 +00:00
#define MVEBU_TIMER_BASE (KW_REGISTER(0x20300))
arm: Kirkwood: Basic SOCs support Kirkwood family controllers are highly integrated SOCs based on Feroceon-88FR131/Sheeva-88SV131/arm926ejs cpu core. SOC versions supported:- 1) 88F6281-A0 define CONFIG_KW88F6281_A0 2) 88F6192-A0 define CONFIG_KW88F6192_A0 Other supported features:- 1) get_random_hex() fucntion 2) PCI Express port initialization 3) NS16550 driver support Contributors: Yotam Admon <yotam@marvell.com> Michael Blostein <michaelbl@marvell.com Reviewed-by: Ronen Shitrit <rshitrit@marvell.com> Acked-by: Stefan Rose <sr@denx.de> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-06-20 09:01:53 +00:00
#define KW_REG_PCIE_BASE (KW_REGISTER(0x40000))
arm: Kirkwood: arch specific updated for ehci-Kirkwood driver support This patch abstracts Kirkwood arch specific changes to support ehci-kirkwood driver Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-06-29 15:25:54 +00:00
#define KW_USB20_BASE (KW_REGISTER(0x50000))
arm: Kirkwood: Basic SOCs support Kirkwood family controllers are highly integrated SOCs based on Feroceon-88FR131/Sheeva-88SV131/arm926ejs cpu core. SOC versions supported:- 1) 88F6281-A0 define CONFIG_KW88F6281_A0 2) 88F6192-A0 define CONFIG_KW88F6192_A0 Other supported features:- 1) get_random_hex() fucntion 2) PCI Express port initialization 3) NS16550 driver support Contributors: Yotam Admon <yotam@marvell.com> Michael Blostein <michaelbl@marvell.com Reviewed-by: Ronen Shitrit <rshitrit@marvell.com> Acked-by: Stefan Rose <sr@denx.de> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-06-20 09:01:53 +00:00
#define KW_EGIGA0_BASE (KW_REGISTER(0x72000))
#define KW_EGIGA1_BASE (KW_REGISTER(0x76000))
cmd_ide: add support for Kirkwood Added MVSATAC definitions to Kirkwood. Added support for Kirkwood in cmd_ide. Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-08-07 11:59:44 +00:00
#define KW_SATA_BASE (KW_REGISTER(0x80000))
ARM: kirkwood: add mvsdio driver This patch add Marvell kirkwood MVSDIO/MMC driver and enable it for Sheevaplugs and OpenRD boards. Signed-off-by: Gerald Kerma <drEagle@doukki.net> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-07-25 19:07:30 +00:00
#define KW_SDIO_BASE (KW_REGISTER(0x90000))
cmd_ide: add support for Kirkwood Added MVSATAC definitions to Kirkwood. Added support for Kirkwood in cmd_ide. Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-08-07 11:59:44 +00:00
/* Kirkwood Sata controller has two ports */
#define KW_SATA_PORT0_OFFSET 0x2000
#define KW_SATA_PORT1_OFFSET 0x4000
arm: Kirkwood: Basic SOCs support Kirkwood family controllers are highly integrated SOCs based on Feroceon-88FR131/Sheeva-88SV131/arm926ejs cpu core. SOC versions supported:- 1) 88F6281-A0 define CONFIG_KW88F6281_A0 2) 88F6192-A0 define CONFIG_KW88F6192_A0 Other supported features:- 1) get_random_hex() fucntion 2) PCI Express port initialization 3) NS16550 driver support Contributors: Yotam Admon <yotam@marvell.com> Michael Blostein <michaelbl@marvell.com Reviewed-by: Ronen Shitrit <rshitrit@marvell.com> Acked-by: Stefan Rose <sr@denx.de> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-06-20 09:01:53 +00:00
mvgbe: add support for orion5x GbE controller Add definitions and initialization in orion5x for mvgbe. Add orion5x in mvgbe SoC includes. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 20:24:29 +00:00
/* Kirkwood GbE controller has two ports */
#define MAX_MVGBE_DEVS 2
#define MVGBE0_BASE KW_EGIGA0_BASE
#define MVGBE1_BASE KW_EGIGA1_BASE
mvgbe: support SoCs other than kirkwood Rename all references to kirkwood in mvgbe symbols throughout the whole codebase. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 20:24:28 +00:00
Remove kirkwood-specifics from marvell EHCI driver Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2012-01-15 22:08:39 +00:00
/* Kirkwood USB Host controller */
#define MVUSB0_BASE KW_USB20_BASE
#define MVUSB0_CPU_ATTR_DRAM_CS0 KWCPU_ATTR_DRAM_CS0
#define MVUSB0_CPU_ATTR_DRAM_CS1 KWCPU_ATTR_DRAM_CS1
#define MVUSB0_CPU_ATTR_DRAM_CS2 KWCPU_ATTR_DRAM_CS2
#define MVUSB0_CPU_ATTR_DRAM_CS3 KWCPU_ATTR_DRAM_CS3
/* Kirkwood CPU memory windows */
#define MVCPU_WIN_CTRL_DATA KWCPU_WIN_CTRL_DATA
#define MVCPU_WIN_ENABLE KWCPU_WIN_ENABLE
#define MVCPU_WIN_DISABLE KWCPU_WIN_DISABLE
global: Migrate CONFIG_SAR_REG to CFG Perform a simple rename of CONFIG_SAR_REG to CFG_SAR_REG Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-04 15:13:42 +00:00
#define CFG_SAR_REG (KW_MPP_BASE + 0x0030)
arm: kirkwood: 88f6281: Detect CONFIG_SYS_TCLK from SAR register Bit 21 in SAR register specifies if TCLK is running at 166 MHz or 200 MHz. This information is undocumented in public Marvell Kirkwood Functional Specifications [2], but is available in Linux v3.15 kirkwood code [1]. Commit 8ac303d49f89 ("arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK") broke support for Marvell 88F6281 SoCs because it was expected that all those SoCs have TCLK running at 200 MHz as specified in Marvell 88F6281 Hardware Specifications [3]. Fix broken support for 88F6281 by detecting CONFIG_SYS_TCLK from SAR register, like it was doing Linux v3.15. [1] - https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/arch/arm/mach-kirkwood/common.c?h=v3.15#n542 [2] - https://web.archive.org/web/20130730091033/http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf [3] - https://web.archive.org/web/20120620073511/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6281_OpenSource.pdf Update by Stefan 2022-08-23: - Fix compilation error for ds109 Fixes: 8ac303d49f89 ("arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-17 19:37:49 +00:00
arm: Kirkwood: Basic SOCs support Kirkwood family controllers are highly integrated SOCs based on Feroceon-88FR131/Sheeva-88SV131/arm926ejs cpu core. SOC versions supported:- 1) 88F6281-A0 define CONFIG_KW88F6281_A0 2) 88F6192-A0 define CONFIG_KW88F6192_A0 Other supported features:- 1) get_random_hex() fucntion 2) PCI Express port initialization 3) NS16550 driver support Contributors: Yotam Admon <yotam@marvell.com> Michael Blostein <michaelbl@marvell.com Reviewed-by: Ronen Shitrit <rshitrit@marvell.com> Acked-by: Stefan Rose <sr@denx.de> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-06-20 09:01:53 +00:00
#if defined (CONFIG_KW88F6281)
#include <asm/arch/kw88f6281.h>
#elif defined (CONFIG_KW88F6192)
#include <asm/arch/kw88f6192.h>
#else
#error "SOC Name not defined"
#endif /* CONFIG_KW88F6281 */
#endif /* CONFIG_FEROCEON_88FR131 */
#endif /* _ASM_ARCH_KIRKWOOD_H */
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