2015-11-10 16:16:25 +00:00
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/*
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* Copyright (C) 2015 Synopsys, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/dts-v1/;
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#include "skeleton.dtsi"
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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console = &uart0;
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};
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clocks {
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apbclk: apbclk {
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compatible = "fixed-clock";
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clock-frequency = <50000000>;
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#clock-cells = <0>;
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};
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};
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uart0: serial0@e0022000 {
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compatible = "snps,dw-apb-uart";
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reg = <0xe0022000 0x1000>;
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reg-shift = <2>;
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reg-io-width = <4>;
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};
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ethernet@e0018000 {
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#interrupt-cells = <1>;
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compatible = "altr,socfpga-stmmac";
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reg = < 0xe0018000 0x2000 >;
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interrupts = < 25 >;
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interrupt-names = "macirq";
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phy-mode = "gmii";
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snps,pbl = < 32 >;
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clocks = <&apbclk>;
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clock-names = "stmmaceth";
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max-speed = <100>;
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};
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2015-11-30 17:53:25 +00:00
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ehci@0xe0040000 {
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compatible = "generic-ehci";
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reg = < 0xe0040000 0x100 >;
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interrupts = < 8 >;
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};
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2015-12-10 13:56:42 +00:00
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ohci@0xe0060000 {
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compatible = "generic-ohci";
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reg = < 0xe0060000 0x100 >;
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interrupts = < 8 >;
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};
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2015-11-10 16:16:25 +00:00
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};
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