2014-02-13 07:48:12 +00:00
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/*
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* Copyright (C) 2014 Gateworks Corporation
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* Tim Harvey <tharvey@gateworks.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __PFUZE100_PMIC_H_
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#define __PFUZE100_PMIC_H_
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2015-08-14 09:36:16 +00:00
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/* Device ID */
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enum {PFUZE100 = 0x10, PFUZE200 = 0x11, PFUZE3000 = 0x30};
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#define PFUZE100_REGULATOR_DRIVER "pfuze100_regulator"
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2014-02-13 07:48:12 +00:00
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/* PFUZE100 registers */
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enum {
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PFUZE100_DEVICEID = 0x00,
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PFUZE100_REVID = 0x03,
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PFUZE100_FABID = 0x04,
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PFUZE100_SW1ABVOL = 0x20,
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2014-05-09 16:15:42 +00:00
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PFUZE100_SW1ABSTBY = 0x21,
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2015-01-08 13:00:36 +00:00
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PFUZE100_SW1ABOFF = 0x22,
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PFUZE100_SW1ABMODE = 0x23,
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2015-05-18 05:37:26 +00:00
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PFUZE100_SW1ABCONF = 0x24,
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2014-02-13 07:48:12 +00:00
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PFUZE100_SW1CVOL = 0x2e,
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2014-05-09 16:15:42 +00:00
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PFUZE100_SW1CSTBY = 0x2f,
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2015-01-08 13:00:36 +00:00
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PFUZE100_SW1COFF = 0x30,
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PFUZE100_SW1CMODE = 0x31,
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2014-05-09 16:15:42 +00:00
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PFUZE100_SW1CCONF = 0x32,
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2014-02-13 07:48:12 +00:00
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PFUZE100_SW2VOL = 0x35,
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2015-01-08 13:00:36 +00:00
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PFUZE100_SW2STBY = 0x36,
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PFUZE100_SW2OFF = 0x37,
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PFUZE100_SW2MODE = 0x38,
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PFUZE100_SW2CONF = 0x39,
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2014-02-13 07:48:12 +00:00
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PFUZE100_SW3AVOL = 0x3c,
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2015-01-08 13:00:36 +00:00
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PFUZE100_SW3ASTBY = 0x3D,
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PFUZE100_SW3AOFF = 0x3E,
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PFUZE100_SW3AMODE = 0x3F,
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PFUZE100_SW3ACONF = 0x40,
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2014-02-13 07:48:12 +00:00
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PFUZE100_SW3BVOL = 0x43,
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2015-01-08 13:00:36 +00:00
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PFUZE100_SW3BSTBY = 0x44,
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PFUZE100_SW3BOFF = 0x45,
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PFUZE100_SW3BMODE = 0x46,
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PFUZE100_SW3BCONF = 0x47,
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2014-02-13 07:48:12 +00:00
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PFUZE100_SW4VOL = 0x4a,
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2015-01-08 13:00:36 +00:00
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PFUZE100_SW4STBY = 0x4b,
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PFUZE100_SW4OFF = 0x4c,
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PFUZE100_SW4MODE = 0x4d,
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PFUZE100_SW4CONF = 0x4e,
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2014-02-13 07:48:12 +00:00
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PFUZE100_SWBSTCON1 = 0x66,
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PFUZE100_VREFDDRCON = 0x6a,
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PFUZE100_VSNVSVOL = 0x6b,
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PFUZE100_VGEN1VOL = 0x6c,
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PFUZE100_VGEN2VOL = 0x6d,
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PFUZE100_VGEN3VOL = 0x6e,
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PFUZE100_VGEN4VOL = 0x6f,
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PFUZE100_VGEN5VOL = 0x70,
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PFUZE100_VGEN6VOL = 0x71,
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2015-08-14 09:36:16 +00:00
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PFUZE100_NUM_OF_REGS = 0x7f,
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2014-02-13 07:48:12 +00:00
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};
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2015-08-07 08:43:45 +00:00
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/* Registor offset based on VOLT register */
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#define PFUZE100_VOL_OFFSET 0
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#define PFUZE100_STBY_OFFSET 1
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#define PFUZE100_OFF_OFFSET 2
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#define PFUZE100_MODE_OFFSET 3
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#define PFUZE100_CONF_OFFSET 4
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2014-11-06 08:28:58 +00:00
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/*
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* Buck Regulators
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*/
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2015-01-09 08:59:41 +00:00
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#define PFUZE100_SW1ABC_SETP(x) ((x - 3000) / 250)
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2014-11-06 08:28:58 +00:00
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/* SW1A/B/C Output Voltage Configuration */
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#define SW1x_0_300V 0
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#define SW1x_0_325V 1
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#define SW1x_0_350V 2
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#define SW1x_0_375V 3
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#define SW1x_0_400V 4
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#define SW1x_0_425V 5
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#define SW1x_0_450V 6
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#define SW1x_0_475V 7
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#define SW1x_0_500V 8
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#define SW1x_0_525V 9
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#define SW1x_0_550V 10
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#define SW1x_0_575V 11
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#define SW1x_0_600V 12
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#define SW1x_0_625V 13
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#define SW1x_0_650V 14
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#define SW1x_0_675V 15
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#define SW1x_0_700V 16
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#define SW1x_0_725V 17
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#define SW1x_0_750V 18
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#define SW1x_0_775V 19
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#define SW1x_0_800V 20
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#define SW1x_0_825V 21
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#define SW1x_0_850V 22
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#define SW1x_0_875V 23
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#define SW1x_0_900V 24
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#define SW1x_0_925V 25
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#define SW1x_0_950V 26
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#define SW1x_0_975V 27
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#define SW1x_1_000V 28
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#define SW1x_1_025V 29
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#define SW1x_1_050V 30
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#define SW1x_1_075V 31
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#define SW1x_1_100V 32
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#define SW1x_1_125V 33
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#define SW1x_1_150V 34
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#define SW1x_1_175V 35
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#define SW1x_1_200V 36
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#define SW1x_1_225V 37
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#define SW1x_1_250V 38
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#define SW1x_1_275V 39
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#define SW1x_1_300V 40
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#define SW1x_1_325V 41
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#define SW1x_1_350V 42
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#define SW1x_1_375V 43
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#define SW1x_1_400V 44
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#define SW1x_1_425V 45
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#define SW1x_1_450V 46
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#define SW1x_1_475V 47
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#define SW1x_1_500V 48
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#define SW1x_1_525V 49
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#define SW1x_1_550V 50
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#define SW1x_1_575V 51
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#define SW1x_1_600V 52
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#define SW1x_1_625V 53
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#define SW1x_1_650V 54
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#define SW1x_1_675V 55
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#define SW1x_1_700V 56
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#define SW1x_1_725V 57
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#define SW1x_1_750V 58
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#define SW1x_1_775V 59
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#define SW1x_1_800V 60
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#define SW1x_1_825V 61
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#define SW1x_1_850V 62
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#define SW1x_1_875V 63
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#define SW1x_NORMAL_MASK 0x3f
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#define SW1x_STBY_MASK 0x3f
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#define SW1x_OFF_MASK 0x3f
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2015-08-07 08:43:45 +00:00
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#define SW_MODE_MASK 0xf
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#define SW_MODE_SHIFT 0
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2014-11-06 08:28:58 +00:00
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#define SW1xCONF_DVSSPEED_MASK 0xc0
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#define SW1xCONF_DVSSPEED_2US 0x00
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#define SW1xCONF_DVSSPEED_4US 0x40
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#define SW1xCONF_DVSSPEED_8US 0x80
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#define SW1xCONF_DVSSPEED_16US 0xc0
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2014-02-13 07:48:12 +00:00
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/*
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* LDO Configuration
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*/
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/* VGEN1/2 Voltage Configuration */
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#define LDOA_0_80V 0
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#define LDOA_0_85V 1
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#define LDOA_0_90V 2
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#define LDOA_0_95V 3
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#define LDOA_1_00V 4
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#define LDOA_1_05V 5
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#define LDOA_1_10V 6
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#define LDOA_1_15V 7
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#define LDOA_1_20V 8
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#define LDOA_1_25V 9
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#define LDOA_1_30V 10
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#define LDOA_1_35V 11
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#define LDOA_1_40V 12
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#define LDOA_1_45V 13
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#define LDOA_1_50V 14
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#define LDOA_1_55V 15
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/* VGEN3/4/5/6 Voltage Configuration */
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#define LDOB_1_80V 0
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#define LDOB_1_90V 1
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#define LDOB_2_00V 2
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#define LDOB_2_10V 3
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#define LDOB_2_20V 4
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#define LDOB_2_30V 5
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#define LDOB_2_40V 6
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#define LDOB_2_50V 7
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#define LDOB_2_60V 8
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#define LDOB_2_70V 9
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#define LDOB_2_80V 10
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#define LDOB_2_90V 11
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#define LDOB_3_00V 12
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#define LDOB_3_10V 13
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#define LDOB_3_20V 14
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#define LDOB_3_30V 15
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#define LDO_VOL_MASK 0xf
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2015-04-03 23:56:16 +00:00
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#define LDO_EN (1 << 4)
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2015-08-07 08:43:45 +00:00
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#define LDO_MODE_SHIFT 4
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#define LDO_MODE_MASK (1 << 4)
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#define LDO_MODE_OFF 0
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#define LDO_MODE_ON 1
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2014-02-13 07:48:12 +00:00
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2015-08-07 08:43:45 +00:00
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#define VREFDDRCON_EN (1 << 4)
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2014-02-13 07:48:12 +00:00
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/*
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* Boost Regulator
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*/
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/* SWBST Output Voltage */
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#define SWBST_5_00V 0
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#define SWBST_5_05V 1
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#define SWBST_5_10V 2
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#define SWBST_5_15V 3
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#define SWBST_VOL_MASK 0x3
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2015-08-07 08:43:41 +00:00
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#define SWBST_MODE_MASK 0xC
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2015-08-07 08:43:45 +00:00
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#define SWBST_MODE_SHIFT 0x2
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#define SWBST_MODE_OFF 0
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#define SWBST_MODE_PFM 1
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#define SWBST_MODE_AUTO 2
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#define SWBST_MODE_APS 3
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2014-02-13 07:48:12 +00:00
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2015-01-08 13:00:36 +00:00
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/*
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* Regulator Mode Control
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*
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* OFF: The regulator is switched off and the output voltage is discharged.
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* PFM: In this mode, the regulator is always in PFM mode, which is useful
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* at light loads for optimized efficiency.
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* PWM: In this mode, the regulator is always in PWM mode operation
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* regardless of load conditions.
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* APS: In this mode, the regulator moves automatically between pulse
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* skipping mode and PWM mode depending on load conditions.
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*
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* SWxMODE[3:0]
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* Normal Mode | Standby Mode | value
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* OFF OFF 0x0
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* PWM OFF 0x1
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* PFM OFF 0x3
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* APS OFF 0x4
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* PWM PWM 0x5
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* PWM APS 0x6
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* APS APS 0x8
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* APS PFM 0xc
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* PWM PFM 0xd
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*/
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#define OFF_OFF 0x0
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#define PWM_OFF 0x1
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#define PFM_OFF 0x3
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#define APS_OFF 0x4
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#define PWM_PWM 0x5
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#define PWM_APS 0x6
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#define APS_APS 0x8
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#define APS_PFM 0xc
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#define PWM_PFM 0xd
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2015-02-11 11:35:46 +00:00
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#define SWITCH_SIZE 0x7
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2014-04-23 04:53:56 +00:00
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int power_pfuze100_init(unsigned char bus);
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2014-02-13 07:48:12 +00:00
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#endif
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