2018-11-28 13:04:27 +00:00
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Overview
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--------
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The LX2160A Reference Design (RDB) is a high-performance computing,
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evaluation, and development platform that supports the QorIQ LX2160A
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Layerscape Architecture processor and its personalities.
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LX2160A SoC Overview
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--------------------------------------
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For details, please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc
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LX2160ARDB board Overview
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----------------------
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DDR Memory
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Two ports of 72-bits (8-bits ECC) DDR4.
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Each port supports four chip-selects and two DIMM
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connectors. Data rate upto 3.2 GT/s.
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SERDES ports
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Thress serdes controllers (24 lanes)
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Serdes1: Supports two USXGMII connectors, each connected through
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Aquantia AQR107 phy, two 25GbE SFP+ modules connected through an Inphi
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IN112525 phy and one 40 GbE QSFP+ module connected through an Inphi
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CS4223 phy.
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Serdes2: Supports one PCIe x4 (Gen1/2/3/4) connector, four SATA 3.0
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connectors
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Serdes3: Supports one PCIe x8 (Gen1/2/3/4) connector
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eSDHC
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eSDHC1: Supports a SD connector for connecting SD cards
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eSDHC2: Supports 128GB Micron MTFC128GAJAECE-IT eMMC
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Octal SPI (XSPI)
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Supports two 64 MB onbpard octal SPI flash memories, one SPI emulator
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for off-board emulation
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I2C All system devices on I2C1 multiplexed using PCA9547 multiplexer
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Serial Ports
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USB 3.0
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Two high speed USB 3.0 ports. First USB 3.0 port configured as
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Host with Type-A connector, second USB 3.0 port configured as OTG
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with micro-AB connector
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Serial Ports Two UART ports
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Ethernet Two RGMII interfaces
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Debug ARM JTAG support
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Booting Options
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---------------
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a) Flexspi boot
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b) SD boot
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Memory map for Flexspi flash
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----------------------------
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Image Flash Offset
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bl2_flexspi_nor.pbl (RCW+PBI+bl2.pbl) 0x00000000
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fip.bin (bl31 + bl33(u-boot) +
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header for Secure-boot(secure-boot only)) 0x00100000
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Boot firmware Environment 0x00500000
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DDR PHY Firmware (fip_ddr_all.bin) 0x00800000
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DPAA2 MC Firmware 0x00A00000
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DPAA2 DPL 0x00D00000
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DPAA2 DPC 0x00E00000
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Kernel.itb 0x01000000
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Memory map for sd card
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----------------------------
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Image SD card Offset
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bl2_sd.pbl (RCW+PBI+bl2.pbl) 0x00008
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fip.bin (bl31 + bl33(u-boot) +
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header for Secure-boot(secure-boot only)) 0x00800
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Boot firmware Environment 0x02800
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DDR PHY Firmware (fip_ddr_all.bin) 0x04000
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DPAA2 MC Firmware 0x05000
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DPAA2 DPL 0x06800
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DPAA2 DPC 0x07000
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Kernel.itb 0x08000
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2019-02-08 10:29:58 +00:00
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LX2160AQDS board Overview
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----------------------
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Various Mezzanine cards and their connection for different SERDES protocols is
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as below:
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SERDES1 |CARDS
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-----------------------------------------------------------------------
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1 |Mezzanine:X-M4-PCIE-SGMII (29733)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108)
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|Connect I/O cable to IO_SLOT1(J110)
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|Mezzanine:X-M4-PCIE-SGMII (29733)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT2 (J111)
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|Connect I/O cable to IO_SLOT2(J113)
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------------------------------------------------------------------------
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3 |Mezzanine:X-M11-USXGMII (29828)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108)
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|Connect I/O cable to IO_SLOT1(J110)
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|Mezzanine:X-M4-PCIE-SGMII (29733)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT2 (J111)
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|Connect I/O cable to IO_SLOT2(J113)
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------------------------------------------------------------------------
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7 |Mezzanine:X-M11-USXGMII (29828)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108)
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|Connect I/O cable to IO_SLOT1(J110)
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|Mezzanine:X-M4-PCIE-SGMII (29733)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT2 (J111)
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|Connect I/O cable to IO_SLOT2(J113)
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------------------------------------------------------------------------
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8 |Mezzanine:X-M12-XFI (29829)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108)
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|Connect I/O cable to IO_SLOT1(J110)
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|Mezzanine:X-M12-XFI (29829)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT2 (J111)
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|Connect I/O cable to IO_SLOT2(J113)
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------------------------------------------------------------------------
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13 |Mezzanine:X-M8-100G (29734)
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|Connect Hydra Cable (HDR-198816-XX-ECUE) to SD_SLOT1 (J108)
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|Connect I/O cable to IO_SLOT1(J110)
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|Mezzanine:X-M8-100G (29734)
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|Connect Hydra Cable (HDR-198816-XX-ECUE) to SD_SLOT2(J111)
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|Connect I/O cable to IO_SLOT2(J113)
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------------------------------------------------------------------------
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15 |Mezzanine:X-M8-100G (29734)
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|Connect Hydra Cable (HDR-198816-XX-ECUE) to SD_SLOT1 (J108)
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|Connect I/O cable to IO_SLOT1(J110)
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|Mezzanine:X-M4-PCIE-SGMII (29733)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT2 (J111)
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|Connect I/O cable to IO_SLOT2(J113)
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------------------------------------------------------------------------
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17 |Mezzanine:X-M13-25G (32133)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108)
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|Connect I/O cable to IO_SLOT1(J110)
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|Mezzanine:X-M4-PCIE-SGMII (29733)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT2 (J111)
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|Connect I/O cable to IO_SLOT2(J113)
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------------------------------------------------------------------------
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19 |Mezzanine:X-M11-USXGMII (29828), X-M13-25G (32133)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108)
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|Connect M11 I/O cable to IO_SLOT1(J110), M13 I/O cable to IO_SLOT6(J125)
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|Mezzanine:X-M7-40G (29738)
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|Connect Straight Cable (HDR-198816-XX-ECUE) to SD_SLOT2 (J111)
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|Connect I/O cable to IO_SLOT2(J113)
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------------------------------------------------------------------------
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20 |Mezzanine:X-M7-40G (29738)
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|Connect Straight Cable (HDR-198816-XX-ECUE) to SD_SLOT1 (J108)
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|Connect I/O cable to IO_SLOT1(J108)
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|Mezzanine:X-M7-40G (29738)
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|Connect Straight Cable (HDR-198816-XX-ECUE) to SD_SLOT2 (J111)
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|Connect I/O cable to IO_SLOT2(J113)
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------------------------------------------------------------------------
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SERDES2 |CARDS
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-----------------------------------------------------------------------
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2 |Mezzanine:X-M6-PCIE-X8 (29737) *
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114)
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|Connect Straight Cable (HDR-198816-XX-ECUE) to SD_SLOT4 (J117)
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|Connect I/O cable to IO_SLOT3(J116)
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------------------------------------------------------------------------
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3 |Mezzanine:X-M4-PCIE-SGMII (29733)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114)
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|Connect I/O cable to IO_SLOT3(J116)
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|Mezzanine:X-M4-PCIE-SGMII (29733)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT4 (J117)
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|Connect I/O cable to IO_SLOT4(J119)
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------------------------------------------------------------------------
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5 |Mezzanine:X-M4-PCIE-SGMII (29733)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114)
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|Connect I/O cable to IO_SLOT3(J116)
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|Mezzanine:X-M5-SATA (29687)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT4 (J117)
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|Connect I/O cable to IO_SLOT4(J119)
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------------------------------------------------------------------------
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11 |Mezzanine:X-M4-PCIE-SGMII (29733)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114)
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|Connect I/O cable to IO_SLOT7(J127)
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|Mezzanine:X-M4-PCIE-SGMII (29733)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT4 (J117)
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|Connect I/O cable to IO_SLOT8(J131)
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------------------------------------------------------------------------
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SERDES3 |CARDS
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-----------------------------------------------------------------------
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2 |Mezzanine:X-M6-PCIE-X8 (29737) *
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT5 (J120)
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|Connect Straight Cable (HDR-198816-XX-ECUE) to SD_SLOT6 (J123)
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|Connect I/O cable to IO_SLOT5(J122)
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-------------------------------------------------------------------------
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3 |Mezzanine:X-M4-PCIE-SGMII (29733)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT5 (J120)
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|Connect I/O cable to IO_SLOT5(J122)
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|Mezzanine:X-M4-PCIE-SGMII (29733)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT6 (J123)
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|Connect I/O cable to IO_SLOT6(J125)
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-------------------------------------------------------------------------
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2020-12-04 14:47:28 +00:00
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LX2162A SoC Overview
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--------------------------------------
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For details, please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc
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LX2162AQDS board Overview
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----------------------
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DDR Memory
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One ports of 72-bits (8-bits ECC) DDR4.
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Each port supports four chip-selects and two DIMM
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connectors. Data rate upto 2.9 GT/s.
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SERDES ports
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Two serdes controllers (12 lanes)
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Serdes1: Supports two USXGMII connectors, each connected through
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|
|
Aquantia AQR107 phy, two 25GbE SFP+ modules connected through an Inphi
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|
|
|
|
IN112525 phy and one 40 GbE QSFP+ module connected through an Inphi
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CS4223 phy.
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Serdes2: Supports two PCIe x4 (Gen3) and one PCIe x8 (Gen3) connector,
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four SATA 3.0 connectors
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eSDHC
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eSDHC1: Supports a SD connector for connecting SD cards
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eSDHC2: Supports 128GB Micron MTFC128GAJAECE-IT eMMC
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Octal SPI (XSPI)
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Supports two 64 MB onbpard octal SPI flash memories, one SPI emulator
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|
|
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|
for off-board emulation
|
|
|
|
|
|
|
|
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|
I2C All system devices on I2C1 multiplexed using PCA9547 multiplexer
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Serial Ports
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USB 3.0
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One high speed USB 3.0 ports. First USB 3.0 port configured as Host
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with Type-A connector, second USB 3.0 port configured as OTG with
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micro-AB connector
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Serial Ports Two UART ports
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|
Ethernet Two RGMII interfaces
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|
|
Debug ARM JTAG support
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|
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|
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|
Booting Options
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---------------
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a) Flexspi boot
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b) SD boot
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c) eMMC boot
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Memory map for Flexspi flash
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----------------------------
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Image Flash Offset
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bl2_flexspi_nor.pbl (RCW+PBI+bl2.pbl) 0x00000000
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fip.bin (bl31 + bl33(u-boot) +
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header for Secure-boot(secure-boot only)) 0x00100000
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Boot firmware Environment 0x00500000
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DDR PHY Firmware (fip_ddr_all.bin) 0x00800000
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DPAA2 MC Firmware 0x00A00000
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DPAA2 DPL 0x00D00000
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DPAA2 DPC 0x00E00000
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Kernel.itb 0x01000000
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Memory map for sd/eMMC card
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----------------------------
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Image SD/eMMC card Offset
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bl2_sd.pbl (RCW+PBI+bl2.pbl) 0x00008
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fip.bin (bl31 + bl33(u-boot) +
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header for Secure-boot(secure-boot only)) 0x00800
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Boot firmware Environment 0x02800
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DDR PHY Firmware (fip_ddr_all.bin) 0x04000
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DPAA2 MC Firmware 0x05000
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DPAA2 DPL 0x06800
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DPAA2 DPC 0x07000
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Kernel.itb 0x08000
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Various Mezzanine cards and their connection for different SERDES protocols is
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as below:
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SERDES1 |CARDS
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-----------------------------------------------------------------------
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1 |Mezzanine:X-M4-PCIE-SGMII (29733)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108)
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|Connect I/O cable to IO_SLOT1(J110)
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------------------------------------------------------------------------
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3 |Mezzanine:X-M11-USXGMII (29828)
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108)
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|Connect I/O cable to IO_SLOT1(J110)
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------------------------------------------------------------------------
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15 |Mezzanine:X-M8-50G (29734)
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|
|
|
|
|Connect Hydra Cable (HDR-198816-XX-ECUE) to SD_SLOT1 (J108)
|
|
|
|
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|Connect I/O cable to IO_SLOT1(J110)
|
|
|
|
|
------------------------------------------------------------------------
|
|
|
|
|
17 |Mezzanine:X-M13-25G (32133)
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|
|
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|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108)
|
|
|
|
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|Connect I/O cable to IO_SLOT1(J110)
|
|
|
|
|
------------------------------------------------------------------------
|
|
|
|
|
18 |Mezzanine:X-M11-USXGMII (29828), X-M13-25G (32133)
|
|
|
|
|
|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108)
|
|
|
|
|
|Connect M11 I/O cable to IO_SLOT1(J110), M13 I/O cable to IO_SLOT6(J125)
|
|
|
|
|
------------------------------------------------------------------------
|
|
|
|
|
20 |Mezzanine:X-M7-40G (29738)
|
|
|
|
|
|Connect Straight Cable (HDR-198816-XX-ECUE) to SD_SLOT1 (J108)
|
|
|
|
|
|Connect I/O cable to IO_SLOT1(J108)
|
|
|
|
|
------------------------------------------------------------------------
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
SERDES2 |CARDS
|
|
|
|
|
-----------------------------------------------------------------------
|
|
|
|
|
2 |Mezzanine:X-M6-PCIE-X8 (29737) *
|
|
|
|
|
|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114)
|
|
|
|
|
|Connect Straight Cable (HDR-198816-XX-ECUE) to SD_SLOT4 (J117)
|
|
|
|
|
|Connect I/O cable to IO_SLOT3(J116)
|
|
|
|
|
------------------------------------------------------------------------
|
|
|
|
|
3 |Mezzanine:X-M4-PCIE-SGMII (29733)
|
|
|
|
|
|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114)
|
|
|
|
|
|Connect I/O cable to IO_SLOT3(J116)
|
|
|
|
|
|Mezzanine:X-M4-PCIE-SGMII (29733)
|
|
|
|
|
|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT4 (J117)
|
|
|
|
|
|Connect I/O cable to IO_SLOT4(J119)
|
|
|
|
|
------------------------------------------------------------------------
|
|
|
|
|
5 |Mezzanine:X-M4-PCIE-SGMII (29733)
|
|
|
|
|
|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114)
|
|
|
|
|
|Connect I/O cable to IO_SLOT3(J116)
|
|
|
|
|
|Mezzanine:X-M5-SATA (29687)
|
|
|
|
|
|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT4 (J117)
|
|
|
|
|
|Connect I/O cable to IO_SLOT4(J119)
|
|
|
|
|
------------------------------------------------------------------------
|
|
|
|
|
11 |Mezzanine:X-M4-PCIE-SGMII (29733)
|
|
|
|
|
|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114)
|
|
|
|
|
|Connect I/O cable to IO_SLOT7(J127)
|
|
|
|
|
|Mezzanine:X-M4-PCIE-SGMII (29733)
|
|
|
|
|
|Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT4 (J117)
|
|
|
|
|
|Connect I/O cable to IO_SLOT8(J131)
|
|
|
|
|
------------------------------------------------------------------------
|
