u-boot/arch/x86/include/asm/arch-broadwell/rcb.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2016 Google, Inc
 */

#ifndef __asm_arch_rcba_h
#define __asm_arch_rcba_h

#define ACPIIRQEN	0x31e0	/* 32bit */

#define PMSYNC_CONFIG	0x33c4	/* 32bit */
#define PMSYNC_CONFIG2	0x33cc	/* 32bit */

#define DEEP_S3_POL	0x3328	/* 32bit */
#define  DEEP_S3_EN_AC		(1 << 0)
#define  DEEP_S3_EN_DC		(1 << 1)
#define DEEP_S5_POL	0x3330	/* 32bit */
#define  DEEP_S5_EN_AC		(1 << 14)
#define  DEEP_S5_EN_DC		(1 << 15)
#define DEEP_SX_CONFIG	0x3334	/* 32bit */
#define  DEEP_SX_WAKE_PIN_EN	(1 << 2)
#define  DEEP_SX_ACPRESENT_PD	(1 << 1)
#define  DEEP_SX_GP27_PIN_EN	(1 << 0)
#define PMSYNC_CONFIG	0x33c4	/* 32bit */
#define PMSYNC_CONFIG2	0x33cc	/* 32bit */

#define RC		0x3400	/* 32bit */
#define HPTC		0x3404	/* 32bit */
#define GCS		0x3410	/* 32bit */
#define BUC		0x3414	/* 32bit */
#define PCH_DISABLE_GBE		(1 << 5)
#define FD		0x3418	/* 32bit */
#define FDSW		0x3420	/* 8bit */
#define DISPBDF		0x3424  /* 16bit */
#define FD2		0x3428	/* 32bit */
#define CG		0x341c	/* 32bit */

/* Function Disable 1 RCBA 0x3418 */
#define PCH_DISABLE_ALWAYS	(1 << 0)
#define PCH_DISABLE_ADSPD	(1 << 1)
#define PCH_DISABLE_SATA1	(1 << 2)
#define PCH_DISABLE_SMBUS	(1 << 3)
#define PCH_DISABLE_HD_AUDIO	(1 << 4)
#define PCH_DISABLE_EHCI2	(1 << 13)
#define PCH_DISABLE_LPC		(1 << 14)
#define PCH_DISABLE_EHCI1	(1 << 15)
#define PCH_DISABLE_PCIE(x)	(1 << (16 + x))
#define PCH_DISABLE_THERMAL	(1 << 24)
#define PCH_DISABLE_SATA2	(1 << 25)
#define PCH_DISABLE_XHCI	(1 << 27)

/* Function Disable 2 RCBA 0x3428 */
#define PCH_DISABLE_KT		(1 << 4)
#define PCH_DISABLE_IDER	(1 << 3)
#define PCH_DISABLE_MEI2	(1 << 2)
#define PCH_DISABLE_MEI1	(1 << 1)
#define PCH_ENABLE_DBDF		(1 << 0)

#endif
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> 2018-05-06 21:58:06 +00:00			`/* SPDX-License-Identifier: GPL-2.0 */`
x86: Add basic support for broadwell This adds the broadwell architecture, with the CPU driver and some useful header files. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com> 2016-03-12 05:07:18 +00:00			`/*`
			`* Copyright (c) 2016 Google, Inc`
			`*/`

			`#ifndef __asm_arch_rcba_h`
			`#define __asm_arch_rcba_h`

x86: broadwell: Add support for the ADSP The Application Digital Signal Processor is used for sound processing with broadwell. Add a driver to support this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2019-02-17 03:25:01 +00:00			`#define ACPIIRQEN 0x31e0 /* 32bit */`

x86: Add basic support for broadwell This adds the broadwell architecture, with the CPU driver and some useful header files. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com> 2016-03-12 05:07:18 +00:00			`#define PMSYNC_CONFIG 0x33c4 /* 32bit */`
			`#define PMSYNC_CONFIG2 0x33cc /* 32bit */`

			`#define DEEP_S3_POL 0x3328 /* 32bit */`
			`#define DEEP_S3_EN_AC (1 << 0)`
			`#define DEEP_S3_EN_DC (1 << 1)`
			`#define DEEP_S5_POL 0x3330 /* 32bit */`
			`#define DEEP_S5_EN_AC (1 << 14)`
			`#define DEEP_S5_EN_DC (1 << 15)`
			`#define DEEP_SX_CONFIG 0x3334 /* 32bit */`
			`#define DEEP_SX_WAKE_PIN_EN (1 << 2)`
			`#define DEEP_SX_ACPRESENT_PD (1 << 1)`
			`#define DEEP_SX_GP27_PIN_EN (1 << 0)`
			`#define PMSYNC_CONFIG 0x33c4 /* 32bit */`
			`#define PMSYNC_CONFIG2 0x33cc /* 32bit */`

			`#define RC 0x3400 /* 32bit */`
			`#define HPTC 0x3404 /* 32bit */`
			`#define GCS 0x3410 /* 32bit */`
			`#define BUC 0x3414 /* 32bit */`
			`#define PCH_DISABLE_GBE (1 << 5)`
			`#define FD 0x3418 /* 32bit */`
			`#define FDSW 0x3420 /* 8bit */`
			`#define DISPBDF 0x3424 /* 16bit */`
			`#define FD2 0x3428 /* 32bit */`
			`#define CG 0x341c /* 32bit */`

			`/* Function Disable 1 RCBA 0x3418 */`
			`#define PCH_DISABLE_ALWAYS (1 << 0)`
			`#define PCH_DISABLE_ADSPD (1 << 1)`
			`#define PCH_DISABLE_SATA1 (1 << 2)`
			`#define PCH_DISABLE_SMBUS (1 << 3)`
			`#define PCH_DISABLE_HD_AUDIO (1 << 4)`
			`#define PCH_DISABLE_EHCI2 (1 << 13)`
			`#define PCH_DISABLE_LPC (1 << 14)`
			`#define PCH_DISABLE_EHCI1 (1 << 15)`
			`#define PCH_DISABLE_PCIE(x) (1 << (16 + x))`
			`#define PCH_DISABLE_THERMAL (1 << 24)`
			`#define PCH_DISABLE_SATA2 (1 << 25)`
			`#define PCH_DISABLE_XHCI (1 << 27)`

			`/* Function Disable 2 RCBA 0x3428 */`
			`#define PCH_DISABLE_KT (1 << 4)`
			`#define PCH_DISABLE_IDER (1 << 3)`
			`#define PCH_DISABLE_MEI2 (1 << 2)`
			`#define PCH_DISABLE_MEI1 (1 << 1)`
			`#define PCH_ENABLE_DBDF (1 << 0)`

			`#endif`