u-boot/drivers/Kconfig

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menu "Device Drivers"
source "drivers/core/Kconfig"
# types of drivers sorted in alphabetical order
dm: adc: add simple ADC uclass implementation This commit adds: - new uclass id: UCLASS_ADC - new uclass driver: drivers/adc/adc-uclass.c The new uclass's API allows for ADC operation on: * single-channel with channel selection by a number * multti-channel with channel selection by bit mask ADC uclass's functions: * single-channel: - adc_start_channel() - start channel conversion - adc_channel_data() - get conversion data - adc_channel_single_shot() - start/get conversion data * multi-channel: - adc_start_channels() - start selected channels conversion - adc_channels_data() - get conversion data - adc_channels_single_shot() - start/get conversion data for channels selected by bit mask * general: - adc_stop() - stop the conversion - adc_vdd_value() - positive reference Voltage value with polarity [uV] - adc_vss_value() - negative reference Voltage value with polarity [uV] - adc_data_mask() - conversion data bit mask The device tree can provide below constraints/properties: - vdd-polarity-negative: if true: Vdd = vdd-microvolts * (-1) - vss-polarity-negative: if true: Vss = vss-microvolts * (-1) - vdd-supply: phandle to Vdd regulator's node - vss-supply: phandle to Vss regulator's node And optional, checked only if the above corresponding, doesn't exist: - vdd-microvolts: positive reference Voltage [uV] - vss-microvolts: negative reference Voltage [uV] Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-10-27 12:08:00 +00:00
source "drivers/adc/Kconfig"
source "drivers/ata/Kconfig"
source "drivers/axi/Kconfig"
source "drivers/bus/Kconfig"
source "drivers/block/Kconfig"
source "drivers/bootcount/Kconfig"
source "drivers/button/Kconfig"
source "drivers/cache/Kconfig"
source "drivers/clk/Kconfig"
source "drivers/cpu/Kconfig"
source "drivers/crypto/Kconfig"
source "drivers/ddr/Kconfig"
source "drivers/demo/Kconfig"
source "drivers/board/Kconfig"
source "drivers/ddr/fsl/Kconfig"
source "drivers/dfu/Kconfig"
source "drivers/dma/Kconfig"
source "drivers/fastboot/Kconfig"
source "drivers/firmware/Kconfig"
source "drivers/fpga/Kconfig"
source "drivers/gpio/Kconfig"
source "drivers/hwspinlock/Kconfig"
source "drivers/i2c/Kconfig"
source "drivers/input/Kconfig"
source "drivers/led/Kconfig"
source "drivers/mailbox/Kconfig"
source "drivers/memory/Kconfig"
source "drivers/misc/Kconfig"
source "drivers/mmc/Kconfig"
source "drivers/mtd/Kconfig"
source "drivers/net/Kconfig"
source "drivers/nvme/Kconfig"
source "drivers/pci/Kconfig"
source "drivers/pci_endpoint/Kconfig"
source "drivers/pch/Kconfig"
source "drivers/phy/Kconfig"
source "drivers/phy/allwinner/Kconfig"
source "drivers/phy/marvell/Kconfig"
source "drivers/pinctrl/Kconfig"
source "drivers/power/Kconfig"
source "drivers/pwm/Kconfig"
source "drivers/qe/Kconfig"
source "drivers/ram/Kconfig"
drivers: Introduce a simplified remoteproc framework Many System on Chip(SoC) solutions are complex with multiple processors on the same die dedicated to either general purpose of specialized functions. Many examples do exist in today's SoCs from various vendors. Typical examples are micro controllers such as an ARM M3/M0 doing a offload of specific function such as event integration or power management or controlling camera etc. Traditionally, the responsibility of loading up such a processor with a firmware and communication has been with a High Level Operating System(HLOS) such as Linux. However, there exists classes of products where Linux would need to expect services from such a processor or the delay of Linux and operating system being able to load up such a firmware is unacceptable. To address these needs, we need some minimal capability to load such a system and ensure it is started prior to an Operating System(Linux or any other) is started up. NOTE: This is NOT meant to be a solve-all solution, instead, it tries to address certain class of SoCs and products that need such a solution. A very simple model is introduced here as part of the initial support that supports microcontrollers with internal memory (no MMU, no execution from external memory, or specific image format needs). This basic framework can then (hopefully) be extensible to other complex SoC processor support as need be. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-09-17 20:42:39 +00:00
source "drivers/remoteproc/Kconfig"
source "drivers/reset/Kconfig"
source "drivers/rng/Kconfig"
source "drivers/rtc/Kconfig"
source "drivers/scsi/Kconfig"
source "drivers/serial/Kconfig"
source "drivers/smem/Kconfig"
source "drivers/sound/Kconfig"
soc: ti: k3: add navss ringacc driver The Ring Accelerator (RINGACC or RA) provides hardware acceleration to enable straightforward passing of work between a producer and a consumer. There is one RINGACC module per NAVSS on TI AM65x SoCs. The RINGACC converts constant-address read and write accesses to equivalent read or write accesses to a circular data structure in memory. The RINGACC eliminates the need for each DMA controller which needs to access ring elements from having to know the current state of the ring (base address, current offset). The DMA controller performs a read or write access to a specific address range (which maps to the source interface on the RINGACC) and the RINGACC replaces the address for the transaction with a new address which corresponds to the head or tail element of the ring (head for reads, tail for writes). Since the RINGACC maintains the state, multiple DMA controllers or channels are allowed to coherently share the same rings as applicable. The RINGACC is able to place data which is destined towards software into cached memory directly. Supported ring modes: - Ring Mode - Messaging Mode - Credentials Mode - Queue Manager Mode TI-SCI integration: Texas Instrument's System Control Interface (TI-SCI) Message Protocol now has control over Ringacc module resources management (RM) and Rings configuration. The Ringacc driver manages Rings allocation by itself now and requests TI-SCI firmware to allocate and configure specific Rings only. It's done this way because, Linux driver implements two stage Rings allocation and configuration (allocate ring and configure ring) while TI-SCI Message Protocol supports only one combined operation (allocate+configure). Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com>
2019-02-05 12:01:22 +00:00
source "drivers/soc/Kconfig"
source "drivers/spi/Kconfig"
source "drivers/spmi/Kconfig"
source "drivers/sysreset/Kconfig"
source "drivers/tee/Kconfig"
source "drivers/thermal/Kconfig"
source "drivers/timer/Kconfig"
source "drivers/tpm/Kconfig"
source "drivers/usb/Kconfig"
source "drivers/ufs/Kconfig"
source "drivers/video/Kconfig"
source "drivers/virtio/Kconfig"
source "drivers/w1/Kconfig"
source "drivers/w1-eeprom/Kconfig"
source "drivers/watchdog/Kconfig"
config PHYS_TO_BUS
bool "Custom physical to bus address mapping"
help
Some SoCs use a different address map for CPU physical addresses and
peripheral DMA master accesses. If yours does, select this option in
your platform's Kconfig, and implement the appropriate mapping
functions in your platform's support code.
endmenu