2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2014-10-14 05:41:52 +00:00
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/*
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* Copyright (c) 2014 Google, Inc
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*/
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2020-10-15 15:18:17 +00:00
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#define LOG_CATEGORY UCLASS_SPI
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2014-10-14 05:41:52 +00:00
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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2020-05-10 17:40:05 +00:00
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#include <log.h>
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2014-10-14 05:41:52 +00:00
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#include <malloc.h>
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#include <spi.h>
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2021-03-17 11:31:30 +00:00
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#include <spi-mem.h>
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2020-10-15 15:18:17 +00:00
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#include <dm/device_compat.h>
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2020-10-31 03:38:53 +00:00
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#include <asm/global_data.h>
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2014-10-14 05:41:52 +00:00
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#include <dm/device-internal.h>
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#include <dm/uclass-internal.h>
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#include <dm/lists.h>
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#include <dm/util.h>
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DECLARE_GLOBAL_DATA_PTR;
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2018-10-30 20:09:48 +00:00
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#define SPI_DEFAULT_SPEED_HZ 100000
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2014-10-14 05:41:52 +00:00
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static int spi_set_speed_mode(struct udevice *bus, int speed, int mode)
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{
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struct dm_spi_ops *ops;
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int ret;
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ops = spi_get_ops(bus);
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if (ops->set_speed)
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ret = ops->set_speed(bus, speed);
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else
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ret = -EINVAL;
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if (ret) {
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2020-10-15 15:18:17 +00:00
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dev_err(bus, "Cannot set speed (err=%d)\n", ret);
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2014-10-14 05:41:52 +00:00
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return ret;
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}
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if (ops->set_mode)
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ret = ops->set_mode(bus, mode);
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else
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ret = -EINVAL;
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if (ret) {
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2020-10-15 15:18:17 +00:00
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dev_err(bus, "Cannot set mode (err=%d)\n", ret);
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2014-10-14 05:41:52 +00:00
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return ret;
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}
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return 0;
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}
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2016-05-03 02:02:22 +00:00
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int dm_spi_claim_bus(struct udevice *dev)
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2014-10-14 05:41:52 +00:00
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{
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struct udevice *bus = dev->parent;
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struct dm_spi_ops *ops = spi_get_ops(bus);
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2015-03-05 19:25:20 +00:00
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struct dm_spi_bus *spi = dev_get_uclass_priv(bus);
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2016-05-03 02:02:22 +00:00
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struct spi_slave *slave = dev_get_parent_priv(dev);
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2020-12-14 17:06:50 +00:00
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uint speed, mode;
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2014-10-14 05:41:52 +00:00
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speed = slave->max_hz;
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2020-12-14 17:06:50 +00:00
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mode = slave->mode;
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2014-10-14 05:41:52 +00:00
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if (spi->max_hz) {
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if (speed)
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2020-12-14 17:06:50 +00:00
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speed = min(speed, spi->max_hz);
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2014-10-14 05:41:52 +00:00
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else
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speed = spi->max_hz;
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}
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if (!speed)
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2018-10-30 20:09:48 +00:00
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speed = SPI_DEFAULT_SPEED_HZ;
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2020-12-14 17:06:50 +00:00
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if (speed != spi->speed || mode != spi->mode) {
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2018-01-15 10:08:41 +00:00
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int ret = spi_set_speed_mode(bus, speed, slave->mode);
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2015-02-17 22:29:35 +00:00
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if (ret)
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2018-10-01 18:22:24 +00:00
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return log_ret(ret);
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2020-12-14 17:06:50 +00:00
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spi->speed = speed;
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spi->mode = mode;
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2015-02-17 22:29:35 +00:00
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}
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2014-10-14 05:41:52 +00:00
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2018-10-01 18:22:24 +00:00
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return log_ret(ops->claim_bus ? ops->claim_bus(dev) : 0);
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2014-10-14 05:41:52 +00:00
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}
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2016-05-03 02:02:22 +00:00
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void dm_spi_release_bus(struct udevice *dev)
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2014-10-14 05:41:52 +00:00
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{
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struct udevice *bus = dev->parent;
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struct dm_spi_ops *ops = spi_get_ops(bus);
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if (ops->release_bus)
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2015-04-19 15:05:40 +00:00
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ops->release_bus(dev);
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2014-10-14 05:41:52 +00:00
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}
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2016-05-03 02:02:22 +00:00
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int dm_spi_xfer(struct udevice *dev, unsigned int bitlen,
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const void *dout, void *din, unsigned long flags)
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2014-10-14 05:41:52 +00:00
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{
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struct udevice *bus = dev->parent;
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2019-12-07 04:42:35 +00:00
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struct dm_spi_ops *ops = spi_get_ops(bus);
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2014-10-14 05:41:52 +00:00
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if (bus->uclass->uc_drv->id != UCLASS_SPI)
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return -EOPNOTSUPP;
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2019-12-07 04:42:35 +00:00
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if (!ops->xfer)
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return -ENOSYS;
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2014-10-14 05:41:52 +00:00
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2019-12-07 04:42:35 +00:00
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return ops->xfer(dev, bitlen, dout, din, flags);
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2016-05-03 02:02:22 +00:00
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}
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2019-10-21 03:31:47 +00:00
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int dm_spi_get_mmap(struct udevice *dev, ulong *map_basep, uint *map_sizep,
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uint *offsetp)
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{
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struct udevice *bus = dev->parent;
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struct dm_spi_ops *ops = spi_get_ops(bus);
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if (bus->uclass->uc_drv->id != UCLASS_SPI)
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return -EOPNOTSUPP;
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if (!ops->get_mmap)
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return -ENOSYS;
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return ops->get_mmap(dev, map_basep, map_sizep, offsetp);
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}
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2016-05-03 02:02:22 +00:00
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int spi_claim_bus(struct spi_slave *slave)
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{
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2018-10-01 18:22:24 +00:00
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return log_ret(dm_spi_claim_bus(slave->dev));
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2016-05-03 02:02:22 +00:00
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}
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void spi_release_bus(struct spi_slave *slave)
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{
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dm_spi_release_bus(slave->dev);
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}
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int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
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const void *dout, void *din, unsigned long flags)
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{
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return dm_spi_xfer(slave->dev, bitlen, dout, din, flags);
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2014-10-14 05:41:52 +00:00
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}
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2019-07-22 11:52:56 +00:00
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int spi_write_then_read(struct spi_slave *slave, const u8 *opcode,
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size_t n_opcode, const u8 *txbuf, u8 *rxbuf,
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size_t n_buf)
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{
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unsigned long flags = SPI_XFER_BEGIN;
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int ret;
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if (n_buf == 0)
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flags |= SPI_XFER_END;
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ret = spi_xfer(slave, n_opcode * 8, opcode, NULL, flags);
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if (ret) {
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2020-10-15 15:18:17 +00:00
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dev_dbg(slave->dev,
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"spi: failed to send command (%zu bytes): %d\n",
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n_opcode, ret);
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2019-07-22 11:52:56 +00:00
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} else if (n_buf != 0) {
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ret = spi_xfer(slave, n_buf * 8, txbuf, rxbuf, SPI_XFER_END);
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if (ret)
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2020-10-15 15:18:17 +00:00
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dev_dbg(slave->dev,
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"spi: failed to transfer %zu bytes of data: %d\n",
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n_buf, ret);
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2019-07-22 11:52:56 +00:00
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}
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return ret;
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}
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2021-08-07 13:24:04 +00:00
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#if CONFIG_IS_ENABLED(OF_REAL)
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2015-06-23 21:39:05 +00:00
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static int spi_child_post_bind(struct udevice *dev)
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2014-10-14 05:41:52 +00:00
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{
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2020-12-03 23:55:23 +00:00
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struct dm_spi_slave_plat *plat = dev_get_parent_plat(dev);
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2014-10-14 05:41:52 +00:00
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2020-12-19 17:40:13 +00:00
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if (!dev_has_ofnode(dev))
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2015-01-25 15:27:12 +00:00
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return 0;
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2020-12-03 23:55:21 +00:00
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return spi_slave_of_to_plat(dev, plat);
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2015-01-25 15:27:12 +00:00
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}
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2016-11-13 21:22:01 +00:00
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#endif
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2015-01-25 15:27:12 +00:00
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2015-06-23 21:39:05 +00:00
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static int spi_post_probe(struct udevice *bus)
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2015-01-25 15:27:12 +00:00
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{
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2021-08-07 13:24:06 +00:00
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if (CONFIG_IS_ENABLED(OF_REAL)) {
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struct dm_spi_bus *spi = dev_get_uclass_priv(bus);
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2015-01-25 15:27:12 +00:00
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2021-08-07 13:24:06 +00:00
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spi->max_hz = dev_read_u32_default(bus, "spi-max-frequency", 0);
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}
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2015-10-27 12:36:42 +00:00
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#if defined(CONFIG_NEEDS_MANUAL_RELOC)
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struct dm_spi_ops *ops = spi_get_ops(bus);
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2019-09-17 06:11:02 +00:00
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static int reloc_done;
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if (!reloc_done) {
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if (ops->claim_bus)
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ops->claim_bus += gd->reloc_off;
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if (ops->release_bus)
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ops->release_bus += gd->reloc_off;
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if (ops->set_wordlen)
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ops->set_wordlen += gd->reloc_off;
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if (ops->xfer)
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ops->xfer += gd->reloc_off;
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if (ops->set_speed)
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ops->set_speed += gd->reloc_off;
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if (ops->set_mode)
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ops->set_mode += gd->reloc_off;
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if (ops->cs_info)
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ops->cs_info += gd->reloc_off;
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2021-03-17 11:31:30 +00:00
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if (ops->mem_ops) {
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struct spi_controller_mem_ops *mem_ops =
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(struct spi_controller_mem_ops *)ops->mem_ops;
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if (mem_ops->adjust_op_size)
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mem_ops->adjust_op_size += gd->reloc_off;
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if (mem_ops->supports_op)
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mem_ops->supports_op += gd->reloc_off;
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if (mem_ops->exec_op)
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mem_ops->exec_op += gd->reloc_off;
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}
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2019-09-17 06:11:02 +00:00
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reloc_done++;
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}
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2015-10-27 12:36:42 +00:00
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#endif
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2014-10-14 05:41:52 +00:00
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return 0;
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}
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2015-06-23 21:39:05 +00:00
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static int spi_child_pre_probe(struct udevice *dev)
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2015-01-25 15:27:11 +00:00
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{
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2020-12-03 23:55:23 +00:00
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struct dm_spi_slave_plat *plat = dev_get_parent_plat(dev);
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2015-09-29 05:32:01 +00:00
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struct spi_slave *slave = dev_get_parent_priv(dev);
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2015-01-25 15:27:11 +00:00
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2015-01-25 15:27:12 +00:00
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/*
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* This is needed because we pass struct spi_slave around the place
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* instead slave->dev (a struct udevice). So we have to have some
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* way to access the slave udevice given struct spi_slave. Once we
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* change the SPI API to use udevice instead of spi_slave, we can
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* drop this.
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*/
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2015-01-25 15:27:11 +00:00
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slave->dev = dev;
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2015-01-25 15:27:12 +00:00
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slave->max_hz = plat->max_hz;
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slave->mode = plat->mode;
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2016-01-17 10:56:48 +00:00
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slave->wordlen = SPI_DEFAULT_WORDLEN;
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2015-01-25 15:27:12 +00:00
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2015-01-25 15:27:11 +00:00
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return 0;
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}
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2014-10-14 05:41:52 +00:00
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int spi_chip_select(struct udevice *dev)
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{
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2020-12-03 23:55:23 +00:00
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struct dm_spi_slave_plat *plat = dev_get_parent_plat(dev);
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2014-10-14 05:41:52 +00:00
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2015-01-25 15:27:12 +00:00
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return plat ? plat->cs : -ENOENT;
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2014-10-14 05:41:52 +00:00
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}
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2014-11-11 17:46:22 +00:00
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int spi_find_chip_select(struct udevice *bus, int cs, struct udevice **devp)
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2014-10-14 05:41:52 +00:00
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{
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2019-09-09 13:00:02 +00:00
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struct dm_spi_ops *ops;
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struct spi_cs_info info;
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2014-10-14 05:41:52 +00:00
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struct udevice *dev;
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2019-09-09 13:00:02 +00:00
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int ret;
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/*
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* Ask the driver. For the moment we don't have CS info.
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* When we do we could provide the driver with a helper function
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* to figure out what chip selects are valid, or just handle the
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* request.
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*/
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ops = spi_get_ops(bus);
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if (ops->cs_info) {
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ret = ops->cs_info(bus, cs, &info);
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} else {
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/*
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* We could assume there is at least one valid chip select.
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* The driver didn't care enough to tell us.
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*/
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ret = 0;
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}
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if (ret) {
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2020-10-15 15:18:17 +00:00
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dev_err(bus, "Invalid cs %d (err=%d)\n", cs, ret);
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2019-09-09 13:00:02 +00:00
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return ret;
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}
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2014-10-14 05:41:52 +00:00
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for (device_find_first_child(bus, &dev); dev;
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device_find_next_child(&dev)) {
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2020-12-03 23:55:23 +00:00
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struct dm_spi_slave_plat *plat;
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2014-10-14 05:41:52 +00:00
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2020-12-03 23:55:18 +00:00
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plat = dev_get_parent_plat(dev);
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2020-10-15 15:18:17 +00:00
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dev_dbg(bus, "%s: plat=%p, cs=%d\n", __func__, plat, plat->cs);
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2015-01-25 15:27:12 +00:00
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if (plat->cs == cs) {
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2014-10-14 05:41:52 +00:00
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*devp = dev;
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return 0;
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}
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}
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return -ENODEV;
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}
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int spi_cs_is_valid(unsigned int busnum, unsigned int cs)
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{
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struct spi_cs_info info;
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struct udevice *bus;
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int ret;
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2020-12-17 04:20:29 +00:00
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|
|
ret = uclass_find_device_by_seq(UCLASS_SPI, busnum, &bus);
|
2014-10-14 05:41:52 +00:00
|
|
|
if (ret) {
|
2020-10-15 15:18:17 +00:00
|
|
|
log_debug("%s: No bus %d\n", __func__, busnum);
|
2014-10-14 05:41:52 +00:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return spi_cs_info(bus, cs, &info);
|
|
|
|
}
|
|
|
|
|
|
|
|
int spi_cs_info(struct udevice *bus, uint cs, struct spi_cs_info *info)
|
|
|
|
{
|
|
|
|
struct spi_cs_info local_info;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (!info)
|
|
|
|
info = &local_info;
|
|
|
|
|
|
|
|
/* If there is a device attached, return it */
|
|
|
|
info->dev = NULL;
|
|
|
|
ret = spi_find_chip_select(bus, cs, &info->dev);
|
2019-09-09 13:00:02 +00:00
|
|
|
return ret == -ENODEV ? 0 : ret;
|
2014-10-14 05:41:52 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp,
|
|
|
|
struct udevice **devp)
|
|
|
|
{
|
|
|
|
struct udevice *bus, *dev;
|
|
|
|
int ret;
|
|
|
|
|
2020-12-17 04:20:29 +00:00
|
|
|
ret = uclass_find_device_by_seq(UCLASS_SPI, busnum, &bus);
|
2014-10-14 05:41:52 +00:00
|
|
|
if (ret) {
|
2020-10-15 15:18:17 +00:00
|
|
|
log_debug("%s: No bus %d\n", __func__, busnum);
|
2014-10-14 05:41:52 +00:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
ret = spi_find_chip_select(bus, cs, &dev);
|
|
|
|
if (ret) {
|
2020-10-15 15:18:17 +00:00
|
|
|
dev_dbg(bus, "%s: No cs %d\n", __func__, cs);
|
2014-10-14 05:41:52 +00:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
*busp = bus;
|
|
|
|
*devp = dev;
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode,
|
|
|
|
const char *drv_name, const char *dev_name,
|
|
|
|
struct udevice **busp, struct spi_slave **devp)
|
|
|
|
{
|
|
|
|
struct udevice *bus, *dev;
|
2020-12-03 23:55:23 +00:00
|
|
|
struct dm_spi_slave_plat *plat;
|
2020-12-14 17:06:50 +00:00
|
|
|
struct dm_spi_bus *bus_data;
|
2019-11-21 04:38:47 +00:00
|
|
|
struct spi_slave *slave;
|
2014-10-14 05:41:52 +00:00
|
|
|
bool created = false;
|
|
|
|
int ret;
|
|
|
|
|
2019-09-06 11:51:19 +00:00
|
|
|
#if CONFIG_IS_ENABLED(OF_PLATDATA)
|
2016-11-13 21:22:01 +00:00
|
|
|
ret = uclass_first_device_err(UCLASS_SPI, &bus);
|
|
|
|
#else
|
2014-10-14 05:41:52 +00:00
|
|
|
ret = uclass_get_device_by_seq(UCLASS_SPI, busnum, &bus);
|
2016-11-13 21:22:01 +00:00
|
|
|
#endif
|
2014-10-14 05:41:52 +00:00
|
|
|
if (ret) {
|
2020-10-15 15:18:17 +00:00
|
|
|
log_err("Invalid bus %d (err=%d)\n", busnum, ret);
|
2014-10-14 05:41:52 +00:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
ret = spi_find_chip_select(bus, cs, &dev);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If there is no such device, create one automatically. This means
|
|
|
|
* that we don't need a device tree node or platform data for the
|
|
|
|
* SPI flash chip - we will bind to the correct driver.
|
|
|
|
*/
|
|
|
|
if (ret == -ENODEV && drv_name) {
|
2020-10-15 15:18:17 +00:00
|
|
|
dev_dbg(bus, "%s: Binding new device '%s', busnum=%d, cs=%d, driver=%s\n",
|
|
|
|
__func__, dev_name, busnum, cs, drv_name);
|
2014-11-11 17:46:23 +00:00
|
|
|
ret = device_bind_driver(bus, drv_name, dev_name, &dev);
|
2016-11-13 21:22:05 +00:00
|
|
|
if (ret) {
|
2020-10-15 15:18:17 +00:00
|
|
|
dev_dbg(bus, "%s: Unable to bind driver (ret=%d)\n",
|
|
|
|
__func__, ret);
|
2014-10-14 05:41:52 +00:00
|
|
|
return ret;
|
2016-11-13 21:22:05 +00:00
|
|
|
}
|
2020-12-03 23:55:18 +00:00
|
|
|
plat = dev_get_parent_plat(dev);
|
2015-01-25 15:27:12 +00:00
|
|
|
plat->cs = cs;
|
2018-10-30 20:09:48 +00:00
|
|
|
if (speed) {
|
|
|
|
plat->max_hz = speed;
|
|
|
|
} else {
|
2020-10-15 15:18:17 +00:00
|
|
|
dev_warn(bus,
|
|
|
|
"Warning: SPI speed fallback to %u kHz\n",
|
|
|
|
SPI_DEFAULT_SPEED_HZ / 1000);
|
2018-10-30 20:09:48 +00:00
|
|
|
plat->max_hz = SPI_DEFAULT_SPEED_HZ;
|
|
|
|
}
|
2015-01-25 15:27:12 +00:00
|
|
|
plat->mode = mode;
|
2014-10-14 05:41:52 +00:00
|
|
|
created = true;
|
|
|
|
} else if (ret) {
|
2020-10-15 15:18:17 +00:00
|
|
|
dev_err(bus, "Invalid chip select %d:%d (err=%d)\n", busnum, cs, ret);
|
2014-10-14 05:41:52 +00:00
|
|
|
return ret;
|
2021-06-10 12:00:00 +00:00
|
|
|
} else if (dev) {
|
|
|
|
plat = dev_get_parent_plat(dev);
|
2014-10-14 05:41:52 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if (!device_active(dev)) {
|
2015-01-25 15:27:12 +00:00
|
|
|
struct spi_slave *slave;
|
2014-10-14 05:41:52 +00:00
|
|
|
|
2015-01-25 15:27:12 +00:00
|
|
|
ret = device_probe(dev);
|
2014-10-14 05:41:52 +00:00
|
|
|
if (ret)
|
|
|
|
goto err;
|
2015-09-29 05:32:01 +00:00
|
|
|
slave = dev_get_parent_priv(dev);
|
2014-10-14 05:41:52 +00:00
|
|
|
slave->dev = dev;
|
|
|
|
}
|
|
|
|
|
2019-11-21 04:38:47 +00:00
|
|
|
slave = dev_get_parent_priv(dev);
|
2020-12-14 17:06:50 +00:00
|
|
|
bus_data = dev_get_uclass_priv(bus);
|
2019-02-27 14:36:44 +00:00
|
|
|
|
2019-11-21 04:38:47 +00:00
|
|
|
/*
|
|
|
|
* In case the operation speed is not yet established by
|
|
|
|
* dm_spi_claim_bus() ensure the bus is configured properly.
|
|
|
|
*/
|
2020-12-14 17:06:50 +00:00
|
|
|
if (!bus_data->speed) {
|
2019-11-21 04:38:47 +00:00
|
|
|
ret = spi_claim_bus(slave);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
2016-07-06 04:34:28 +00:00
|
|
|
}
|
2014-10-14 05:41:52 +00:00
|
|
|
|
2021-06-10 12:00:00 +00:00
|
|
|
/* In case bus frequency or mode changed, update it. */
|
|
|
|
if ((speed && bus_data->speed && bus_data->speed != speed) ||
|
|
|
|
(plat && plat->mode != mode)) {
|
|
|
|
ret = spi_set_speed_mode(bus, speed, mode);
|
|
|
|
if (ret)
|
|
|
|
goto err_speed_mode;
|
|
|
|
}
|
|
|
|
|
2014-10-14 05:41:52 +00:00
|
|
|
*busp = bus;
|
2019-11-21 04:38:47 +00:00
|
|
|
*devp = slave;
|
2020-10-15 15:18:17 +00:00
|
|
|
log_debug("%s: bus=%p, slave=%p\n", __func__, bus, *devp);
|
2014-10-14 05:41:52 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
2021-06-10 12:00:00 +00:00
|
|
|
err_speed_mode:
|
|
|
|
spi_release_bus(slave);
|
2014-10-14 05:41:52 +00:00
|
|
|
err:
|
2020-10-15 15:18:17 +00:00
|
|
|
log_debug("%s: Error path, created=%d, device '%s'\n", __func__,
|
|
|
|
created, dev->name);
|
2014-10-14 05:41:52 +00:00
|
|
|
if (created) {
|
2017-03-20 11:51:48 +00:00
|
|
|
device_remove(dev, DM_REMOVE_NORMAL);
|
2014-10-14 05:41:52 +00:00
|
|
|
device_unbind(dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Compatibility function - to be removed */
|
|
|
|
struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs,
|
|
|
|
unsigned int speed, unsigned int mode)
|
|
|
|
{
|
|
|
|
struct spi_slave *slave;
|
|
|
|
struct udevice *dev;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = spi_get_bus_and_cs(busnum, cs, speed, mode, NULL, 0, &dev,
|
2017-05-19 02:09:54 +00:00
|
|
|
&slave);
|
2014-10-14 05:41:52 +00:00
|
|
|
if (ret)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
return slave;
|
|
|
|
}
|
|
|
|
|
|
|
|
void spi_free_slave(struct spi_slave *slave)
|
|
|
|
{
|
2017-03-20 11:51:48 +00:00
|
|
|
device_remove(slave->dev, DM_REMOVE_NORMAL);
|
2014-10-14 05:41:52 +00:00
|
|
|
}
|
|
|
|
|
2020-12-03 23:55:23 +00:00
|
|
|
int spi_slave_of_to_plat(struct udevice *dev, struct dm_spi_slave_plat *plat)
|
2014-10-14 05:41:52 +00:00
|
|
|
{
|
2016-08-08 11:42:12 +00:00
|
|
|
int mode = 0;
|
2015-12-23 15:09:37 +00:00
|
|
|
int value;
|
2014-10-14 05:41:52 +00:00
|
|
|
|
2017-05-19 02:09:54 +00:00
|
|
|
plat->cs = dev_read_u32_default(dev, "reg", -1);
|
2018-10-30 20:09:48 +00:00
|
|
|
plat->max_hz = dev_read_u32_default(dev, "spi-max-frequency",
|
|
|
|
SPI_DEFAULT_SPEED_HZ);
|
2017-05-19 02:09:54 +00:00
|
|
|
if (dev_read_bool(dev, "spi-cpol"))
|
2014-10-14 05:41:52 +00:00
|
|
|
mode |= SPI_CPOL;
|
2017-05-19 02:09:54 +00:00
|
|
|
if (dev_read_bool(dev, "spi-cpha"))
|
2014-10-14 05:41:52 +00:00
|
|
|
mode |= SPI_CPHA;
|
2017-05-19 02:09:54 +00:00
|
|
|
if (dev_read_bool(dev, "spi-cs-high"))
|
2014-10-14 05:41:52 +00:00
|
|
|
mode |= SPI_CS_HIGH;
|
2017-05-19 02:09:54 +00:00
|
|
|
if (dev_read_bool(dev, "spi-3wire"))
|
2015-12-03 16:49:05 +00:00
|
|
|
mode |= SPI_3WIRE;
|
2017-05-19 02:09:54 +00:00
|
|
|
if (dev_read_bool(dev, "spi-half-duplex"))
|
2014-10-14 05:41:52 +00:00
|
|
|
mode |= SPI_PREAMBLE;
|
2015-12-23 15:09:37 +00:00
|
|
|
|
|
|
|
/* Device DUAL/QUAD mode */
|
2017-05-19 02:09:54 +00:00
|
|
|
value = dev_read_u32_default(dev, "spi-tx-bus-width", 1);
|
2015-12-23 15:09:37 +00:00
|
|
|
switch (value) {
|
|
|
|
case 1:
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
mode |= SPI_TX_DUAL;
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
mode |= SPI_TX_QUAD;
|
|
|
|
break;
|
2019-12-05 10:16:05 +00:00
|
|
|
case 8:
|
|
|
|
mode |= SPI_TX_OCTAL;
|
|
|
|
break;
|
2015-12-23 15:09:37 +00:00
|
|
|
default:
|
2016-11-30 03:00:13 +00:00
|
|
|
warn_non_spl("spi-tx-bus-width %d not supported\n", value);
|
2015-12-23 15:09:37 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2017-05-19 02:09:54 +00:00
|
|
|
value = dev_read_u32_default(dev, "spi-rx-bus-width", 1);
|
2015-12-23 15:09:37 +00:00
|
|
|
switch (value) {
|
|
|
|
case 1:
|
|
|
|
break;
|
|
|
|
case 2:
|
2016-08-08 11:42:12 +00:00
|
|
|
mode |= SPI_RX_DUAL;
|
2015-12-23 15:09:37 +00:00
|
|
|
break;
|
|
|
|
case 4:
|
2016-08-08 11:42:12 +00:00
|
|
|
mode |= SPI_RX_QUAD;
|
2015-12-23 15:09:37 +00:00
|
|
|
break;
|
2019-12-05 10:16:05 +00:00
|
|
|
case 8:
|
|
|
|
mode |= SPI_RX_OCTAL;
|
|
|
|
break;
|
2015-12-23 15:09:37 +00:00
|
|
|
default:
|
2016-11-30 03:00:13 +00:00
|
|
|
warn_non_spl("spi-rx-bus-width %d not supported\n", value);
|
2015-12-23 15:09:37 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2016-08-08 11:42:12 +00:00
|
|
|
plat->mode = mode;
|
2015-12-23 15:09:37 +00:00
|
|
|
|
2014-10-14 05:41:52 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
UCLASS_DRIVER(spi) = {
|
|
|
|
.id = UCLASS_SPI,
|
|
|
|
.name = "spi",
|
2015-01-25 15:27:05 +00:00
|
|
|
.flags = DM_UC_FLAG_SEQ_ALIAS,
|
2021-08-07 13:24:03 +00:00
|
|
|
#if CONFIG_IS_ENABLED(OF_REAL)
|
2016-07-05 23:10:10 +00:00
|
|
|
.post_bind = dm_scan_fdt_dev,
|
2016-11-13 21:22:01 +00:00
|
|
|
#endif
|
2014-10-14 05:41:52 +00:00
|
|
|
.post_probe = spi_post_probe,
|
2015-01-25 15:27:11 +00:00
|
|
|
.child_pre_probe = spi_child_pre_probe,
|
2020-12-03 23:55:17 +00:00
|
|
|
.per_device_auto = sizeof(struct dm_spi_bus),
|
|
|
|
.per_child_auto = sizeof(struct spi_slave),
|
2020-12-03 23:55:23 +00:00
|
|
|
.per_child_plat_auto = sizeof(struct dm_spi_slave_plat),
|
2021-08-07 13:24:04 +00:00
|
|
|
#if CONFIG_IS_ENABLED(OF_REAL)
|
2015-01-25 15:27:12 +00:00
|
|
|
.child_post_bind = spi_child_post_bind,
|
2016-11-13 21:22:01 +00:00
|
|
|
#endif
|
2014-10-14 05:41:52 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
UCLASS_DRIVER(spi_generic) = {
|
|
|
|
.id = UCLASS_SPI_GENERIC,
|
|
|
|
.name = "spi_generic",
|
|
|
|
};
|
|
|
|
|
|
|
|
U_BOOT_DRIVER(spi_generic_drv) = {
|
|
|
|
.name = "spi_generic_drv",
|
|
|
|
.id = UCLASS_SPI_GENERIC,
|
|
|
|
};
|