2022-01-25 15:26:37 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Board specific initialization for J721S2 EVM
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*
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* Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/
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* David Huang <d-huang@ti.com>
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*
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*/
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#include <common.h>
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#include <env.h>
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#include <fdt_support.h>
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#include <generic-phy.h>
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#include <image.h>
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#include <init.h>
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#include <log.h>
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#include <net.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/hardware.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <spl.h>
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#include <asm/arch/sys_proto.h>
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#include <dm.h>
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#include <dm/uclass-internal.h>
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2023-01-10 15:47:54 +00:00
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#include <dm/root.h>
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2022-01-25 15:26:37 +00:00
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#include "../common/board_detect.h"
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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return 0;
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}
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int dram_init(void)
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{
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#ifdef CONFIG_PHYS_64BIT
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gd->ram_size = 0x100000000;
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#else
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gd->ram_size = 0x80000000;
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#endif
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return 0;
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}
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2022-09-09 15:32:40 +00:00
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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2022-01-25 15:26:37 +00:00
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{
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#ifdef CONFIG_PHYS_64BIT
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/* Limit RAM used by U-Boot to the DDR low region */
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if (gd->ram_top > 0x100000000)
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return 0x100000000;
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#endif
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return gd->ram_top;
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}
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int dram_init_banksize(void)
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{
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/* Bank 0 declares the memory available in the DDR low region */
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2022-11-16 18:10:37 +00:00
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gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
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2022-01-25 15:26:37 +00:00
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gd->bd->bi_dram[0].size = 0x7fffffff;
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gd->ram_size = 0x80000000;
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#ifdef CONFIG_PHYS_64BIT
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/* Bank 1 declares the memory available in the DDR high region */
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2022-11-16 18:10:37 +00:00
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gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1;
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2022-01-25 15:26:37 +00:00
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gd->bd->bi_dram[1].size = 0x37fffffff;
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gd->ram_size = 0x400000000;
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#endif
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return 0;
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}
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#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
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int ft_board_setup(void *blob, struct bd_info *bd)
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{
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int ret;
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ret = fdt_fixup_msmc_ram(blob, "/bus@100000", "sram@70000000");
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if (ret < 0)
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ret = fdt_fixup_msmc_ram(blob, "/interconnect@100000",
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"sram@70000000");
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if (ret)
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printf("%s: fixing up msmc ram failed %d\n", __func__, ret);
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return ret;
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}
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#endif
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#ifdef CONFIG_TI_I2C_BOARD_DETECT
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2023-01-10 15:47:50 +00:00
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/*
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* Functions specific to EVM and SK designs of J721S2/AM68 family.
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*/
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#define board_is_j721s2_som() board_ti_k3_is("J721S2X-PM1-SOM")
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#define board_is_am68_sk_som() board_ti_k3_is("AM68-SK-SOM")
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2022-01-25 15:26:37 +00:00
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int do_board_detect(void)
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{
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int ret;
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2023-01-10 15:47:52 +00:00
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if (board_ti_was_eeprom_read())
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return 0;
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2022-01-25 15:26:37 +00:00
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ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
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CONFIG_EEPROM_CHIP_ADDRESS);
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2023-01-10 15:47:51 +00:00
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if (ret) {
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printf("EEPROM not available at 0x%02x, trying to read at 0x%02x\n",
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CONFIG_EEPROM_CHIP_ADDRESS, CONFIG_EEPROM_CHIP_ADDRESS + 1);
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ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
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CONFIG_EEPROM_CHIP_ADDRESS + 1);
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if (ret)
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pr_err("Reading on-board EEPROM at 0x%02x failed %d\n",
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CONFIG_EEPROM_CHIP_ADDRESS + 1, ret);
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}
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2022-01-25 15:26:37 +00:00
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return ret;
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}
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int checkboard(void)
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{
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struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
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if (do_board_detect())
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/* EEPROM not populated */
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printf("Board: %s rev %s\n", "J721S2X-PM1-SOM", "E1");
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else
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printf("Board: %s rev %s\n", ep->name, ep->version);
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return 0;
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}
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static void setup_board_eeprom_env(void)
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{
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char *name = "j721s2";
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if (do_board_detect())
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goto invalid_eeprom;
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if (board_is_j721s2_som())
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name = "j721s2";
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2023-01-10 15:47:50 +00:00
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else if (board_is_am68_sk_som())
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name = "am68-sk";
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2022-01-25 15:26:37 +00:00
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else
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printf("Unidentified board claims %s in eeprom header\n",
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board_ti_get_name());
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invalid_eeprom:
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set_board_info_env_am6(name);
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}
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static void setup_serial(void)
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{
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struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
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unsigned long board_serial;
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char *endp;
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char serial_string[17] = { 0 };
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if (env_get("serial#"))
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return;
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board_serial = simple_strtoul(ep->serial, &endp, 16);
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if (*endp != '\0') {
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pr_err("Error: Can't set serial# to %s\n", ep->serial);
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return;
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}
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snprintf(serial_string, sizeof(serial_string), "%016lx", board_serial);
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env_set("serial#", serial_string);
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}
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#endif
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2023-01-10 15:47:52 +00:00
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/*
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* This function chooses the right dtb based on the board name read from
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* EEPROM if the EEPROM is programmed. Also, by default the boot chooses
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* the EVM DTB if there is no EEPROM is programmed or not detected.
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*/
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#ifdef CONFIG_SPL_LOAD_FIT
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int board_fit_config_name_match(const char *name)
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{
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bool eeprom_read = board_ti_was_eeprom_read();
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if (!eeprom_read || board_is_j721s2_som()) {
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if (!strcmp(name, "k3-j721s2-common-proc-board"))
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return 0;
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} else if (!eeprom_read || board_is_am68_sk_som()) {
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if (!strcmp(name, "k3-am68-sk-base-board"))
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return 0;
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}
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return -1;
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}
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#endif
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2022-01-25 15:26:37 +00:00
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int board_late_init(void)
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{
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if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) {
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setup_board_eeprom_env();
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setup_serial();
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}
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return 0;
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}
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void spl_board_init(void)
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{
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}
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2023-01-10 15:47:54 +00:00
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/* Support for the various EVM / SK families */
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#if defined(CONFIG_SPL_OF_LIST) && defined(CONFIG_TI_I2C_BOARD_DETECT)
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void do_dt_magic(void)
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{
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int ret, rescan, mmc_dev = -1;
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static struct mmc *mmc;
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do_board_detect();
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/*
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* Board detection has been done.
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* Let us see if another dtb wouldn't be a better match
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* for our board
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*/
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if (IS_ENABLED(CONFIG_CPU_V7R)) {
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ret = fdtdec_resetup(&rescan);
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if (!ret && rescan) {
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dm_uninit();
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dm_init_and_scan(true);
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}
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}
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/*
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* Because of multi DTB configuration, the MMC device has
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* to be re-initialized after reconfiguring FDT inorder to
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* boot from MMC. Do this when boot mode is MMC and ROM has
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* not loaded SYSFW.
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*/
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switch (spl_boot_device()) {
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case BOOT_DEVICE_MMC1:
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mmc_dev = 0;
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break;
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case BOOT_DEVICE_MMC2:
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case BOOT_DEVICE_MMC2_2:
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mmc_dev = 1;
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break;
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}
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if (mmc_dev > 0 && !check_rom_loaded_sysfw()) {
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ret = mmc_init_device(mmc_dev);
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if (!ret) {
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mmc = find_mmc_device(mmc_dev);
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if (mmc) {
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ret = mmc_init(mmc);
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if (ret)
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printf("mmc init failed with error: %d\n", ret);
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}
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}
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}
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}
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#endif
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#ifdef CONFIG_SPL_BUILD
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void board_init_f(ulong dummy)
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{
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k3_spl_init();
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#if defined(CONFIG_SPL_OF_LIST) && defined(CONFIG_TI_I2C_BOARD_DETECT)
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do_dt_magic();
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#endif
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k3_mem_init();
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}
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#endif
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