2018-05-06 21:58:06 +00:00
|
|
|
/* SPDX-License-Identifier: GPL-2.0 */
|
2013-11-21 08:07:46 +00:00
|
|
|
/*
|
|
|
|
* include/configs/koelsch.h
|
|
|
|
*
|
|
|
|
* Copyright (C) 2013 Renesas Electronics Corporation
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef __KOELSCH_H
|
|
|
|
#define __KOELSCH_H
|
|
|
|
|
2014-11-10 05:34:07 +00:00
|
|
|
#include "rcar-gen2-common.h"
|
2014-03-31 06:22:31 +00:00
|
|
|
|
2018-04-17 12:13:11 +00:00
|
|
|
#define STACK_AREA_SIZE 0x00100000
|
|
|
|
#define LOW_LEVEL_MERAM_STACK \
|
2022-05-25 16:16:03 +00:00
|
|
|
(SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
|
2013-11-21 08:07:46 +00:00
|
|
|
|
|
|
|
/* MEMORY */
|
2014-11-10 05:34:07 +00:00
|
|
|
#define RCAR_GEN2_SDRAM_BASE 0x40000000
|
|
|
|
#define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024)
|
|
|
|
#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
|
2013-11-21 08:07:46 +00:00
|
|
|
|
2013-10-20 11:37:17 +00:00
|
|
|
/* SH Ether */
|
|
|
|
#define CONFIG_SH_ETHER_USE_PORT 0
|
|
|
|
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
|
|
|
|
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
|
|
|
|
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
|
2022-12-04 15:13:48 +00:00
|
|
|
#define CFG_SH_ETHER_CACHE_INVALIDATE
|
2022-12-04 15:13:47 +00:00
|
|
|
#define CFG_SH_ETHER_ALIGNE_SIZE 64
|
2013-10-20 11:37:17 +00:00
|
|
|
|
2013-11-21 08:07:46 +00:00
|
|
|
/* Board Clock */
|
2014-12-02 07:52:24 +00:00
|
|
|
|
2022-12-04 15:03:50 +00:00
|
|
|
#define CFG_EXTRA_ENV_SETTINGS \
|
2018-11-26 23:19:03 +00:00
|
|
|
"bootm_size=0x10000000\0"
|
2018-04-17 12:13:11 +00:00
|
|
|
|
|
|
|
/* SPL support */
|
2014-11-12 04:03:54 +00:00
|
|
|
|
2013-11-21 08:07:46 +00:00
|
|
|
#endif /* __KOELSCH_H */
|