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u-boot/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h

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SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-06 21:58:06 +00:00
/* SPDX-License-Identifier: GPL-2.0+ */
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
/*
* (C) Copyright 2007-2011
* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
* Tom Cubie <tangliang@allwinnertech.com>
*/
#ifndef _SUNXI_CPU_SUN4I_H
#define _SUNXI_CPU_SUN4I_H
#define SUNXI_SRAM_A1_BASE 0x00000000
#define SUNXI_SRAM_A1_SIZE (16 * 1024) /* 16 kiB */
#define SUNXI_SRAM_A2_BASE 0x00004000 /* 16 kiB */
#define SUNXI_SRAM_A3_BASE 0x00008000 /* 13 kiB */
#define SUNXI_SRAM_A4_BASE 0x0000b400 /* 3 kiB */
#define SUNXI_SRAM_D_BASE 0x00010000 /* 4 kiB */
#define SUNXI_SRAM_B_BASE 0x00020000 /* 64 kiB (secure) */
sunxi: video: Add A64/H3/H5 HDMI driver This commit adds support for HDMI output. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27 17:22:32 +00:00
#define SUNXI_DE2_BASE 0x01000000
sunxi: Make CPUCFG_BASE macro names the same across families Use SUNXI_CPUCFG_BASE across all families. This makes writing common PSCI code easier. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-07 02:54:28 +00:00
#ifdef CONFIG_MACH_SUN8I_A83T
#define SUNXI_CPUCFG_BASE 0x01700000
#endif
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_SRAMC_BASE 0x01c00000
#define SUNXI_DRAMC_BASE 0x01c01000
#define SUNXI_DMA_BASE 0x01c02000
#define SUNXI_NFC_BASE 0x01c03000
#define SUNXI_TS_BASE 0x01c04000
#define SUNXI_SPI0_BASE 0x01c05000
#define SUNXI_SPI1_BASE 0x01c06000
#define SUNXI_MS_BASE 0x01c07000
#define SUNXI_TVD_BASE 0x01c08000
#define SUNXI_CSI0_BASE 0x01c09000
sunxi: Add base address for TV encoder This commit adds TVE base address for Allwinner H3 and H5 SoCs. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-19 15:41:15 +00:00
#ifndef CONFIG_MACH_SUNXI_H3_H5
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_TVE0_BASE 0x01c0a000
sunxi: Add base address for TV encoder This commit adds TVE base address for Allwinner H3 and H5 SoCs. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-19 15:41:15 +00:00
#endif
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_EMAC_BASE 0x01c0b000
#define SUNXI_LCD0_BASE 0x01c0C000
#define SUNXI_LCD1_BASE 0x01c0d000
#define SUNXI_VE_BASE 0x01c0e000
#define SUNXI_MMC0_BASE 0x01c0f000
#define SUNXI_MMC1_BASE 0x01c10000
#define SUNXI_MMC2_BASE 0x01c11000
#define SUNXI_MMC3_BASE 0x01c12000
sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig bool sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i have a various things in common, like having separate ahb reset control registers, the SID living inside the pmic, custom pmic busses, new style watchdog, etc. This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be used to check for these features avoiding the need for an ever growing list of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more "new style" sunxi SoCs. Note that this commit changes the behavior of the gmac and hdmi code for sun8i and the upcoming sun9i devices. This does not matter as sun8i does not have gmac nor hdmi, and sun9i has new hardware-blocks for these so the old code will not work there. Also this is intentional as if a sun8i / sun9i variant which does use the old hwblocks shows up then the GEN_SUN6I code paths will be the right ones to use. For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-04-06 18:33:34 +00:00
#ifdef CONFIG_SUNXI_GEN_SUN4I
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_USB0_BASE 0x01c13000
#define SUNXI_USB1_BASE 0x01c14000
#endif
#define SUNXI_SS_BASE 0x01c15000
sunxi: video: Add A64/H3/H5 HDMI driver This commit adds support for HDMI output. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27 17:22:32 +00:00
#if !defined(CONFIG_MACH_SUNXI_H3_H5) && !defined(CONFIG_MACH_SUN50I)
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_HDMI_BASE 0x01c16000
sunxi: video: Add A64/H3/H5 HDMI driver This commit adds support for HDMI output. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27 17:22:32 +00:00
#endif
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_SPI2_BASE 0x01c17000
#define SUNXI_SATA_BASE 0x01c18000
sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig bool sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i have a various things in common, like having separate ahb reset control registers, the SID living inside the pmic, custom pmic busses, new style watchdog, etc. This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be used to check for these features avoiding the need for an ever growing list of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more "new style" sunxi SoCs. Note that this commit changes the behavior of the gmac and hdmi code for sun8i and the upcoming sun9i devices. This does not matter as sun8i does not have gmac nor hdmi, and sun9i has new hardware-blocks for these so the old code will not work there. Also this is intentional as if a sun8i / sun9i variant which does use the old hwblocks shows up then the GEN_SUN6I code paths will be the right ones to use. For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-04-06 18:33:34 +00:00
#ifdef CONFIG_SUNXI_GEN_SUN4I
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_PATA_BASE 0x01c19000
#define SUNXI_ACE_BASE 0x01c1a000
#define SUNXI_TVE1_BASE 0x01c1b000
#define SUNXI_USB2_BASE 0x01c1c000
sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig bool sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i have a various things in common, like having separate ahb reset control registers, the SID living inside the pmic, custom pmic busses, new style watchdog, etc. This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be used to check for these features avoiding the need for an ever growing list of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more "new style" sunxi SoCs. Note that this commit changes the behavior of the gmac and hdmi code for sun8i and the upcoming sun9i devices. This does not matter as sun8i does not have gmac nor hdmi, and sun9i has new hardware-blocks for these so the old code will not work there. Also this is intentional as if a sun8i / sun9i variant which does use the old hwblocks shows up then the GEN_SUN6I code paths will be the right ones to use. For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-04-06 18:33:34 +00:00
#endif
#ifdef CONFIG_SUNXI_GEN_SUN6I
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-16 01:20:27 +00:00
#if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I)
sunxi: H3: Add support for the host usb-phys Add support for phy 1-3. Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl> [hdegoede@redhat.com: use setclrbits_le32 instead of read-modify-write] Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-02-09 22:59:33 +00:00
#define SUNXI_USBPHY_BASE 0x01c19000
usb: sunxi: Use proper reg_mask for clock gate, reset Masking clock gate, reset register bits based on the probed controller is proper only due to the assumption that masking should start with 0 even thought the controller has separate PHY or shared between OTG. unfortunately these are fixed due to lack of separate clock, reset drivers. Say for example EHCI1 - EHCI3 in the datasheet (EHCI0 is for the OTG) so we need to start reg_mask 0 - 2. This patch calculated the mask, based on the register base so that we can get the proper bits to set with respect to probed controller. We even do this masking by using PHY index specifier from dt, but dev_read_addr_size is failing for 64-bit boards. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-06-28 14:10:46 +00:00
#define SUNXI_USB0_BASE SUNXI_USBPHY_BASE
#define SUNXI_USB1_BASE 0x01c1a000
#define SUNXI_USB2_BASE 0x01c1b000
#define SUNXI_USB3_BASE 0x01c1c000
#define SUNXI_USB4_BASE 0x01c1d000
sunxi: H3: Add support for the host usb-phys Add support for phy 1-3. Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl> [hdegoede@redhat.com: use setclrbits_le32 instead of read-modify-write] Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-02-09 22:59:33 +00:00
#else
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_USB0_BASE 0x01c19000
#define SUNXI_USB1_BASE 0x01c1a000
#define SUNXI_USB2_BASE 0x01c1b000
#endif
sunxi: H3: Add support for the host usb-phys Add support for phy 1-3. Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl> [hdegoede@redhat.com: use setclrbits_le32 instead of read-modify-write] Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-02-09 22:59:33 +00:00
#endif
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_CSI1_BASE 0x01c1d000
#define SUNXI_TZASC_BASE 0x01c1e000
#define SUNXI_SPI3_BASE 0x01c1f000
#define SUNXI_CCM_BASE 0x01c20000
#define SUNXI_INTC_BASE 0x01c20400
#define SUNXI_PIO_BASE 0x01c20800
#define SUNXI_TIMER_BASE 0x01c20c00
sunxi: display: Use PWM to drive backlight where applicable When the backlight's pwm input is connected to a pwm output of the SoC, actually use pwm to drive the backlight. The mean reason for doing this is to fix the backlight turning off for aprox. 1 second while the kernel is booting. This is caused by the kernel actually using pwm to drive the backlight, so that it can dim the backlight. First the pwm driver loads and switches the pinmux for the pin driving the backlight's pwm input to the pwm controller. Then about 1s later the actual backlight driver loads and tells the pwm driver to actually update the pwm settings, which have a power-on-reset value of "off". An additional advantage is that this allows us to initatiate the backlight at 80%, which is the kernel default, avoiding a brightness change while the kernel loads. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed by: Peter Korsgaard <peter@korsgaard.com>
2016-08-19 13:25:41 +00:00
#ifndef CONFIG_SUNXI_GEN_SUN6I
#define SUNXI_PWM_BASE 0x01c20e00
#endif
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_SPDIF_BASE 0x01c21000
sunxi: display: Use PWM to drive backlight where applicable When the backlight's pwm input is connected to a pwm output of the SoC, actually use pwm to drive the backlight. The mean reason for doing this is to fix the backlight turning off for aprox. 1 second while the kernel is booting. This is caused by the kernel actually using pwm to drive the backlight, so that it can dim the backlight. First the pwm driver loads and switches the pinmux for the pin driving the backlight's pwm input to the pwm controller. Then about 1s later the actual backlight driver loads and tells the pwm driver to actually update the pwm settings, which have a power-on-reset value of "off". An additional advantage is that this allows us to initatiate the backlight at 80%, which is the kernel default, avoiding a brightness change while the kernel loads. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed by: Peter Korsgaard <peter@korsgaard.com>
2016-08-19 13:25:41 +00:00
#ifdef CONFIG_SUNXI_GEN_SUN6I
#define SUNXI_PWM_BASE 0x01c21400
#else
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_AC97_BASE 0x01c21400
sunxi: display: Use PWM to drive backlight where applicable When the backlight's pwm input is connected to a pwm output of the SoC, actually use pwm to drive the backlight. The mean reason for doing this is to fix the backlight turning off for aprox. 1 second while the kernel is booting. This is caused by the kernel actually using pwm to drive the backlight, so that it can dim the backlight. First the pwm driver loads and switches the pinmux for the pin driving the backlight's pwm input to the pwm controller. Then about 1s later the actual backlight driver loads and tells the pwm driver to actually update the pwm settings, which have a power-on-reset value of "off". An additional advantage is that this allows us to initatiate the backlight at 80%, which is the kernel default, avoiding a brightness change while the kernel loads. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed by: Peter Korsgaard <peter@korsgaard.com>
2016-08-19 13:25:41 +00:00
#endif
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_IR0_BASE 0x01c21800
#define SUNXI_IR1_BASE 0x01c21c00
#define SUNXI_IIS_BASE 0x01c22400
#define SUNXI_LRADC_BASE 0x01c22800
#define SUNXI_AD_DA_BASE 0x01c22c00
#define SUNXI_KEYPAD_BASE 0x01c23000
#define SUNXI_TZPC_BASE 0x01c23400
sunxi: Support SID e-fuses on A83T and H3 On the A83T and H3, the SID block is at a different address. Furthurmore, the e-fuses are at an offset of 0x200 within the hardware's address space. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-01-27 08:34:43 +00:00
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-16 01:20:27 +00:00
#if defined(CONFIG_MACH_SUN8I_A83T) || defined(CONFIG_MACH_SUNXI_H3_H5) || \
net: Add EMAC driver for H3/A83T/A64 SoCs. This patch add EMAC driver support for H3/A83T/A64 SoCs. Tested on Pine64(A64-External PHY) and Orangepipc(H3-Internal PHY). BIG Thanks to Andre for providing some of the DT code. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-06 12:29:44 +00:00
defined(CONFIG_MACH_SUN50I)
sunxi: Support SID e-fuses on A83T and H3 On the A83T and H3, the SID block is at a different address. Furthurmore, the e-fuses are at an offset of 0x200 within the hardware's address space. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-01-27 08:34:43 +00:00
/* SID address space starts at 0x01c1400, but e-fuse is at offset 0x200 */
sunxi: fix SID read on H3 H3 SID controller has some bug, which makes the initial SID value at SUNXI_SID_BASE wrong when boot. Change the SID retrieve code to call the SID Controller directly on H3, which can get the correct value, and also fix the SID value at SUNXI_SID_BASE, so that it can be used by further operations. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-12-19 18:03:36 +00:00
#define SUNXI_SIDC_BASE 0x01c14000
sunxi: Support SID e-fuses on A83T and H3 On the A83T and H3, the SID block is at a different address. Furthurmore, the e-fuses are at an offset of 0x200 within the hardware's address space. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-01-27 08:34:43 +00:00
#define SUNXI_SID_BASE 0x01c14200
#else
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_SID_BASE 0x01c23800
sunxi: Support SID e-fuses on A83T and H3 On the A83T and H3, the SID block is at a different address. Furthurmore, the e-fuses are at an offset of 0x200 within the hardware's address space. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-01-27 08:34:43 +00:00
#endif
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_SJTAG_BASE 0x01c23c00
#define SUNXI_TP_BASE 0x01c25000
#define SUNXI_PMU_BASE 0x01c25400
sunxi: Make CPUCFG_BASE macro names the same across families Use SUNXI_CPUCFG_BASE across all families. This makes writing common PSCI code easier. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-07 02:54:28 +00:00
sunxi: Fix CPUCFG address for R40 The R40 has the CPUCFG block at the same address as the A20. Fix it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-01 05:52:09 +00:00
#if defined CONFIG_MACH_SUN7I || defined CONFIG_MACH_SUN8I_R40
sunxi: Make CPUCFG_BASE macro names the same across families Use SUNXI_CPUCFG_BASE across all families. This makes writing common PSCI code easier. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-07 02:54:28 +00:00
#define SUNXI_CPUCFG_BASE 0x01c25c00
#endif
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_UART0_BASE 0x01c28000
#define SUNXI_UART1_BASE 0x01c28400
#define SUNXI_UART2_BASE 0x01c28800
#define SUNXI_UART3_BASE 0x01c28c00
#define SUNXI_UART4_BASE 0x01c29000
#define SUNXI_UART5_BASE 0x01c29400
#define SUNXI_UART6_BASE 0x01c29800
#define SUNXI_UART7_BASE 0x01c29c00
#define SUNXI_PS2_0_BASE 0x01c2a000
#define SUNXI_PS2_1_BASE 0x01c2a400
#define SUNXI_TWI0_BASE 0x01c2ac00
#define SUNXI_TWI1_BASE 0x01c2b000
#define SUNXI_TWI2_BASE 0x01c2b400
sunxi: Complete i2c support for each supported platform Sunxi platforms come with at least 3 TWI (I2C) controllers and some platforms even have up to 5. This adds support for every controller on each supported platform, which is especially useful when using expansion ports on single-board- computers. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-04-10 21:09:52 +00:00
#ifdef CONFIG_MACH_SUN6I
#define SUNXI_TWI3_BASE 0x01c0b800
#endif
#ifdef CONFIG_MACH_SUN7I
#define SUNXI_TWI3_BASE 0x01c2b800
#define SUNXI_TWI4_BASE 0x01c2c000
#endif
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_CAN_BASE 0x01c2bc00
#define SUNXI_SCR_BASE 0x01c2c400
#ifndef CONFIG_MACH_SUN6I
#define SUNXI_GPS_BASE 0x01c30000
#define SUNXI_MALI400_BASE 0x01c40000
#define SUNXI_GMAC_BASE 0x01c50000
#else
#define SUNXI_GMAC_BASE 0x01c30000
#endif
#define SUNXI_DRAM_COM_BASE 0x01c62000
#define SUNXI_DRAM_CTL0_BASE 0x01c63000
#define SUNXI_DRAM_CTL1_BASE 0x01c64000
#define SUNXI_DRAM_PHY0_BASE 0x01c65000
#define SUNXI_DRAM_PHY1_BASE 0x01c66000
sunxi: Add base address for GIC Instead of hardcoding the GIC addresses in the PSCI implementation, provide a base address in the cpu header. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-07 02:54:33 +00:00
#define SUNXI_GIC400_BASE 0x01c80000
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
/* module sram */
#define SUNXI_SRAM_C_BASE 0x01d00000
sunxi: Add base address for TV encoder This commit adds TVE base address for Allwinner H3 and H5 SoCs. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-19 15:41:15 +00:00
#ifndef CONFIG_MACH_SUN8I_H3
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_DE_FE0_BASE 0x01e00000
sunxi: Add base address for TV encoder This commit adds TVE base address for Allwinner H3 and H5 SoCs. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-19 15:41:15 +00:00
#else
#define SUNXI_TVE0_BASE 0x01e00000
#endif
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_DE_FE1_BASE 0x01e20000
#define SUNXI_DE_BE0_BASE 0x01e60000
sunxi: Add base address for TV encoder This commit adds TVE base address for Allwinner H3 and H5 SoCs. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-19 15:41:15 +00:00
#ifndef CONFIG_MACH_SUN50I_H5
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_DE_BE1_BASE 0x01e40000
sunxi: Add base address for TV encoder This commit adds TVE base address for Allwinner H3 and H5 SoCs. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-19 15:41:15 +00:00
#else
#define SUNXI_TVE0_BASE 0x01e40000
#endif
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_MP_BASE 0x01e80000
#define SUNXI_AVG_BASE 0x01ea0000
sunxi: video: Add A64/H3/H5 HDMI driver This commit adds support for HDMI output. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27 17:22:32 +00:00
#if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I)
#define SUNXI_HDMI_BASE 0x01ee0000
#endif
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_RTC_BASE 0x01f00000
#define SUNXI_PRCM_BASE 0x01f01400
sunxi: Make CPUCFG_BASE macro names the same across families Use SUNXI_CPUCFG_BASE across all families. This makes writing common PSCI code easier. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-07 02:54:28 +00:00
sunxi: Fix CPUCFG address for R40 The R40 has the CPUCFG block at the same address as the A20. Fix it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-01 05:52:09 +00:00
#if defined CONFIG_SUNXI_GEN_SUN6I && \
!defined CONFIG_MACH_SUN8I_A83T && \
!defined CONFIG_MACH_SUN8I_R40
sunxi: Make CPUCFG_BASE macro names the same across families Use SUNXI_CPUCFG_BASE across all families. This makes writing common PSCI code easier. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-07 02:54:28 +00:00
#define SUNXI_CPUCFG_BASE 0x01f01c00
#endif
sunxi: Add support for the I2C controller which is part of the PRCM Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl> [hdegoede@redhat.com: Minor cleanups] Signed-off-by: Hans de Goede <hdegoede@redhat.com> applied with fixing 2 checkpatch warnings: WARNING: please, no space before tabs Signed-off-by: Heiko Schocher <hs@denx.de>
2016-01-14 13:06:26 +00:00
#define SUNXI_R_TWI_BASE 0x01f02400
sunxi: Rename cpu.h to cpu_sun4i.h sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-13 17:13:50 +00:00
#define SUNXI_R_UART_BASE 0x01f02800
#define SUNXI_R_PIO_BASE 0x01f02c00
#define SUN6I_P2WI_BASE 0x01f03400
#define SUNXI_RSB_BASE 0x01f03400
/* CoreSight Debug Module */
#define SUNXI_CSDM_BASE 0x3f500000
#define SUNXI_DDRII_DDRIII_BASE 0x40000000 /* 2 GiB */
#define SUNXI_BROM_BASE 0xffff0000 /* 32 kiB */
#define SUNXI_CPU_CFG (SUNXI_TIMER_BASE + 0x13c)
/* SS bonding ids used for cpu identification */
#define SUNXI_SS_BOND_ID_A31 4
#define SUNXI_SS_BOND_ID_A31S 5
#ifndef __ASSEMBLY__
void sunxi_board_init(void);
void sunxi_reset(void);
int sunxi_get_ss_bonding_id(void);
int sunxi_get_sid(unsigned int *sid);
#endif /* __ASSEMBLY__ */
#endif /* _SUNXI_CPU_SUN4I_H */
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