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u-boot/drivers/clk/Kconfig

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clk: move Kconfig options into sub-menu Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-01-12 07:36:38 +00:00
menu "Clock"
dm: Add a clock uclass Clocks are an important feature of platforms and have become increasing complex with time. Most modern SoCs have multiple PLLs and dozens of clock dividers which distribute clocks to on-chip peripherals. Some SoC implementations have a clock API which is private to that SoC family, e.g. Tegra and Exynos. This is useful but it would be better to have a common API that can be understood and used throughout U-Boot. Add a simple clock API as a starting point. It supports querying and setting the rate of a clock. Each clock is a device. To reduce memory and processing overhead the concept of peripheral clocks is provided. These do not need to be explicit devices - it is possible to write a driver that can adjust the I2C clock (for example) without an explicit I2C clock device. This can dramatically reduce the number of devices (and associated overhead) in a complex SoC. Clocks are referenced by a number, and it is expected that SoCs will define that numbering themselves via an enum. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-06-23 21:39:15 +00:00
config CLK
bool "Enable clock driver support"
depends on DM
help
This allows drivers to be provided for clock generators, including
oscillators and PLLs. Devices can use a common clock API to request
a particular clock rate and check on available clocks. Clocks can
feed into other clocks in a tree structure, with multiplexers to
choose the source for each clock.
clk: rename CONFIG_SPL_CLK_SUPPORT to CONFIG_SPL_CLK Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-11 22:31:46 +00:00
config SPL_CLK
dm: Add a clock uclass Clocks are an important feature of platforms and have become increasing complex with time. Most modern SoCs have multiple PLLs and dozens of clock dividers which distribute clocks to on-chip peripherals. Some SoC implementations have a clock API which is private to that SoC family, e.g. Tegra and Exynos. This is useful but it would be better to have a common API that can be understood and used throughout U-Boot. Add a simple clock API as a starting point. It supports querying and setting the rate of a clock. Each clock is a device. To reduce memory and processing overhead the concept of peripheral clocks is provided. These do not need to be explicit devices - it is possible to write a driver that can adjust the I2C clock (for example) without an explicit I2C clock device. This can dramatically reduce the number of devices (and associated overhead) in a complex SoC. Clocks are referenced by a number, and it is expected that SoCs will define that numbering themselves via an enum. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-06-23 21:39:15 +00:00
bool "Enable clock support in SPL"
clk: Kconfig: Add dependences of SPL_CLK The SPL_CLK config should depend on SPL && SPL_DM. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-31 07:21:57 +00:00
depends on CLK && SPL && SPL_DM
dm: Add a clock uclass Clocks are an important feature of platforms and have become increasing complex with time. Most modern SoCs have multiple PLLs and dozens of clock dividers which distribute clocks to on-chip peripherals. Some SoC implementations have a clock API which is private to that SoC family, e.g. Tegra and Exynos. This is useful but it would be better to have a common API that can be understood and used throughout U-Boot. Add a simple clock API as a starting point. It supports querying and setting the rate of a clock. Each clock is a device. To reduce memory and processing overhead the concept of peripheral clocks is provided. These do not need to be explicit devices - it is possible to write a driver that can adjust the I2C clock (for example) without an explicit I2C clock device. This can dramatically reduce the number of devices (and associated overhead) in a complex SoC. Clocks are referenced by a number, and it is expected that SoCs will define that numbering themselves via an enum. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-06-23 21:39:15 +00:00
help
The clock subsystem adds a small amount of overhead to the image.
If this is acceptable and you have a need to use clock drivers in
SPL, enable this option. It might provide a cleaner interface to
setting up clocks within SPL, and allows the same drivers to be
used as U-Boot proper.
clk: move Kconfig options into sub-menu Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-01-12 07:36:38 +00:00
spl: dm: Kconfig: split CLK support for SPL and TPL Introduce TPL_CLK to allow finer-grained selection of TPL features for feature-rich (i.e. DM-based) TPL stages. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-06-28 23:45:01 +00:00
config TPL_CLK
bool "Enable clock support in TPL"
depends on CLK && TPL_DM
help
The clock subsystem adds a small amount of overhead to the image.
If this is acceptable and you have a need to use clock drivers in
SPL, enable this option. It might provide a cleaner interface to
setting up clocks within TPL, and allows the same drivers to be
used as U-Boot proper.
dm: clk: add BCM6345 clock driver This is a simplified version of linux/arch/mips/bcm63xx/clk.c Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-07 18:13:01 +00:00
config CLK_BCM6345
bool "Clock controller driver for BCM6345"
depends on CLK && ARCH_BMIPS
default y
help
This clock driver adds support for enabling and disabling peripheral
clocks on BCM6345 SoCs. HW has no rate changing capabilities.
clk: boston: Providea simple driver for Boston board clocks Add a simple driver for the clocks provided by the MIPS Boston development board. The system provides information about 2 clocks whose rates are fixed by the bitfile flashed in the boards FPGA, and this driver simply reads the rates of these 2 clocks. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-09-08 06:47:38 +00:00
config CLK_BOSTON
def_bool y if TARGET_BOSTON
depends on CLK
select REGMAP
select SYSCON
help
Enable this to support the clocks
clk: stm32f7: rename clk_stm32f7.c to clk_stm32f.c Now that clk_stm32f7.c manages clocks for both STM32F4 and F7 SoCs rename it to a more generic clk_stm32f.c Fix also some checkpatch errors/warnings. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2017-11-15 12:14:48 +00:00
config CLK_STM32F
bool "Enable clock driver support for STM32F family"
depends on CLK && (STM32F7 || STM32F4)
default y
help
This clock driver adds support for RCC clock management
for STM32F4 and STM32F7 SoCs.
ARC: clk: introduce HSDK CGU clock driver Synopsys HSDK clock controller generates and supplies clocks to various controllers and peripherals within the SoC. Each clock has assigned identifier and client device tree nodes can use this identifier to specify the clock which they consume. All available clocks are defined as preprocessor macros in the dt-bindings/clock/snps,hsdk-cgu.h header and can be used in device tree sources. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-10 18:20:08 +00:00
config CLK_HSDK
bool "Enable cgu clock driver for HSDK"
depends on CLK
help
Enable this to support the cgu clocks on Synopsys ARC HSDK
clk: zynq: Add zynq clock framework driver Add a clock framework driver for the zynq platform. The driver is based on the platform zynq clock driver but reworked to use static functions instead of run-time generated objects even for unused clocks. Additionally the CONFIG_ZYNQ_PS_CLK_FREQ is replaced by the ps-clk-frequency from the device tree. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-01-17 15:27:29 +00:00
config CLK_ZYNQ
bool "Enable clock driver support for Zynq"
depends on CLK && ARCH_ZYNQ
default y
help
This clock driver adds support for clock realted settings for
Zynq platform.
clk: zynqmp: Add clock driver support for zynqmp Add basic clock driver support for zynqmp which sets the required clock for GEM controller Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-11-15 10:45:41 +00:00
config CLK_ZYNQMP
bool "Enable clock driver support for ZynqMP"
depends on ARCH_ZYNQMP
help
This clock driver adds support for clock realted settings for
ZynqMP platform.
clk: add driver for stm32mp1 add RCC clock driver for STMP32MP157 - base on driver model = UCLASS_CLK - support ops to enable, disable and get rate of all SOC clock needed by U-Boot Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-12 09:46:15 +00:00
config CLK_STM32MP1
bool "Enable RCC clock driver for STM32MP1"
depends on ARCH_STM32MP && CLK
default y
help
Enable the STM32 clock (RCC) driver. Enable support for
manipulating STM32MP1's on-SoC clocks.
clock: add Tegra186 clock driver In Tegra186, on-SoC clocks are manipulated using IPC requests to the BPMP (Boot and Power Management Processor). This change implements a driver that does that. A tegra/ sub-directory is created to follow the existing pattern. It is unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186 build of U-Boot will need the feature. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-08 17:28:24 +00:00
source "drivers/clk/tegra/Kconfig"
clk: uniphier: add Media I/O clock driver for UniPhier SoCs This is the initial commit for the UniPhier clock drivers. Currently, only the Media I/O clock is supported. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-02 12:11:32 +00:00
source "drivers/clk/uniphier/Kconfig"
clk: exynos: add clock driver for Exynos7420 Soc Add a clock driver for Exynos7420 SoC. There are about 25 clock controller blocks in Exynos7420 out of which support for topc, top0 and peric1 blocks are added in this initial version of the driver. Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2016-04-23 16:48:09 +00:00
source "drivers/clk/exynos/Kconfig"
clk: at91: Add clock driver The patch is referred to at91 clock driver of Linux, to make the clock node descriptions in DT aligned with the Linux's. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-07-20 09:55:12 +00:00
source "drivers/clk/at91/Kconfig"
clk: rmobile: Add RCar Gen3 clock driver Add clock driver for the RCar Gen3 R8A7795 and R8A7796 SoCs . This driver allows reading out the clock configuration set by previous boot stages and enabling and disabling clock using the MSTP registers. Setting clock is not supported thus far. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-07-21 21:18:03 +00:00
source "drivers/clk/renesas/Kconfig"
clk: uniphier: add Media I/O clock driver for UniPhier SoCs This is the initial commit for the UniPhier clock drivers. Currently, only the Media I/O clock is supported. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-02 12:11:32 +00:00
clk: Add ICS8N3QV01 driver Add a driver for the ICS8N3QV01 Quad-Frequency Programmable VCXO. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-04-27 12:53:15 +00:00
config ICS8N3QV01
bool "Enable ICS8N3QV01 VCXO driver"
depends on CLK
help
Support for the ICS8N3QV01 Quad-Frequency VCXO (Voltage-Controlled
Crystal Oscillator). The output frequency can be programmed via an
I2C interface.
clk: move Kconfig options into sub-menu Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-01-12 07:36:38 +00:00
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