2014-06-13 20:55:49 +00:00
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/*
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* Copyright 2014 - Hans de Goede <hdegoede@redhat.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _SUNXI_I2C_H_
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#define _SUNXI_I2C_H_
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#include <asm/arch/cpu.h>
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2015-04-10 21:09:52 +00:00
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#ifdef CONFIG_I2C0_ENABLE
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2015-04-10 21:09:51 +00:00
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#define CONFIG_I2C_MVTWSI_BASE0 SUNXI_TWI0_BASE
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2015-04-10 21:09:52 +00:00
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#endif
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#ifdef CONFIG_I2C1_ENABLE
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#define CONFIG_I2C_MVTWSI_BASE1 SUNXI_TWI1_BASE
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#endif
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#ifdef CONFIG_I2C2_ENABLE
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#define CONFIG_I2C_MVTWSI_BASE2 SUNXI_TWI2_BASE
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#endif
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#ifdef CONFIG_I2C3_ENABLE
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#define CONFIG_I2C_MVTWSI_BASE3 SUNXI_TWI3_BASE
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#endif
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#ifdef CONFIG_I2C4_ENABLE
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#define CONFIG_I2C_MVTWSI_BASE4 SUNXI_TWI4_BASE
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#endif
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2016-01-14 13:06:26 +00:00
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#ifdef CONFIG_R_I2C_ENABLE
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#define CONFIG_I2C_MVTWSI_BASE5 SUNXI_R_TWI_BASE
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#endif
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2015-04-10 21:09:52 +00:00
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2014-06-13 20:55:49 +00:00
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/* This is abp0-clk on sun4i/5i/7i / abp1-clk on sun6i/sun8i which is 24MHz */
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#define CONFIG_SYS_TCLK 24000000
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#endif
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