2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2008-01-14 23:46:19 +00:00
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/*
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*
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* (C) Copyright 2000-2004
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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2012-03-26 21:49:08 +00:00
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* Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
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2008-01-14 23:46:19 +00:00
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*/
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/* CPU specific interrupt routine */
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#include <common.h>
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2019-11-14 19:57:41 +00:00
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#include <irq_func.h>
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2008-01-14 23:46:19 +00:00
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#include <asm/immap.h>
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2012-03-26 21:49:08 +00:00
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#include <asm/io.h>
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2008-01-14 23:46:19 +00:00
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int interrupt_init(void)
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{
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2023-01-10 16:19:45 +00:00
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int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE);
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2008-01-14 23:46:19 +00:00
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/* Make sure all interrupts are disabled */
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2012-03-26 21:49:08 +00:00
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setbits_be32(&intp->imrh0, 0xffffffff);
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setbits_be32(&intp->imrl0, 0xffffffff);
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2008-01-14 23:46:19 +00:00
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enable_interrupts();
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return 0;
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}
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2023-03-23 00:20:39 +00:00
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#if CONFIG_IS_ENABLED(MCFTMR)
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2008-01-14 23:46:19 +00:00
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void dtimer_intr_setup(void)
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{
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2023-01-10 16:19:45 +00:00
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int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE);
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2008-01-14 23:46:19 +00:00
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2023-01-10 16:19:45 +00:00
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out_8(&intp->icr0[CFG_SYS_TMRINTR_NO], CFG_SYS_TMRINTR_PRI);
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clrbits_be32(&intp->imrh0, CFG_SYS_TMRINTR_MASK);
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2008-01-14 23:46:19 +00:00
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}
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#endif
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