2018-08-16 13:27:31 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2018 Stefan Roese <sr@denx.de>
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*/
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#ifndef __CONFIG_GARDENA_SMART_GATEWAY_H
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#define __CONFIG_GARDENA_SMART_GATEWAY_H
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/* RAM */
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2022-11-16 18:10:37 +00:00
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#define CFG_SYS_SDRAM_BASE 0x80000000
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2018-08-16 13:27:31 +00:00
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2022-11-16 18:10:41 +00:00
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#define CFG_SYS_INIT_SP_OFFSET 0x400000
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2018-08-16 13:27:31 +00:00
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2020-04-21 07:28:48 +00:00
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/* SPL */
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2018-08-16 13:27:31 +00:00
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2022-11-16 18:10:41 +00:00
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#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
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2020-04-21 07:28:48 +00:00
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/* Dummy value */
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2022-11-16 18:10:41 +00:00
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#define CFG_SYS_UBOOT_BASE 0
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2020-04-21 07:28:48 +00:00
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/* Serial SPL */
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2021-08-08 18:20:12 +00:00
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#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL)
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2022-11-16 18:10:28 +00:00
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#define CFG_SYS_NS16550_CLK 40000000
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#define CFG_SYS_NS16550_COM1 0xb0000c00
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2020-04-21 07:28:48 +00:00
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#endif
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2018-08-16 13:27:31 +00:00
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/* UART */
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2022-11-16 18:10:41 +00:00
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#define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \
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2019-09-25 09:45:42 +00:00
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230400, 460800, 921600 }
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2018-08-16 13:27:31 +00:00
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/* RAM */
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/* Environment settings */
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#endif /* __CONFIG_GARDENA_SMART_GATEWAY_H */
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