u-boot/board/raspberrypi/rpi/rpi.c

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// SPDX-License-Identifier: GPL-2.0
/*
rpi: BCM2837 and Raspberry Pi 3 32-bit support The Raspberry Pi 3 contains a BCM2837 SoC. The BCM2837 is a BCM2836 with the CPU complex swapped out for a quad-core ARMv8. This can operate in 32- or 64-bit mode. 32-bit mode is the current default selected by the VideoCore firmware on the Raspberry Pi 3. This patch adds a 32-bit port of U-Boot for the Raspberry Pi 3. >From U-Boot's perspective, the only delta between the RPi 2 and RPi 3 is a change in usage of the SoC UARTs. On all previous Pis, the PL011 was the only UART in use. The Raspberry Pi 3 adds a Bluetooth module which uses a UART to connect to the SoC. By default, the PL011 is used for this purpose since it has larger FIFOs than the other "mini" UART. However, this can be configured via the VideoCore firmware's config.txt file. This patch hard-codes use of the mini UART in the RPi 3 port. If your system uses the PL011 UART for the console even on the RPi 3, please use the RPi 2 U-Boot port instead. A future change might determine which UART to use at run-time, thus allowing the RPi 2 and RPi 3 (32-bit) ports to be squashed together. The mini UART has some limitations. One externally visible issue in the BCM2837 integration is that the UART divides the SoC's "core clock" to generate the baud rate. The core clock is typically variable, and under control of the VideoCore firmware for thermal management reasons. If the VC FW does modify the core clock rate, UART communication will be corrupted since the baud rate will vary from the expected value. This was not an issue for the PL011 UART, since it is fed by a fixed 3MHz clock. To work around this, the VideoCore firmware can be told not to modify the SoC core clock. However, the only way this can happen and be thermally safe is to limit the core clock to a low/minimum frequency. This leaves performance on the table for use-cases that don't care about a UART console. Consequently, use of the mini UART console must be explicitly requested by entering the following line into config.txt: enable_uart=1 A recent version of the VC firmware is required to ensure that the mini UART is fully and correctly initialized by the VC FW; at least firmware.git 046effa13ebc "firmware: arm_loader: emmc clock depends on core clock See: https://github.com/raspberrypi/firmware/issues/572". Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-03-25 04:15:20 +00:00
* (C) Copyright 2012-2016 Stephen Warren
*/
#include <common.h>
#include <config.h>
#include <dm.h>
#include <env.h>
#include <efi_loader.h>
#include <fdt_support.h>
#include <fdt_simplefb.h>
#include <init.h>
#include <memalign.h>
#include <mmc.h>
#include <asm/gpio.h>
#include <asm/arch/mbox.h>
#include <asm/arch/msg.h>
#include <asm/arch/sdhci.h>
#include <asm/global_data.h>
rpi: BCM2837 and Raspberry Pi 3 32-bit support The Raspberry Pi 3 contains a BCM2837 SoC. The BCM2837 is a BCM2836 with the CPU complex swapped out for a quad-core ARMv8. This can operate in 32- or 64-bit mode. 32-bit mode is the current default selected by the VideoCore firmware on the Raspberry Pi 3. This patch adds a 32-bit port of U-Boot for the Raspberry Pi 3. >From U-Boot's perspective, the only delta between the RPi 2 and RPi 3 is a change in usage of the SoC UARTs. On all previous Pis, the PL011 was the only UART in use. The Raspberry Pi 3 adds a Bluetooth module which uses a UART to connect to the SoC. By default, the PL011 is used for this purpose since it has larger FIFOs than the other "mini" UART. However, this can be configured via the VideoCore firmware's config.txt file. This patch hard-codes use of the mini UART in the RPi 3 port. If your system uses the PL011 UART for the console even on the RPi 3, please use the RPi 2 U-Boot port instead. A future change might determine which UART to use at run-time, thus allowing the RPi 2 and RPi 3 (32-bit) ports to be squashed together. The mini UART has some limitations. One externally visible issue in the BCM2837 integration is that the UART divides the SoC's "core clock" to generate the baud rate. The core clock is typically variable, and under control of the VideoCore firmware for thermal management reasons. If the VC FW does modify the core clock rate, UART communication will be corrupted since the baud rate will vary from the expected value. This was not an issue for the PL011 UART, since it is fed by a fixed 3MHz clock. To work around this, the VideoCore firmware can be told not to modify the SoC core clock. However, the only way this can happen and be thermally safe is to limit the core clock to a low/minimum frequency. This leaves performance on the table for use-cases that don't care about a UART console. Consequently, use of the mini UART console must be explicitly requested by entering the following line into config.txt: enable_uart=1 A recent version of the VC firmware is required to ensure that the mini UART is fully and correctly initialized by the VC FW; at least firmware.git 046effa13ebc "firmware: arm_loader: emmc clock depends on core clock See: https://github.com/raspberrypi/firmware/issues/572". Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-03-25 04:15:20 +00:00
#include <dm/platform_data/serial_bcm283x_mu.h>
ARM: add Raspberry Pi 3 64-bit config On all Pis so far, the VC FW provides a short stub to set up the ARM CPU before entering the kernel (a/k/a U-Boot for us). This feature is not currently supported by the VC FW when booting in 64-bit mode. However, this feature will likely appear in the near future, and this U-Boot port assumes that such a feature is in place. Without that feature, or a temporary workaround described below, U-Boot will not boot. Once the VC FW does provide the ARM stub, u-boot.bin built for rpi_3 can be used drectly as kernel7.img, in the same way as any other RPi port. The following config.txt is required: # Fix mini UART input frequency, and setup/enable up the UART. # Without this option, U-Boot will not boot, even if you don't care # about the serial console. This option will always be required for # all RPi3 use-cases, unless the PL011 UART is used, which is not # yet supported by rpi_3* builds of U-Boot. enable_uart=1 # Boot in AArch64 (64-bit) mode. # It is possible that a future VC FW will remove the need for this # option, instead auto-setting 32-/64-bit mode based on the "kernel" # filename present on the SD card. arm_control=0x200 Prior to the VC FW providing the ARM boot stub, you can use the following steps to build an equivalent stub into the U-Boot binary: git clone https://github.com/swarren/rpi-3-aarch64-demo.git \ ../rpi-3-aarch64-demo (cd ../rpi-3-aarch64-demo && ./build.sh) Build U-Boot for rpi_3 in the usual way cat ../rpi-3-aarch64-demo/armstub64.bin u-boot.bin > u-boot.bin.stubbed Use u-boot.bin.stubbed as kernel7.img on the Pi SD card. In this case, the following additional entries are required in config.txt: # Tell the FW to load the kernel image at address 0, the reset vector. kernel_old=1 Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-02 03:14:15 +00:00
#ifdef CONFIG_ARM64
#include <asm/armv8/mmu.h>
#endif
#include <watchdog.h>
#include <dm/pinctrl.h>
DECLARE_GLOBAL_DATA_PTR;
/* Assigned in lowlevel_init.S
* Push the variable into the .data section so that it
* does not get cleared later.
*/
unsigned long __section(".data") fw_dtb_pointer;
/* TODO(sjg@chromium.org): Move these to the msg.c file */
struct msg_get_arm_mem {
struct bcm2835_mbox_hdr hdr;
struct bcm2835_mbox_tag_get_arm_mem get_arm_mem;
u32 end_tag;
};
struct msg_get_board_rev {
struct bcm2835_mbox_hdr hdr;
struct bcm2835_mbox_tag_get_board_rev get_board_rev;
u32 end_tag;
};
struct msg_get_board_serial {
struct bcm2835_mbox_hdr hdr;
struct bcm2835_mbox_tag_get_board_serial get_board_serial;
u32 end_tag;
};
struct msg_get_mac_address {
struct bcm2835_mbox_hdr hdr;
struct bcm2835_mbox_tag_get_mac_address get_mac_address;
u32 end_tag;
};
struct msg_get_clock_rate {
struct bcm2835_mbox_hdr hdr;
struct bcm2835_mbox_tag_get_clock_rate get_clock_rate;
u32 end_tag;
};
#ifdef CONFIG_ARM64
#define DTB_DIR "broadcom/"
#else
#define DTB_DIR ""
#endif
/*
* https://www.raspberrypi.com/documentation/computers/raspberry-pi.html#raspberry-pi-revision-codes
*/
struct rpi_model {
const char *name;
const char *fdtfile;
bool has_onboard_eth;
};
static const struct rpi_model rpi_model_unknown = {
"Unknown model",
DTB_DIR "bcm283x-rpi-other.dtb",
false,
};
static const struct rpi_model rpi_models_new_scheme[] = {
[0x0] = {
"Model A",
DTB_DIR "bcm2835-rpi-a.dtb",
false,
},
[0x1] = {
"Model B",
DTB_DIR "bcm2835-rpi-b.dtb",
true,
},
[0x2] = {
"Model A+",
DTB_DIR "bcm2835-rpi-a-plus.dtb",
false,
},
[0x3] = {
"Model B+",
DTB_DIR "bcm2835-rpi-b-plus.dtb",
true,
},
[0x4] = {
"2 Model B",
DTB_DIR "bcm2836-rpi-2-b.dtb",
true,
},
[0x6] = {
"Compute Module",
DTB_DIR "bcm2835-rpi-cm.dtb",
false,
},
[0x8] = {
"3 Model B",
DTB_DIR "bcm2837-rpi-3-b.dtb",
true,
},
[0x9] = {
"Zero",
DTB_DIR "bcm2835-rpi-zero.dtb",
false,
},
[0xA] = {
"Compute Module 3",
DTB_DIR "bcm2837-rpi-cm3.dtb",
false,
},
[0xC] = {
"Zero W",
DTB_DIR "bcm2835-rpi-zero-w.dtb",
false,
},
[0xD] = {
"3 Model B+",
DTB_DIR "bcm2837-rpi-3-b-plus.dtb",
true,
},
[0xE] = {
"3 Model A+",
DTB_DIR "bcm2837-rpi-3-a-plus.dtb",
false,
},
[0x10] = {
"Compute Module 3+",
DTB_DIR "bcm2837-rpi-cm3.dtb",
false,
},
[0x11] = {
"4 Model B",
DTB_DIR "bcm2711-rpi-4-b.dtb",
true,
},
[0x12] = {
"Zero 2 W",
DTB_DIR "bcm2837-rpi-zero-2-w.dtb",
false,
},
[0x13] = {
"400",
DTB_DIR "bcm2711-rpi-400.dtb",
true,
},
[0x14] = {
"Compute Module 4",
DTB_DIR "bcm2711-rpi-cm4.dtb",
true,
},
};
static const struct rpi_model rpi_models_old_scheme[] = {
[0x2] = {
"Model B",
DTB_DIR "bcm2835-rpi-b.dtb",
true,
},
[0x3] = {
"Model B",
DTB_DIR "bcm2835-rpi-b.dtb",
true,
},
[0x4] = {
"Model B rev2",
DTB_DIR "bcm2835-rpi-b-rev2.dtb",
true,
},
[0x5] = {
"Model B rev2",
DTB_DIR "bcm2835-rpi-b-rev2.dtb",
true,
},
[0x6] = {
"Model B rev2",
DTB_DIR "bcm2835-rpi-b-rev2.dtb",
true,
},
[0x7] = {
"Model A",
DTB_DIR "bcm2835-rpi-a.dtb",
false,
},
[0x8] = {
"Model A",
DTB_DIR "bcm2835-rpi-a.dtb",
false,
},
[0x9] = {
"Model A",
DTB_DIR "bcm2835-rpi-a.dtb",
false,
},
[0xd] = {
"Model B rev2",
DTB_DIR "bcm2835-rpi-b-rev2.dtb",
true,
},
[0xe] = {
"Model B rev2",
DTB_DIR "bcm2835-rpi-b-rev2.dtb",
true,
},
[0xf] = {
"Model B rev2",
DTB_DIR "bcm2835-rpi-b-rev2.dtb",
true,
},
[0x10] = {
"Model B+",
DTB_DIR "bcm2835-rpi-b-plus.dtb",
true,
},
[0x11] = {
"Compute Module",
DTB_DIR "bcm2835-rpi-cm.dtb",
false,
},
[0x12] = {
"Model A+",
DTB_DIR "bcm2835-rpi-a-plus.dtb",
false,
},
[0x13] = {
"Model B+",
DTB_DIR "bcm2835-rpi-b-plus.dtb",
true,
},
[0x14] = {
"Compute Module",
DTB_DIR "bcm2835-rpi-cm.dtb",
false,
},
[0x15] = {
"Model A+",
DTB_DIR "bcm2835-rpi-a-plus.dtb",
false,
},
};
static uint32_t revision;
static uint32_t rev_scheme;
static uint32_t rev_type;
static const struct rpi_model *model;
int dram_init(void)
{
ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_arm_mem, msg, 1);
int ret;
BCM2835_MBOX_INIT_HDR(msg);
BCM2835_MBOX_INIT_TAG(&msg->get_arm_mem, GET_ARM_MEMORY);
ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg->hdr);
if (ret) {
printf("bcm2835: Could not query ARM memory size\n");
return -1;
}
gd->ram_size = msg->get_arm_mem.body.resp.mem_size;
/*
* In some configurations the memory size returned by VideoCore
* is not aligned to the section size, what is mandatory for
* the u-boot's memory setup.
*/
gd->ram_size &= ~MMU_SECTION_SIZE;
return 0;
}
#ifdef CONFIG_OF_BOARD
int dram_init_banksize(void)
{
int ret;
ret = fdtdec_setup_memory_banksize();
if (ret)
return ret;
return fdtdec_setup_mem_size_base();
}
#endif
static void set_fdtfile(void)
{
const char *fdtfile;
if (env_get("fdtfile"))
return;
fdtfile = model->fdtfile;
env_set("fdtfile", fdtfile);
}
/*
* If the firmware provided a valid FDT at boot time, let's expose it in
* ${fdt_addr} so it may be passed unmodified to the kernel.
*/
static void set_fdt_addr(void)
{
if (env_get("fdt_addr"))
return;
if (fdt_magic(fw_dtb_pointer) != FDT_MAGIC)
return;
env_set_hex("fdt_addr", fw_dtb_pointer);
}
/*
* Prevent relocation from stomping on a firmware provided FDT blob.
*/
phys_size_t board_get_usable_ram_top(phys_size_t total_size)
{
if ((gd->ram_top - fw_dtb_pointer) > SZ_64M)
return gd->ram_top;
return fw_dtb_pointer & ~0xffff;
}
static void set_usbethaddr(void)
{
ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_mac_address, msg, 1);
int ret;
if (!model->has_onboard_eth)
return;
if (env_get("usbethaddr"))
return;
BCM2835_MBOX_INIT_HDR(msg);
BCM2835_MBOX_INIT_TAG(&msg->get_mac_address, GET_MAC_ADDRESS);
ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg->hdr);
if (ret) {
printf("bcm2835: Could not query MAC address\n");
/* Ignore error; not critical */
return;
}
eth_env_set_enetaddr("usbethaddr", msg->get_mac_address.body.resp.mac);
if (!env_get("ethaddr"))
env_set("ethaddr", env_get("usbethaddr"));
return;
}
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
static void set_board_info(void)
{
char s[11];
snprintf(s, sizeof(s), "0x%X", revision);
env_set("board_revision", s);
snprintf(s, sizeof(s), "%d", rev_scheme);
env_set("board_rev_scheme", s);
/* Can't rename this to board_rev_type since it's an ABI for scripts */
snprintf(s, sizeof(s), "0x%X", rev_type);
env_set("board_rev", s);
env_set("board_name", model->name);
}
#endif /* CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG */
static void set_serial_number(void)
{
ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_board_serial, msg, 1);
int ret;
char serial_string[17] = { 0 };
if (env_get("serial#"))
return;
BCM2835_MBOX_INIT_HDR(msg);
BCM2835_MBOX_INIT_TAG_NO_REQ(&msg->get_board_serial, GET_BOARD_SERIAL);
ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg->hdr);
if (ret) {
printf("bcm2835: Could not query board serial\n");
/* Ignore error; not critical */
return;
}
snprintf(serial_string, sizeof(serial_string), "%016llx",
msg->get_board_serial.body.resp.serial);
env_set("serial#", serial_string);
}
int misc_init_r(void)
{
set_fdt_addr();
set_fdtfile();
set_usbethaddr();
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
set_board_info();
#endif
set_serial_number();
return 0;
}
static void get_board_revision(void)
{
ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_board_rev, msg, 1);
int ret;
const struct rpi_model *models;
uint32_t models_count;
BCM2835_MBOX_INIT_HDR(msg);
BCM2835_MBOX_INIT_TAG(&msg->get_board_rev, GET_BOARD_REV);
ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg->hdr);
if (ret) {
printf("bcm2835: Could not query board revision\n");
/* Ignore error; not critical */
return;
}
/*
* For details of old-vs-new scheme, see:
* https://github.com/pimoroni/RPi.version/blob/master/RPi/version.py
* http://www.raspberrypi.org/forums/viewtopic.php?f=63&t=99293&p=690282
* (a few posts down)
*
* For the RPi 1, bit 24 is the "warranty bit", so we mask off just the
* lower byte to use as the board rev:
* http://www.raspberrypi.org/forums/viewtopic.php?f=63&t=98367&start=250
* http://www.raspberrypi.org/forums/viewtopic.php?f=31&t=20594
*/
revision = msg->get_board_rev.body.resp.rev;
if (revision & 0x800000) {
rev_scheme = 1;
rev_type = (revision >> 4) & 0xff;
models = rpi_models_new_scheme;
models_count = ARRAY_SIZE(rpi_models_new_scheme);
} else {
rev_scheme = 0;
rev_type = revision & 0xff;
models = rpi_models_old_scheme;
models_count = ARRAY_SIZE(rpi_models_old_scheme);
}
if (rev_type >= models_count) {
printf("RPI: Board rev 0x%x outside known range\n", rev_type);
model = &rpi_model_unknown;
} else if (!models[rev_type].name) {
printf("RPI: Board rev 0x%x unknown\n", rev_type);
model = &rpi_model_unknown;
} else {
model = &models[rev_type];
}
printf("RPI %s (0x%x)\n", model->name, revision);
}
int board_init(void)
{
#ifdef CONFIG_HW_WATCHDOG
hw_watchdog_init();
#endif
get_board_revision();
gd->bd->bi_boot_params = 0x100;
return bcm2835_power_on_module(BCM2835_MBOX_POWER_DEVID_USB_HCD);
}
/*
* If the firmware passed a device tree use it for U-Boot.
*/
void *board_fdt_blob_setup(int *err)
{
*err = 0;
if (fdt_magic(fw_dtb_pointer) != FDT_MAGIC) {
*err = -ENXIO;
return NULL;
}
return (void *)fw_dtb_pointer;
}
int copy_property(void *dst, void *src, char *path, char *property)
{
int dst_offset, src_offset;
const fdt32_t *prop;
int len;
src_offset = fdt_path_offset(src, path);
dst_offset = fdt_path_offset(dst, path);
if (src_offset < 0 || dst_offset < 0)
return -1;
prop = fdt_getprop(src, src_offset, property, &len);
if (!prop)
return -1;
return fdt_setprop(dst, dst_offset, property, prop, len);
}
/* Copy tweaks from the firmware dtb to the loaded dtb */
void update_fdt_from_fw(void *fdt, void *fw_fdt)
{
/* Using dtb from firmware directly; leave it alone */
if (fdt == fw_fdt)
return;
/* The firmware provides a more precie model; so copy that */
copy_property(fdt, fw_fdt, "/", "model");
/* memory reserve as suggested by the firmware */
copy_property(fdt, fw_fdt, "/", "memreserve");
/* Adjust dma-ranges for the SD card and PCI bus as they can depend on
* the SoC revision
*/
copy_property(fdt, fw_fdt, "emmc2bus", "dma-ranges");
copy_property(fdt, fw_fdt, "pcie0", "dma-ranges");
/* Bootloader configuration template exposes as nvmem */
if (copy_property(fdt, fw_fdt, "blconfig", "reg") == 0)
copy_property(fdt, fw_fdt, "blconfig", "status");
/* kernel address randomisation seed as provided by the firmware */
copy_property(fdt, fw_fdt, "/chosen", "kaslr-seed");
/* address of the PHY device as provided by the firmware */
copy_property(fdt, fw_fdt, "ethernet0/mdio@e14/ethernet-phy@1", "reg");
}
int ft_board_setup(void *blob, struct bd_info *bd)
{
int node;
update_fdt_from_fw(blob, (void *)fw_dtb_pointer);
node = fdt_node_offset_by_compatible(blob, -1, "simple-framebuffer");
if (node < 0)
fdt_simplefb_add_node(blob);
else
fdt_simplefb_enable_and_mem_rsv(blob);
#ifdef CONFIG_EFI_LOADER
/* Reserve the spin table */
efi_add_memory_map(0, CONFIG_RPI_EFI_NR_SPIN_PAGES << EFI_PAGE_SHIFT,
EFI_RESERVED_MEMORY_TYPE);
#endif
return 0;
}