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u-boot/post/lib_powerpc/asm.S

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SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-06 21:58:06 +00:00
/* SPDX-License-Identifier: GPL-2.0+ */
Restructure POST directory to support of other CPUs, boards, etc.
2007-03-06 17:08:43 +00:00
/*
* Copyright (C) 2002 Wolfgang Denk <wd@denx.de>
*/
#include <config.h>
#include <post.h>
#include <ppc_asm.tmpl>
#include <ppc_defs.h>
#include <asm/cache.h>
post: Move CONFIG_SYS_POST to CFG_SYS_POST Migrate the rest of the CONFIG_SYS_POST macros over to CFG_SYS_POST namespace. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-04 15:14:17 +00:00
#if CFG_POST & CFG_SYS_POST_CPU
Restructure POST directory to support of other CPUs, boards, etc.
2007-03-06 17:08:43 +00:00
/* void cpu_post_exec_02 (ulong *code, ulong op1, ulong op2); */
.global cpu_post_exec_02
cpu_post_exec_02:
Extend POST support for PPC440 Added memory, CPU, UART, I2C and SPR POST tests for PPC440. Signed-off-by: Igor Lisitsin <igor@emcraft.com> --
2007-03-28 15:06:19 +00:00
isync
Restructure POST directory to support of other CPUs, boards, etc.
2007-03-06 17:08:43 +00:00
mflr r0
stwu r0, -4(r1)
subi r1, r1, 104
stmw r6, 0(r1)
mtlr r3
mr r3, r4
mr r4, r5
blrl
lmw r6, 0(r1)
addi r1, r1, 104
lwz r0, 0(r1)
addi r1, r1, 4
mtlr r0
blr
/* void cpu_post_exec_04 (ulong *code, ulong op1, ulong op2, ulong op3, ulong op4); */
.global cpu_post_exec_04
cpu_post_exec_04:
Extend POST support for PPC440 Added memory, CPU, UART, I2C and SPR POST tests for PPC440. Signed-off-by: Igor Lisitsin <igor@emcraft.com> --
2007-03-28 15:06:19 +00:00
isync
Restructure POST directory to support of other CPUs, boards, etc.
2007-03-06 17:08:43 +00:00
mflr r0
stwu r0, -4(r1)
subi r1, r1, 96
stmw r8, 0(r1)
mtlr r3
mr r3, r4
mr r4, r5
mr r5, r6
mtxer r7
blrl
lmw r8, 0(r1)
addi r1, r1, 96
lwz r0, 0(r1)
addi r1, r1, 4
mtlr r0
blr
/* void cpu_post_exec_12 (ulong *code, ulong *res, ulong op1, ulong op2); */
.global cpu_post_exec_12
cpu_post_exec_12:
Extend POST support for PPC440 Added memory, CPU, UART, I2C and SPR POST tests for PPC440. Signed-off-by: Igor Lisitsin <igor@emcraft.com> --
2007-03-28 15:06:19 +00:00
isync
Restructure POST directory to support of other CPUs, boards, etc.
2007-03-06 17:08:43 +00:00
mflr r0
stwu r0, -4(r1)
stwu r4, -4(r1)
mtlr r3
mr r3, r5
mr r4, r6
blrl
lwz r4, 0(r1)
stw r3, 0(r4)
lwz r0, 4(r1)
addi r1, r1, 8
mtlr r0
blr
/* void cpu_post_exec_11 (ulong *code, ulong *res, ulong op1); */
.global cpu_post_exec_11
cpu_post_exec_11:
Extend POST support for PPC440 Added memory, CPU, UART, I2C and SPR POST tests for PPC440. Signed-off-by: Igor Lisitsin <igor@emcraft.com> --
2007-03-28 15:06:19 +00:00
isync
Restructure POST directory to support of other CPUs, boards, etc.
2007-03-06 17:08:43 +00:00
mflr r0
stwu r0, -4(r1)
stwu r4, -4(r1)
mtlr r3
mr r3, r5
blrl
lwz r4, 0(r1)
stw r3, 0(r4)
lwz r0, 4(r1)
addi r1, r1, 8
mtlr r0
blr
/* void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op1); */
.global cpu_post_exec_21
cpu_post_exec_21:
Extend POST support for PPC440 Added memory, CPU, UART, I2C and SPR POST tests for PPC440. Signed-off-by: Igor Lisitsin <igor@emcraft.com> --
2007-03-28 15:06:19 +00:00
isync
Restructure POST directory to support of other CPUs, boards, etc.
2007-03-06 17:08:43 +00:00
mflr r0
stwu r0, -4(r1)
stwu r4, -4(r1)
stwu r5, -4(r1)
li r0, 0
mtxer r0
lwz r0, 0(r4)
mtcr r0
mtlr r3
mr r3, r6
blrl
mfcr r0
lwz r4, 4(r1)
stw r0, 0(r4)
lwz r4, 0(r1)
stw r3, 0(r4)
lwz r0, 8(r1)
addi r1, r1, 12
mtlr r0
blr
/* void cpu_post_exec_22 (ulong *code, ulong *cr, ulong *res, ulong op1,
ulong op2); */
.global cpu_post_exec_22
cpu_post_exec_22:
Extend POST support for PPC440 Added memory, CPU, UART, I2C and SPR POST tests for PPC440. Signed-off-by: Igor Lisitsin <igor@emcraft.com> --
2007-03-28 15:06:19 +00:00
isync
Restructure POST directory to support of other CPUs, boards, etc.
2007-03-06 17:08:43 +00:00
mflr r0
stwu r0, -4(r1)
stwu r4, -4(r1)
stwu r5, -4(r1)
li r0, 0
mtxer r0
lwz r0, 0(r4)
mtcr r0
mtlr r3
mr r3, r6
mr r4, r7
blrl
mfcr r0
lwz r4, 4(r1)
stw r0, 0(r4)
lwz r4, 0(r1)
stw r3, 0(r4)
lwz r0, 8(r1)
addi r1, r1, 12
mtlr r0
blr
/* void cpu_post_exec_12w (ulong *code, ulong *op1, ulong op2, ulong op3); */
.global cpu_post_exec_12w
cpu_post_exec_12w:
Extend POST support for PPC440 Added memory, CPU, UART, I2C and SPR POST tests for PPC440. Signed-off-by: Igor Lisitsin <igor@emcraft.com> --
2007-03-28 15:06:19 +00:00
isync
Restructure POST directory to support of other CPUs, boards, etc.
2007-03-06 17:08:43 +00:00
mflr r0
stwu r0, -4(r1)
stwu r4, -4(r1)
mtlr r3
lwz r3, 0(r4)
mr r4, r5
mr r5, r6
blrl
lwz r4, 0(r1)
stw r3, 0(r4)
lwz r0, 4(r1)
addi r1, r1, 8
mtlr r0
blr
/* void cpu_post_exec_11w (ulong *code, ulong *op1, ulong op2); */
.global cpu_post_exec_11w
cpu_post_exec_11w:
Extend POST support for PPC440 Added memory, CPU, UART, I2C and SPR POST tests for PPC440. Signed-off-by: Igor Lisitsin <igor@emcraft.com> --
2007-03-28 15:06:19 +00:00
isync
Restructure POST directory to support of other CPUs, boards, etc.
2007-03-06 17:08:43 +00:00
mflr r0
stwu r0, -4(r1)
stwu r4, -4(r1)
mtlr r3
lwz r3, 0(r4)
mr r4, r5
blrl
lwz r4, 0(r1)
stw r3, 0(r4)
lwz r0, 4(r1)
addi r1, r1, 8
mtlr r0
blr
/* void cpu_post_exec_22w (ulong *code, ulong *op1, ulong op2, ulong *op3); */
.global cpu_post_exec_22w
cpu_post_exec_22w:
Extend POST support for PPC440 Added memory, CPU, UART, I2C and SPR POST tests for PPC440. Signed-off-by: Igor Lisitsin <igor@emcraft.com> --
2007-03-28 15:06:19 +00:00
isync
Restructure POST directory to support of other CPUs, boards, etc.
2007-03-06 17:08:43 +00:00
mflr r0
stwu r0, -4(r1)
stwu r4, -4(r1)
stwu r6, -4(r1)
mtlr r3
lwz r3, 0(r4)
mr r4, r5
blrl
lwz r4, 4(r1)
stw r3, 0(r4)
lwz r4, 0(r1)
stw r5, 0(r4)
lwz r0, 8(r1)
addi r1, r1, 12
mtlr r0
blr
/* void cpu_post_exec_21w (ulong *code, ulong *op1, ulong *op2); */
.global cpu_post_exec_21w
cpu_post_exec_21w:
Extend POST support for PPC440 Added memory, CPU, UART, I2C and SPR POST tests for PPC440. Signed-off-by: Igor Lisitsin <igor@emcraft.com> --
2007-03-28 15:06:19 +00:00
isync
Restructure POST directory to support of other CPUs, boards, etc.
2007-03-06 17:08:43 +00:00
mflr r0
stwu r0, -4(r1)
stwu r4, -4(r1)
stwu r5, -4(r1)
mtlr r3
lwz r3, 0(r4)
blrl
lwz r5, 4(r1)
stw r3, 0(r5)
lwz r5, 0(r1)
stw r4, 0(r5)
lwz r0, 8(r1)
addi r1, r1, 12
mtlr r0
blr
/* void cpu_post_exec_21x (ulong *code, ulong *op1, ulong *op2, ulong op3); */
.global cpu_post_exec_21x
cpu_post_exec_21x:
Extend POST support for PPC440 Added memory, CPU, UART, I2C and SPR POST tests for PPC440. Signed-off-by: Igor Lisitsin <igor@emcraft.com> --
2007-03-28 15:06:19 +00:00
isync
Restructure POST directory to support of other CPUs, boards, etc.
2007-03-06 17:08:43 +00:00
mflr r0
stwu r0, -4(r1)
stwu r4, -4(r1)
stwu r5, -4(r1)
mtlr r3
mr r3, r6
blrl
lwz r5, 4(r1)
stw r3, 0(r5)
lwz r5, 0(r1)
stw r4, 0(r5)
lwz r0, 8(r1)
addi r1, r1, 12
mtlr r0
blr
/* void cpu_post_exec_31 (ulong *code, ulong *ctr, ulong *lr, ulong *jump,
ulong cr); */
.global cpu_post_exec_31
cpu_post_exec_31:
Extend POST support for PPC440 Added memory, CPU, UART, I2C and SPR POST tests for PPC440. Signed-off-by: Igor Lisitsin <igor@emcraft.com> --
2007-03-28 15:06:19 +00:00
isync
Restructure POST directory to support of other CPUs, boards, etc.
2007-03-06 17:08:43 +00:00
mflr r0
stwu r0, -4(r1)
stwu r4, -4(r1)
stwu r5, -4(r1)
stwu r6, -4(r1)
mtlr r3
lwz r3, 0(r4)
lwz r4, 0(r5)
mr r6, r7
Fix CPU POST test failure The CPU POST test code (run from cpu_post_exec_31()) doesn't follow the ABI carefully, at least the CR3, CR4, and CR5 fields of CR are clobbered by it. The gcc-4.2 with its more aggressive optimization exposes this fact. This patch just saves the CR value before running the test code, so allowing it to do anything it wants with CR. Signed-off-by: Dmitry Rakhchev <rda@emcraft.com> Acked-by: Yuri Tikhonov <yur@emcraft.com> --
2008-02-21 10:06:07 +00:00
mfcr r7
Restructure POST directory to support of other CPUs, boards, etc.
2007-03-06 17:08:43 +00:00
blrl
Fix CPU POST test failure The CPU POST test code (run from cpu_post_exec_31()) doesn't follow the ABI carefully, at least the CR3, CR4, and CR5 fields of CR are clobbered by it. The gcc-4.2 with its more aggressive optimization exposes this fact. This patch just saves the CR value before running the test code, so allowing it to do anything it wants with CR. Signed-off-by: Dmitry Rakhchev <rda@emcraft.com> Acked-by: Yuri Tikhonov <yur@emcraft.com> --
2008-02-21 10:06:07 +00:00
mtcr r7
Restructure POST directory to support of other CPUs, boards, etc.
2007-03-06 17:08:43 +00:00
lwz r7, 8(r1)
stw r3, 0(r7)
lwz r7, 4(r1)
stw r4, 0(r7)
lwz r7, 0(r1)
stw r5, 0(r7)
lwz r0, 12(r1)
addi r1, r1, 16
mtlr r0
blr
/* int cpu_post_complex_1_asm (int a1, int a2, int a3, int a4, int n); */
.global cpu_post_complex_1_asm
cpu_post_complex_1_asm:
li r9,0
cmpw r9,r7
bge cpu_post_complex_1_done
mtctr r7
cpu_post_complex_1_loop:
mullw r0,r3,r4
subf r0,r5,r0
divw r0,r0,r6
add r9,r9,r0
bdnz cpu_post_complex_1_loop
cpu_post_complex_1_done:
mr r3,r9
blr
/* int cpu_post_complex_2_asm (int x, int n); */
.global cpu_post_complex_2_asm
cpu_post_complex_2_asm:
mr. r0,r4
mtctr r0
mr r0,r3
li r3,1
li r4,1
blelr
cpu_post_complex_2_loop:
mullw r3,r3,r0
add r3,r3,r4
bdnz cpu_post_complex_2_loop
blr
#endif
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