2022-01-22 19:38:11 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2017 NXP Semiconductors
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* Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
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*/
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#include <common.h>
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#include <dm.h>
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2023-05-04 22:55:07 +00:00
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#include <init.h>
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2022-01-22 19:38:11 +00:00
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#include <pci.h>
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#include "nvme.h"
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static int nvme_bind(struct udevice *udev)
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{
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static int ndev_num;
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char name[20];
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sprintf(name, "nvme#%d", ndev_num++);
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return device_set_name(udev, name);
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}
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static int nvme_probe(struct udevice *udev)
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{
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struct nvme_dev *ndev = dev_get_priv(udev);
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struct pci_child_plat *pplat;
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pplat = dev_get_parent_plat(udev);
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sprintf(ndev->vendor, "0x%.4x", pplat->vendor);
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ndev->instance = trailing_strtol(udev->name);
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2022-04-21 16:11:10 +00:00
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ndev->bar = dm_pci_map_bar(udev, PCI_BASE_ADDRESS_0, 0, 0,
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2022-04-21 16:11:13 +00:00
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PCI_REGION_TYPE, PCI_REGION_MEM);
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2023-05-04 22:55:07 +00:00
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/* Turn on bus-mastering */
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dm_pci_clrset_config16(udev, PCI_COMMAND, 0, PCI_COMMAND_MASTER);
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2022-01-22 19:38:11 +00:00
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return nvme_init(udev);
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}
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U_BOOT_DRIVER(nvme) = {
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.name = "nvme",
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.id = UCLASS_NVME,
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.bind = nvme_bind,
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.probe = nvme_probe,
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.priv_auto = sizeof(struct nvme_dev),
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};
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struct pci_device_id nvme_supported[] = {
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{ PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, ~0) },
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{}
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};
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U_BOOT_PCI_DEVICE(nvme, nvme_supported);
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