2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2014-04-14 10:42:06 +00:00
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/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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*/
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#include <common.h>
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#include <asm/fsl_law.h>
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#include <asm/mmu.h>
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struct law_entry law_table[] = {
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2022-11-16 18:10:41 +00:00
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SET_LAW(CFG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_IFC),
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#ifdef CFG_SYS_BMAN_MEM_PHYS
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SET_LAW(CFG_SYS_BMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_BMAN),
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2014-04-14 10:42:06 +00:00
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#endif
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2022-11-16 18:10:41 +00:00
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#ifdef CFG_SYS_QMAN_MEM_PHYS
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SET_LAW(CFG_SYS_QMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_QMAN),
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2014-04-14 10:42:06 +00:00
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#endif
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2022-11-16 18:10:41 +00:00
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#ifdef CFG_SYS_CPLD_BASE_PHYS
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SET_LAW(CFG_SYS_CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
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2014-09-12 06:47:09 +00:00
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#endif
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2022-11-16 18:10:41 +00:00
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#ifdef CFG_SYS_DCSRBAR_PHYS
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2014-04-14 10:42:06 +00:00
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/* Limit DCSR to 32M to access NPC Trace Buffer */
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2022-11-16 18:10:41 +00:00
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SET_LAW(CFG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
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2014-04-14 10:42:06 +00:00
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#endif
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2022-11-12 22:36:51 +00:00
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#ifdef CFG_SYS_NAND_BASE_PHYS
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SET_LAW(CFG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
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2014-04-14 10:42:06 +00:00
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#endif
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};
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int num_law_entries = ARRAY_SIZE(law_table);
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