2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2002-11-18 00:14:45 +00:00
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/*
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2011-04-13 09:43:26 +00:00
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* (C) Copyright 2008-2011
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* Graeme Russ, <graeme.russ@gmail.com>
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2009-11-24 09:04:18 +00:00
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*
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2002-11-18 00:14:45 +00:00
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* (C) Copyright 2002
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2011-08-04 16:45:45 +00:00
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* Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
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2002-11-18 00:14:45 +00:00
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*
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2010-04-23 14:05:38 +00:00
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* Portions of this file are derived from the Linux kernel source
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* Copyright (C) 1991, 1992 Linus Torvalds
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2002-11-18 00:14:45 +00:00
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*/
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#include <common.h>
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2016-01-20 04:32:26 +00:00
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#include <dm.h>
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2019-08-25 17:55:12 +00:00
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#include <efi_loader.h>
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2019-12-28 17:45:07 +00:00
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#include <hang.h>
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2019-12-28 17:44:56 +00:00
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#include <init.h>
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2020-02-06 16:54:58 +00:00
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#include <irq.h>
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2019-11-14 19:57:41 +00:00
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#include <irq_func.h>
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2012-12-02 04:49:50 +00:00
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#include <asm/control_regs.h>
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2016-05-22 08:45:33 +00:00
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#include <asm/i8259.h>
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2008-12-06 23:29:01 +00:00
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#include <asm/interrupt.h>
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2011-02-12 04:11:28 +00:00
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#include <asm/io.h>
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2016-05-22 08:45:33 +00:00
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#include <asm/lapic.h>
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#include <asm/processor-flags.h>
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2020-05-10 17:40:06 +00:00
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#include <asm/ptrace.h>
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2002-11-18 00:14:45 +00:00
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2013-04-17 16:13:33 +00:00
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DECLARE_GLOBAL_DATA_PTR;
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2009-11-24 09:04:18 +00:00
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#define DECLARE_INTERRUPT(x) \
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".globl irq_"#x"\n" \
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2009-11-24 09:04:19 +00:00
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".hidden irq_"#x"\n" \
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".type irq_"#x", @function\n" \
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2009-11-24 09:04:18 +00:00
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"irq_"#x":\n" \
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"pushl $"#x"\n" \
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2017-02-10 02:54:13 +00:00
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"jmp.d32 irq_common_entry\n"
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2002-11-18 00:14:45 +00:00
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2015-07-10 02:51:23 +00:00
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static char *exceptions[] = {
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"Divide Error",
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"Debug",
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"NMI Interrupt",
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"Breakpoint",
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"Overflow",
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"BOUND Range Exceeded",
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"Invalid Opcode (Undefined Opcode)",
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2019-05-03 22:28:37 +00:00
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"Device Not Available (No Math Coprocessor)",
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2015-07-10 02:51:23 +00:00
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"Double Fault",
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"Coprocessor Segment Overrun",
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"Invalid TSS",
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"Segment Not Present",
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"Stack Segment Fault",
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2015-07-31 15:31:32 +00:00
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"General Protection",
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2015-07-10 02:51:23 +00:00
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"Page Fault",
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"Reserved",
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"x87 FPU Floating-Point Error",
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"Alignment Check",
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"Machine Check",
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"SIMD Floating-Point Exception",
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"Virtualization Exception",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved"
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};
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2019-08-25 17:55:12 +00:00
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/**
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* show_efi_loaded_images() - show loaded UEFI images
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*
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* List all loaded UEFI images.
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*
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* @eip: instruction pointer
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*/
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static void show_efi_loaded_images(uintptr_t eip)
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{
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efi_print_image_infos((void *)eip);
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}
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2014-11-06 20:20:08 +00:00
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static void dump_regs(struct irq_regs *regs)
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2010-04-23 14:05:38 +00:00
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{
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2015-07-10 02:38:32 +00:00
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unsigned long cs, eip, eflags;
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2010-04-23 14:05:38 +00:00
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unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L;
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unsigned long d0, d1, d2, d3, d6, d7;
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2011-02-12 04:11:28 +00:00
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unsigned long sp;
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2010-04-23 14:05:38 +00:00
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2015-07-10 02:38:32 +00:00
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/*
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* Some exceptions cause an error code to be saved on the current stack
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* after the EIP value. We should extract CS/EIP/EFLAGS from different
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* position on the stack based on the exception number.
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*/
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switch (regs->irq_id) {
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case EXC_DF:
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case EXC_TS:
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case EXC_NP:
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case EXC_SS:
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case EXC_GP:
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case EXC_PF:
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case EXC_AC:
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cs = regs->context.ctx2.xcs;
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eip = regs->context.ctx2.eip;
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eflags = regs->context.ctx2.eflags;
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/* We should fix up the ESP due to error code */
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regs->esp += 4;
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break;
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default:
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cs = regs->context.ctx1.xcs;
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eip = regs->context.ctx1.eip;
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eflags = regs->context.ctx1.eflags;
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break;
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}
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2010-04-23 14:05:38 +00:00
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printf("EIP: %04x:[<%08lx>] EFLAGS: %08lx\n",
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2015-07-10 02:38:32 +00:00
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(u16)cs, eip, eflags);
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2015-08-11 04:02:54 +00:00
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if (gd->flags & GD_FLG_RELOC)
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printf("Original EIP :[<%08lx>]\n", eip - gd->reloc_off);
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2010-04-23 14:05:38 +00:00
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printf("EAX: %08lx EBX: %08lx ECX: %08lx EDX: %08lx\n",
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regs->eax, regs->ebx, regs->ecx, regs->edx);
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printf("ESI: %08lx EDI: %08lx EBP: %08lx ESP: %08lx\n",
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regs->esi, regs->edi, regs->ebp, regs->esp);
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printf(" DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x\n",
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2011-11-08 02:33:13 +00:00
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(u16)regs->xds, (u16)regs->xes, (u16)regs->xfs,
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(u16)regs->xgs, (u16)regs->xss);
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2010-04-23 14:05:38 +00:00
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cr0 = read_cr0();
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cr2 = read_cr2();
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cr3 = read_cr3();
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cr4 = read_cr4();
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printf("CR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n",
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cr0, cr2, cr3, cr4);
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d0 = get_debugreg(0);
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d1 = get_debugreg(1);
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d2 = get_debugreg(2);
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d3 = get_debugreg(3);
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printf("DR0: %08lx DR1: %08lx DR2: %08lx DR3: %08lx\n",
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d0, d1, d2, d3);
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d6 = get_debugreg(6);
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d7 = get_debugreg(7);
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printf("DR6: %08lx DR7: %08lx\n",
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d6, d7);
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2011-02-12 04:11:28 +00:00
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printf("Stack:\n");
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sp = regs->esp;
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sp += 64;
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while (sp > (regs->esp - 16)) {
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if (sp == regs->esp)
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printf("--->");
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else
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printf(" ");
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printf("0x%8.8lx : 0x%8.8lx\n", sp, (ulong)readl(sp));
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sp -= 4;
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}
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2019-08-25 17:55:12 +00:00
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show_efi_loaded_images(eip);
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2010-04-23 14:05:38 +00:00
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}
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2015-07-10 02:51:23 +00:00
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static void do_exception(struct irq_regs *regs)
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{
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printf("%s\n", exceptions[regs->irq_id]);
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dump_regs(regs);
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hang();
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}
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2002-11-18 00:14:45 +00:00
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struct idt_entry {
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u16 base_low;
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u16 selector;
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u8 res;
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u8 access;
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u16 base_high;
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2011-11-08 02:33:13 +00:00
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} __packed;
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2002-11-18 00:14:45 +00:00
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2009-11-24 09:04:18 +00:00
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struct desc_ptr {
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unsigned short size;
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unsigned long address;
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2011-11-08 02:33:13 +00:00
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} __packed;
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2002-11-18 00:14:45 +00:00
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2011-12-19 03:26:18 +00:00
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struct idt_entry idt[256] __aligned(16);
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2002-11-18 00:14:45 +00:00
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2009-11-24 09:04:18 +00:00
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struct desc_ptr idt_ptr;
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2002-11-18 00:14:45 +00:00
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2009-11-24 09:04:18 +00:00
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static inline void load_idt(const struct desc_ptr *dtr)
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{
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2011-11-08 02:33:13 +00:00
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asm volatile("cs lidt %0" : : "m" (*dtr));
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2009-11-24 09:04:18 +00:00
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}
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2002-11-18 00:14:45 +00:00
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2009-02-24 10:13:40 +00:00
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void set_vector(u8 intnum, void *routine)
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2002-11-18 00:14:45 +00:00
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{
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2016-09-26 03:33:25 +00:00
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idt[intnum].base_high = (u16)((ulong)(routine) >> 16);
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idt[intnum].base_low = (u16)((ulong)(routine) & 0xffff);
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2002-11-18 00:14:45 +00:00
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}
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2011-11-08 02:33:13 +00:00
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/*
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* Ideally these would be defined static to avoid a checkpatch warning, but
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* the compiler cannot see them in the inline asm and complains that they
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* aren't defined
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*/
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2009-11-24 09:04:18 +00:00
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void irq_0(void);
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void irq_1(void);
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2002-11-18 00:14:45 +00:00
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2009-02-24 10:13:40 +00:00
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int cpu_init_interrupts(void)
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2002-11-18 00:14:45 +00:00
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{
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int i;
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2003-06-27 21:31:46 +00:00
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2009-11-24 09:04:18 +00:00
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int irq_entry_size = irq_1 - irq_0;
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void *irq_entry = (void *)irq_0;
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2002-11-18 00:14:45 +00:00
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/* Setup the IDT */
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2011-11-08 02:33:13 +00:00
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for (i = 0; i < 256; i++) {
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2002-11-18 00:14:45 +00:00
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idt[i].access = 0x8e;
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2003-06-27 21:31:46 +00:00
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idt[i].res = 0;
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2015-07-31 15:31:32 +00:00
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idt[i].selector = X86_GDT_ENTRY_32BIT_CS * X86_GDT_ENTRY_SIZE;
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2009-11-24 09:04:18 +00:00
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set_vector(i, irq_entry);
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irq_entry += irq_entry_size;
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2003-06-27 21:31:46 +00:00
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}
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2015-07-31 15:31:32 +00:00
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idt_ptr.size = 256 * 8 - 1;
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2009-11-24 09:04:18 +00:00
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idt_ptr.address = (unsigned long) idt;
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load_idt(&idt_ptr);
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2003-06-27 21:31:46 +00:00
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2002-11-18 00:14:45 +00:00
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return 0;
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}
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2015-04-29 02:25:16 +00:00
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void *x86_get_idt(void)
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{
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return &idt_ptr;
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}
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2009-11-24 09:04:18 +00:00
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void __do_irq(int irq)
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{
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printf("Unhandled IRQ : %d\n", irq);
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}
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void do_irq(int irq) __attribute__((weak, alias("__do_irq")));
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2002-11-18 00:14:45 +00:00
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void enable_interrupts(void)
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{
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asm("sti\n");
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}
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int disable_interrupts(void)
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{
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long flags;
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2003-06-27 21:31:46 +00:00
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2017-01-16 14:04:00 +00:00
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#if CONFIG_IS_ENABLED(X86_64)
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2016-09-26 03:33:23 +00:00
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asm volatile ("pushfq ; popq %0 ; cli\n" : "=g" (flags) : );
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#else
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2002-11-18 00:14:45 +00:00
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asm volatile ("pushfl ; popl %0 ; cli\n" : "=g" (flags) : );
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2016-09-26 03:33:23 +00:00
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#endif
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2011-11-08 02:33:13 +00:00
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return flags & X86_EFLAGS_IF;
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2002-11-18 00:14:45 +00:00
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}
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2009-11-24 09:04:18 +00:00
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2014-11-20 08:11:16 +00:00
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int interrupt_init(void)
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{
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2016-01-20 04:32:26 +00:00
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struct udevice *dev;
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int ret;
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2020-04-26 15:12:55 +00:00
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if (!ll_boot_init())
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return 0;
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2016-01-20 04:32:26 +00:00
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/* Try to set up the interrupt router, but don't require one */
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2020-02-06 16:54:58 +00:00
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ret = irq_first_device_type(X86_IRQT_BASE, &dev);
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2016-01-20 04:32:26 +00:00
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if (ret && ret != -ENODEV)
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return ret;
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2015-08-04 18:33:46 +00:00
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/*
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* When running as an EFI application we are not in control of
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* interrupts and should leave them alone.
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*/
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#ifndef CONFIG_EFI_APP
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2014-11-20 08:11:16 +00:00
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/* Just in case... */
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disable_interrupts();
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2015-10-23 02:13:30 +00:00
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#ifdef CONFIG_I8259_PIC
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2014-11-20 08:11:16 +00:00
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/* Initialize the master/slave i8259 pic */
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i8259_init();
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#endif
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2018-11-18 22:19:43 +00:00
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#ifdef CONFIG_APIC
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2016-05-22 08:45:33 +00:00
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lapic_setup();
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2018-11-18 22:19:43 +00:00
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#endif
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2016-05-22 08:45:33 +00:00
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2014-11-20 08:11:16 +00:00
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/* Initialize core interrupt and exception functionality of CPU */
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cpu_init_interrupts();
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2015-08-04 18:34:00 +00:00
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/*
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* It is now safe to enable interrupts.
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*
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* TODO(sjg@chromium.org): But we don't handle these correctly when
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* booted from EFI.
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*/
|
2020-04-26 15:12:55 +00:00
|
|
|
enable_interrupts();
|
2015-08-04 18:33:46 +00:00
|
|
|
#endif
|
2014-11-20 08:11:16 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-11-24 09:04:18 +00:00
|
|
|
/* IRQ Low-Level Service Routine */
|
2010-10-07 09:03:23 +00:00
|
|
|
void irq_llsr(struct irq_regs *regs)
|
2009-11-24 09:04:18 +00:00
|
|
|
{
|
|
|
|
/*
|
|
|
|
* For detailed description of each exception, refer to:
|
2011-08-04 16:45:45 +00:00
|
|
|
* Intel® 64 and IA-32 Architectures Software Developer's Manual
|
2009-11-24 09:04:18 +00:00
|
|
|
* Volume 1: Basic Architecture
|
|
|
|
* Order Number: 253665-029US, November 2008
|
|
|
|
* Table 6-1. Exceptions and Interrupts
|
|
|
|
*/
|
2015-07-10 02:51:23 +00:00
|
|
|
if (regs->irq_id < 32) {
|
|
|
|
/* Architecture defined exception */
|
|
|
|
do_exception(regs);
|
|
|
|
} else {
|
2009-11-24 09:04:18 +00:00
|
|
|
/* Hardware or User IRQ */
|
2010-10-07 09:03:23 +00:00
|
|
|
do_irq(regs->irq_id);
|
2009-11-24 09:04:18 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* OK - This looks really horrible, but it serves a purpose - It helps create
|
|
|
|
* fully relocatable code.
|
|
|
|
* - The call to irq_llsr will be a relative jump
|
|
|
|
* - The IRQ entries will be guaranteed to be in order
|
2010-04-23 14:05:38 +00:00
|
|
|
* Interrupt entries are now very small (a push and a jump) but they are
|
|
|
|
* now slower (all registers pushed on stack which provides complete
|
|
|
|
* crash dumps in the low level handlers
|
2010-10-07 09:03:23 +00:00
|
|
|
*
|
|
|
|
* Interrupt Entry Point:
|
|
|
|
* - Interrupt has caused eflags, CS and EIP to be pushed
|
|
|
|
* - Interrupt Vector Handler has pushed orig_eax
|
|
|
|
* - pt_regs.esp needs to be adjusted by 40 bytes:
|
|
|
|
* 12 bytes pushed by CPU (EFLAGSF, CS, EIP)
|
|
|
|
* 4 bytes pushed by vector handler (irq_id)
|
|
|
|
* 24 bytes pushed before SP (SS, GS, FS, ES, DS, EAX)
|
|
|
|
* NOTE: Only longs are pushed on/popped off the stack!
|
2009-11-24 09:04:18 +00:00
|
|
|
*/
|
|
|
|
asm(".globl irq_common_entry\n" \
|
2009-11-24 09:04:19 +00:00
|
|
|
".hidden irq_common_entry\n" \
|
|
|
|
".type irq_common_entry, @function\n" \
|
2009-11-24 09:04:18 +00:00
|
|
|
"irq_common_entry:\n" \
|
2010-04-23 14:05:38 +00:00
|
|
|
"cld\n" \
|
2010-10-07 09:03:23 +00:00
|
|
|
"pushl %ss\n" \
|
2010-04-23 14:05:38 +00:00
|
|
|
"pushl %gs\n" \
|
|
|
|
"pushl %fs\n" \
|
|
|
|
"pushl %es\n" \
|
|
|
|
"pushl %ds\n" \
|
|
|
|
"pushl %eax\n" \
|
2010-10-07 09:03:23 +00:00
|
|
|
"movl %esp, %eax\n" \
|
|
|
|
"addl $40, %eax\n" \
|
|
|
|
"pushl %eax\n" \
|
2010-04-23 14:05:38 +00:00
|
|
|
"pushl %ebp\n" \
|
|
|
|
"pushl %edi\n" \
|
|
|
|
"pushl %esi\n" \
|
|
|
|
"pushl %edx\n" \
|
|
|
|
"pushl %ecx\n" \
|
|
|
|
"pushl %ebx\n" \
|
|
|
|
"mov %esp, %eax\n" \
|
2009-11-24 09:04:18 +00:00
|
|
|
"call irq_llsr\n" \
|
2010-04-23 14:05:38 +00:00
|
|
|
"popl %ebx\n" \
|
|
|
|
"popl %ecx\n" \
|
|
|
|
"popl %edx\n" \
|
|
|
|
"popl %esi\n" \
|
|
|
|
"popl %edi\n" \
|
|
|
|
"popl %ebp\n" \
|
|
|
|
"popl %eax\n" \
|
2010-10-07 09:03:23 +00:00
|
|
|
"popl %eax\n" \
|
2010-04-23 14:05:38 +00:00
|
|
|
"popl %ds\n" \
|
|
|
|
"popl %es\n" \
|
|
|
|
"popl %fs\n" \
|
|
|
|
"popl %gs\n" \
|
2010-10-07 09:03:23 +00:00
|
|
|
"popl %ss\n" \
|
2010-04-23 14:05:38 +00:00
|
|
|
"add $4, %esp\n" \
|
2009-11-24 09:04:18 +00:00
|
|
|
"iret\n" \
|
|
|
|
DECLARE_INTERRUPT(0) \
|
|
|
|
DECLARE_INTERRUPT(1) \
|
|
|
|
DECLARE_INTERRUPT(2) \
|
|
|
|
DECLARE_INTERRUPT(3) \
|
|
|
|
DECLARE_INTERRUPT(4) \
|
|
|
|
DECLARE_INTERRUPT(5) \
|
|
|
|
DECLARE_INTERRUPT(6) \
|
|
|
|
DECLARE_INTERRUPT(7) \
|
|
|
|
DECLARE_INTERRUPT(8) \
|
|
|
|
DECLARE_INTERRUPT(9) \
|
|
|
|
DECLARE_INTERRUPT(10) \
|
|
|
|
DECLARE_INTERRUPT(11) \
|
|
|
|
DECLARE_INTERRUPT(12) \
|
|
|
|
DECLARE_INTERRUPT(13) \
|
|
|
|
DECLARE_INTERRUPT(14) \
|
|
|
|
DECLARE_INTERRUPT(15) \
|
|
|
|
DECLARE_INTERRUPT(16) \
|
|
|
|
DECLARE_INTERRUPT(17) \
|
|
|
|
DECLARE_INTERRUPT(18) \
|
|
|
|
DECLARE_INTERRUPT(19) \
|
|
|
|
DECLARE_INTERRUPT(20) \
|
|
|
|
DECLARE_INTERRUPT(21) \
|
|
|
|
DECLARE_INTERRUPT(22) \
|
|
|
|
DECLARE_INTERRUPT(23) \
|
|
|
|
DECLARE_INTERRUPT(24) \
|
|
|
|
DECLARE_INTERRUPT(25) \
|
|
|
|
DECLARE_INTERRUPT(26) \
|
|
|
|
DECLARE_INTERRUPT(27) \
|
|
|
|
DECLARE_INTERRUPT(28) \
|
|
|
|
DECLARE_INTERRUPT(29) \
|
|
|
|
DECLARE_INTERRUPT(30) \
|
|
|
|
DECLARE_INTERRUPT(31) \
|
|
|
|
DECLARE_INTERRUPT(32) \
|
|
|
|
DECLARE_INTERRUPT(33) \
|
|
|
|
DECLARE_INTERRUPT(34) \
|
|
|
|
DECLARE_INTERRUPT(35) \
|
|
|
|
DECLARE_INTERRUPT(36) \
|
|
|
|
DECLARE_INTERRUPT(37) \
|
|
|
|
DECLARE_INTERRUPT(38) \
|
|
|
|
DECLARE_INTERRUPT(39) \
|
|
|
|
DECLARE_INTERRUPT(40) \
|
|
|
|
DECLARE_INTERRUPT(41) \
|
|
|
|
DECLARE_INTERRUPT(42) \
|
|
|
|
DECLARE_INTERRUPT(43) \
|
|
|
|
DECLARE_INTERRUPT(44) \
|
|
|
|
DECLARE_INTERRUPT(45) \
|
|
|
|
DECLARE_INTERRUPT(46) \
|
|
|
|
DECLARE_INTERRUPT(47) \
|
|
|
|
DECLARE_INTERRUPT(48) \
|
|
|
|
DECLARE_INTERRUPT(49) \
|
|
|
|
DECLARE_INTERRUPT(50) \
|
|
|
|
DECLARE_INTERRUPT(51) \
|
|
|
|
DECLARE_INTERRUPT(52) \
|
|
|
|
DECLARE_INTERRUPT(53) \
|
|
|
|
DECLARE_INTERRUPT(54) \
|
|
|
|
DECLARE_INTERRUPT(55) \
|
|
|
|
DECLARE_INTERRUPT(56) \
|
|
|
|
DECLARE_INTERRUPT(57) \
|
|
|
|
DECLARE_INTERRUPT(58) \
|
|
|
|
DECLARE_INTERRUPT(59) \
|
|
|
|
DECLARE_INTERRUPT(60) \
|
|
|
|
DECLARE_INTERRUPT(61) \
|
|
|
|
DECLARE_INTERRUPT(62) \
|
|
|
|
DECLARE_INTERRUPT(63) \
|
|
|
|
DECLARE_INTERRUPT(64) \
|
|
|
|
DECLARE_INTERRUPT(65) \
|
|
|
|
DECLARE_INTERRUPT(66) \
|
|
|
|
DECLARE_INTERRUPT(67) \
|
|
|
|
DECLARE_INTERRUPT(68) \
|
|
|
|
DECLARE_INTERRUPT(69) \
|
|
|
|
DECLARE_INTERRUPT(70) \
|
|
|
|
DECLARE_INTERRUPT(71) \
|
|
|
|
DECLARE_INTERRUPT(72) \
|
|
|
|
DECLARE_INTERRUPT(73) \
|
|
|
|
DECLARE_INTERRUPT(74) \
|
|
|
|
DECLARE_INTERRUPT(75) \
|
|
|
|
DECLARE_INTERRUPT(76) \
|
|
|
|
DECLARE_INTERRUPT(77) \
|
|
|
|
DECLARE_INTERRUPT(78) \
|
|
|
|
DECLARE_INTERRUPT(79) \
|
|
|
|
DECLARE_INTERRUPT(80) \
|
|
|
|
DECLARE_INTERRUPT(81) \
|
|
|
|
DECLARE_INTERRUPT(82) \
|
|
|
|
DECLARE_INTERRUPT(83) \
|
|
|
|
DECLARE_INTERRUPT(84) \
|
|
|
|
DECLARE_INTERRUPT(85) \
|
|
|
|
DECLARE_INTERRUPT(86) \
|
|
|
|
DECLARE_INTERRUPT(87) \
|
|
|
|
DECLARE_INTERRUPT(88) \
|
|
|
|
DECLARE_INTERRUPT(89) \
|
|
|
|
DECLARE_INTERRUPT(90) \
|
|
|
|
DECLARE_INTERRUPT(91) \
|
|
|
|
DECLARE_INTERRUPT(92) \
|
|
|
|
DECLARE_INTERRUPT(93) \
|
|
|
|
DECLARE_INTERRUPT(94) \
|
|
|
|
DECLARE_INTERRUPT(95) \
|
|
|
|
DECLARE_INTERRUPT(97) \
|
|
|
|
DECLARE_INTERRUPT(96) \
|
|
|
|
DECLARE_INTERRUPT(98) \
|
|
|
|
DECLARE_INTERRUPT(99) \
|
|
|
|
DECLARE_INTERRUPT(100) \
|
|
|
|
DECLARE_INTERRUPT(101) \
|
|
|
|
DECLARE_INTERRUPT(102) \
|
|
|
|
DECLARE_INTERRUPT(103) \
|
|
|
|
DECLARE_INTERRUPT(104) \
|
|
|
|
DECLARE_INTERRUPT(105) \
|
|
|
|
DECLARE_INTERRUPT(106) \
|
|
|
|
DECLARE_INTERRUPT(107) \
|
|
|
|
DECLARE_INTERRUPT(108) \
|
|
|
|
DECLARE_INTERRUPT(109) \
|
|
|
|
DECLARE_INTERRUPT(110) \
|
|
|
|
DECLARE_INTERRUPT(111) \
|
|
|
|
DECLARE_INTERRUPT(112) \
|
|
|
|
DECLARE_INTERRUPT(113) \
|
|
|
|
DECLARE_INTERRUPT(114) \
|
|
|
|
DECLARE_INTERRUPT(115) \
|
|
|
|
DECLARE_INTERRUPT(116) \
|
|
|
|
DECLARE_INTERRUPT(117) \
|
|
|
|
DECLARE_INTERRUPT(118) \
|
|
|
|
DECLARE_INTERRUPT(119) \
|
|
|
|
DECLARE_INTERRUPT(120) \
|
|
|
|
DECLARE_INTERRUPT(121) \
|
|
|
|
DECLARE_INTERRUPT(122) \
|
|
|
|
DECLARE_INTERRUPT(123) \
|
|
|
|
DECLARE_INTERRUPT(124) \
|
|
|
|
DECLARE_INTERRUPT(125) \
|
|
|
|
DECLARE_INTERRUPT(126) \
|
|
|
|
DECLARE_INTERRUPT(127) \
|
|
|
|
DECLARE_INTERRUPT(128) \
|
|
|
|
DECLARE_INTERRUPT(129) \
|
|
|
|
DECLARE_INTERRUPT(130) \
|
|
|
|
DECLARE_INTERRUPT(131) \
|
|
|
|
DECLARE_INTERRUPT(132) \
|
|
|
|
DECLARE_INTERRUPT(133) \
|
|
|
|
DECLARE_INTERRUPT(134) \
|
|
|
|
DECLARE_INTERRUPT(135) \
|
|
|
|
DECLARE_INTERRUPT(136) \
|
|
|
|
DECLARE_INTERRUPT(137) \
|
|
|
|
DECLARE_INTERRUPT(138) \
|
|
|
|
DECLARE_INTERRUPT(139) \
|
|
|
|
DECLARE_INTERRUPT(140) \
|
|
|
|
DECLARE_INTERRUPT(141) \
|
|
|
|
DECLARE_INTERRUPT(142) \
|
|
|
|
DECLARE_INTERRUPT(143) \
|
|
|
|
DECLARE_INTERRUPT(144) \
|
|
|
|
DECLARE_INTERRUPT(145) \
|
|
|
|
DECLARE_INTERRUPT(146) \
|
|
|
|
DECLARE_INTERRUPT(147) \
|
|
|
|
DECLARE_INTERRUPT(148) \
|
|
|
|
DECLARE_INTERRUPT(149) \
|
|
|
|
DECLARE_INTERRUPT(150) \
|
|
|
|
DECLARE_INTERRUPT(151) \
|
|
|
|
DECLARE_INTERRUPT(152) \
|
|
|
|
DECLARE_INTERRUPT(153) \
|
|
|
|
DECLARE_INTERRUPT(154) \
|
|
|
|
DECLARE_INTERRUPT(155) \
|
|
|
|
DECLARE_INTERRUPT(156) \
|
|
|
|
DECLARE_INTERRUPT(157) \
|
|
|
|
DECLARE_INTERRUPT(158) \
|
|
|
|
DECLARE_INTERRUPT(159) \
|
|
|
|
DECLARE_INTERRUPT(160) \
|
|
|
|
DECLARE_INTERRUPT(161) \
|
|
|
|
DECLARE_INTERRUPT(162) \
|
|
|
|
DECLARE_INTERRUPT(163) \
|
|
|
|
DECLARE_INTERRUPT(164) \
|
|
|
|
DECLARE_INTERRUPT(165) \
|
|
|
|
DECLARE_INTERRUPT(166) \
|
|
|
|
DECLARE_INTERRUPT(167) \
|
|
|
|
DECLARE_INTERRUPT(168) \
|
|
|
|
DECLARE_INTERRUPT(169) \
|
|
|
|
DECLARE_INTERRUPT(170) \
|
|
|
|
DECLARE_INTERRUPT(171) \
|
|
|
|
DECLARE_INTERRUPT(172) \
|
|
|
|
DECLARE_INTERRUPT(173) \
|
|
|
|
DECLARE_INTERRUPT(174) \
|
|
|
|
DECLARE_INTERRUPT(175) \
|
|
|
|
DECLARE_INTERRUPT(176) \
|
|
|
|
DECLARE_INTERRUPT(177) \
|
|
|
|
DECLARE_INTERRUPT(178) \
|
|
|
|
DECLARE_INTERRUPT(179) \
|
|
|
|
DECLARE_INTERRUPT(180) \
|
|
|
|
DECLARE_INTERRUPT(181) \
|
|
|
|
DECLARE_INTERRUPT(182) \
|
|
|
|
DECLARE_INTERRUPT(183) \
|
|
|
|
DECLARE_INTERRUPT(184) \
|
|
|
|
DECLARE_INTERRUPT(185) \
|
|
|
|
DECLARE_INTERRUPT(186) \
|
|
|
|
DECLARE_INTERRUPT(187) \
|
|
|
|
DECLARE_INTERRUPT(188) \
|
|
|
|
DECLARE_INTERRUPT(189) \
|
|
|
|
DECLARE_INTERRUPT(190) \
|
|
|
|
DECLARE_INTERRUPT(191) \
|
|
|
|
DECLARE_INTERRUPT(192) \
|
|
|
|
DECLARE_INTERRUPT(193) \
|
|
|
|
DECLARE_INTERRUPT(194) \
|
|
|
|
DECLARE_INTERRUPT(195) \
|
|
|
|
DECLARE_INTERRUPT(196) \
|
|
|
|
DECLARE_INTERRUPT(197) \
|
|
|
|
DECLARE_INTERRUPT(198) \
|
|
|
|
DECLARE_INTERRUPT(199) \
|
|
|
|
DECLARE_INTERRUPT(200) \
|
|
|
|
DECLARE_INTERRUPT(201) \
|
|
|
|
DECLARE_INTERRUPT(202) \
|
|
|
|
DECLARE_INTERRUPT(203) \
|
|
|
|
DECLARE_INTERRUPT(204) \
|
|
|
|
DECLARE_INTERRUPT(205) \
|
|
|
|
DECLARE_INTERRUPT(206) \
|
|
|
|
DECLARE_INTERRUPT(207) \
|
|
|
|
DECLARE_INTERRUPT(208) \
|
|
|
|
DECLARE_INTERRUPT(209) \
|
|
|
|
DECLARE_INTERRUPT(210) \
|
|
|
|
DECLARE_INTERRUPT(211) \
|
|
|
|
DECLARE_INTERRUPT(212) \
|
|
|
|
DECLARE_INTERRUPT(213) \
|
|
|
|
DECLARE_INTERRUPT(214) \
|
|
|
|
DECLARE_INTERRUPT(215) \
|
|
|
|
DECLARE_INTERRUPT(216) \
|
|
|
|
DECLARE_INTERRUPT(217) \
|
|
|
|
DECLARE_INTERRUPT(218) \
|
|
|
|
DECLARE_INTERRUPT(219) \
|
|
|
|
DECLARE_INTERRUPT(220) \
|
|
|
|
DECLARE_INTERRUPT(221) \
|
|
|
|
DECLARE_INTERRUPT(222) \
|
|
|
|
DECLARE_INTERRUPT(223) \
|
|
|
|
DECLARE_INTERRUPT(224) \
|
|
|
|
DECLARE_INTERRUPT(225) \
|
|
|
|
DECLARE_INTERRUPT(226) \
|
|
|
|
DECLARE_INTERRUPT(227) \
|
|
|
|
DECLARE_INTERRUPT(228) \
|
|
|
|
DECLARE_INTERRUPT(229) \
|
|
|
|
DECLARE_INTERRUPT(230) \
|
|
|
|
DECLARE_INTERRUPT(231) \
|
|
|
|
DECLARE_INTERRUPT(232) \
|
|
|
|
DECLARE_INTERRUPT(233) \
|
|
|
|
DECLARE_INTERRUPT(234) \
|
|
|
|
DECLARE_INTERRUPT(235) \
|
|
|
|
DECLARE_INTERRUPT(236) \
|
|
|
|
DECLARE_INTERRUPT(237) \
|
|
|
|
DECLARE_INTERRUPT(238) \
|
|
|
|
DECLARE_INTERRUPT(239) \
|
|
|
|
DECLARE_INTERRUPT(240) \
|
|
|
|
DECLARE_INTERRUPT(241) \
|
|
|
|
DECLARE_INTERRUPT(242) \
|
|
|
|
DECLARE_INTERRUPT(243) \
|
|
|
|
DECLARE_INTERRUPT(244) \
|
|
|
|
DECLARE_INTERRUPT(245) \
|
|
|
|
DECLARE_INTERRUPT(246) \
|
|
|
|
DECLARE_INTERRUPT(247) \
|
|
|
|
DECLARE_INTERRUPT(248) \
|
|
|
|
DECLARE_INTERRUPT(249) \
|
|
|
|
DECLARE_INTERRUPT(250) \
|
|
|
|
DECLARE_INTERRUPT(251) \
|
|
|
|
DECLARE_INTERRUPT(252) \
|
|
|
|
DECLARE_INTERRUPT(253) \
|
|
|
|
DECLARE_INTERRUPT(254) \
|
|
|
|
DECLARE_INTERRUPT(255));
|