2009-07-20 02:40:01 +00:00
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/*
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2010-06-08 20:07:46 +00:00
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* Board specific setup info
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*
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* (C) Copyright 2010
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* Texas Instruments, <www.ti.com>
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*
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* Author :
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* Aneesh V <aneesh@ti.com>
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2009-07-20 02:40:01 +00:00
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2009-07-20 02:40:01 +00:00
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*/
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2013-03-14 11:15:25 +00:00
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#include <config.h>
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2011-11-15 14:49:55 +00:00
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#include <asm/arch/omap.h>
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2013-04-24 00:41:24 +00:00
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#include <asm/omap_common.h>
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2012-09-18 04:30:51 +00:00
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#include <asm/arch/spl.h>
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2012-03-08 07:20:18 +00:00
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#include <linux/linkage.h>
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2011-11-15 14:50:03 +00:00
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2012-03-08 07:20:18 +00:00
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ENTRY(save_boot_params)
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2013-04-24 00:41:24 +00:00
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ldr r1, =OMAP_SRAM_SCRATCH_BOOT_PARAMS
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2011-11-15 14:50:03 +00:00
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str r0, [r1]
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2011-07-21 13:10:27 +00:00
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bx lr
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2012-03-08 07:20:18 +00:00
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ENDPROC(save_boot_params)
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2011-11-15 14:50:03 +00:00
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2012-03-08 07:20:18 +00:00
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ENTRY(set_pl310_ctrl_reg)
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2011-06-16 23:30:52 +00:00
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PUSH {r4-r11, lr} @ save registers - ROM code may pollute
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@ our registers
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LDR r12, =0x102 @ Set PL310 control register - value in R0
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.word 0xe1600070 @ SMC #0 - hand assembled because -march=armv5
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@ call ROM Code API to set control register
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POP {r4-r11, pc}
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2012-03-08 07:20:18 +00:00
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ENDPROC(set_pl310_ctrl_reg)
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