2009-08-21 01:59:58 +00:00
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/*
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2010-07-09 03:37:44 +00:00
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* Copyright 2009-2010 Freescale Semiconductor, Inc.
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2009-08-21 01:59:58 +00:00
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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#include <pci.h>
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#include <asm/immap_85xx.h>
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2010-12-15 10:55:20 +00:00
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#include <asm/fsl_serdes.h>
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2009-08-21 01:59:58 +00:00
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#include <asm/io.h>
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#include <asm/fsl_pci.h>
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#include <libfdt.h>
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#include <fdt_support.h>
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_PCIE1
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static struct pci_controller pcie1_hose;
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#endif
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#ifdef CONFIG_PCIE2
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static struct pci_controller pcie2_hose;
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#endif
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void pci_init_board(void)
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{
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volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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2009-09-03 15:09:04 +00:00
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struct fsl_pci_info pci_info[2];
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2010-12-15 10:55:20 +00:00
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u32 devdisr, pordevsr;
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2009-08-21 01:59:58 +00:00
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int first_free_busno = 0;
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2009-09-03 15:09:04 +00:00
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int num = 0;
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2009-08-21 01:59:58 +00:00
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int pcie_ep, pcie_configured;
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2009-09-03 15:09:04 +00:00
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devdisr = in_be32(&gur->devdisr);
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pordevsr = in_be32(&gur->pordevsr);
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2009-08-21 01:59:58 +00:00
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2009-09-03 15:09:04 +00:00
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puts("\n");
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2009-08-21 01:59:58 +00:00
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#ifdef CONFIG_PCIE2
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2010-12-15 10:55:20 +00:00
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pcie_configured = is_serdes_configured(PCIE2);
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2009-08-21 01:59:58 +00:00
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if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
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2009-09-03 15:09:04 +00:00
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SET_STD_PCIE_INFO(pci_info[num], 2);
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2009-11-04 19:01:38 +00:00
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pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
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2010-10-29 22:59:24 +00:00
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printf("PCIE2: connected to Slot 1 as %s (base addr %lx)\n",
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pcie_ep ? "Endpoint" : "Root Complex",
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pci_info[num].regs);
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2009-09-03 15:09:04 +00:00
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first_free_busno = fsl_pci_init_port(&pci_info[num++],
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2009-11-04 07:29:04 +00:00
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&pcie2_hose, first_free_busno);
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2009-08-21 01:59:58 +00:00
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} else {
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2010-10-29 22:59:24 +00:00
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printf("PCIE2: disabled\n");
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2009-08-21 01:59:58 +00:00
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}
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2009-09-03 15:09:04 +00:00
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puts("\n");
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2009-08-21 01:59:58 +00:00
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#else
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2009-09-03 15:09:04 +00:00
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setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE2); /* disable */
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2009-08-21 01:59:58 +00:00
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#endif
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#ifdef CONFIG_PCIE1
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2010-12-15 10:55:20 +00:00
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pcie_configured = is_serdes_configured(PCIE1);
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2009-08-21 01:59:58 +00:00
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if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
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2009-09-03 15:09:04 +00:00
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SET_STD_PCIE_INFO(pci_info[num], 1);
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2009-11-04 19:01:38 +00:00
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pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
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2010-10-29 22:59:24 +00:00
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printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n",
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pcie_ep ? "Endpoint" : "Root Complex",
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pci_info[num].regs);
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2009-09-03 15:09:04 +00:00
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first_free_busno = fsl_pci_init_port(&pci_info[num++],
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2009-11-04 07:29:04 +00:00
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&pcie1_hose, first_free_busno);
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2009-08-21 01:59:58 +00:00
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} else {
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2010-10-29 22:59:24 +00:00
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printf("PCIE1: disabled\n");
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2009-08-21 01:59:58 +00:00
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}
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2009-09-03 15:09:04 +00:00
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puts("\n");
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2009-08-21 01:59:58 +00:00
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#else
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2009-09-03 15:09:04 +00:00
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setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE); /* disable */
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2009-08-21 01:59:58 +00:00
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#endif
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}
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void ft_pci_board_setup(void *blob)
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{
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2010-07-09 03:37:44 +00:00
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FT_FSL_PCI_SETUP;
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2009-08-21 01:59:58 +00:00
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}
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