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drivers: phy: add generic PHY framework The PHY framework provides a set of APIs to control a PHY. This API is derived from the linux version of the generic PHY framework. Currently the API supports init(), deinit(), power_on, power_off() and reset(). The framework provides a way to get a reference to a phy from the device-tree. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-24 09:51:27 +00:00
menu "PHY Subsystem"
config PHY
bool "PHY Core"
depends on DM
help
PHY support.
This framework is designed to provide a generic interface for PHY
devices. PHY devices are dedicated hardware that handle the physical
layer of the protocols in the OSI model.
PHYs are commonly used for high speed interfaces such as Serial-ATA
or PCI express.
The API provides functions to initialize/deinitialize the
PHY, power on/off the PHY, and reset the PHY. It's meant to be as
compatible as possible with the equivalent framework found in the
linux kernel.
config SPL_PHY
bool "PHY Core in SPL"
Kconfig: Varios: Fix more SPL, TPL dependencies Several options are presenting themselves on a various boards where the options are clearly not used. (ie, SPL/TPL options when SPL or TPL are not defined) This patch is not attempting to be a complete list of items, but more like low hanging fruit. In some instances, I wasn't sure of DM was required, so I simply made them SPL or TPL. This patch attempts to reduce some of the menuconfig noise by defining dependencies so they don't appear when not used. Signed-off-by: Adam Ford <aford173@gmail.com>
2019-08-24 18:50:34 +00:00
depends on DM && SPL
drivers: phy: add generic PHY framework The PHY framework provides a set of APIs to control a PHY. This API is derived from the linux version of the generic PHY framework. Currently the API supports init(), deinit(), power_on, power_off() and reset(). The framework provides a way to get a reference to a phy from the device-tree. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-24 09:51:27 +00:00
help
PHY support in SPL.
This framework is designed to provide a generic interface for PHY
devices. PHY devices are dedicated hardware that handle the physical
layer of the protocols (https://en.wikipedia.org/wiki/OSI_model).
PHYs are commonly used for high speed interfaces such as Serial-ATA
or PCI express.
The API provides functions to initialize/deinitialize the
PHY, power on/off the PHY, and reset the PHY. It's meant to be as
compatible as possible with the equivalent framework found in the
linux kernel.
dm: test: Add tests for the generic PHY uclass Those tests check: - the ability for a phy-user to get a phy based on its name or its index - the ability of a phy device (provider) to manage multiple ports - the ability to perform operations on the phy (init,deinit,on,off) - the behavior of the uclass when optional operations are not implemented Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-24 09:51:28 +00:00
config PHY_SANDBOX
bool "Sandbox PHY support"
depends on SANDBOX
depends on PHY
help
This select a dummy sandbox PHY driver. It used only to implement
the unit tests for the phy framework
phy: add a NO-OP phy driver This driver is used to stub PHY operations in a driver (USB, SATA). This is useful when the 'client' driver (USB, SATA, ...) uses the PHY framework and there is no actual PHY harwdare to drive. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2017-07-24 13:18:15 +00:00
config NOP_PHY
bool "NOP PHY driver"
depends on PHY
help
Support for a no-op PHY driver (stubbed PHY driver).
This is useful when a driver uses the PHY framework but no real PHY
hardware exists.
config SPL_NOP_PHY
bool "NOP PHY driver in SPL"
depends on SPL_PHY
help
Support for a no-op PHY driver (stubbed PHY driver) in the SPL.
This is useful when a driver uses the PHY framework but no real PHY
hardware exists.
phy: dphy: Add configuration helpers The MIPI D-PHY spec defines default values and boundaries for most of the parameters it defines. Introduce helpers to help drivers get meaningful values based on their current parameters, and validate the boundaries of these parameters if needed. These helpers and header are taken from Linux commit 9123e3a74ec7 ("Linux 5.9-rc1"). Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-12-29 13:58:58 +00:00
config MIPI_DPHY_HELPERS
bool "MIPI D-PHY support helpers"
help
Provides a number of helpers a core functions for MIPI D-PHY drivers.
phy: Add driver for ST-Ericsson AB8500 USB PHY The AB8500 PMIC contains an USB PHY that needs to be set up in device or host mode to make USB work properly. Add a simple driver for the generic PHY uclass that allows enabling it. The if (CONFIG_IS_ENABLED(USB_MUSB_HOST)) might be a bit strange. The USB PHY must be configured in either host or device mode and somehow the USB PHY driver must be made aware of the mode. Actually, the MUSB driver used together with this PHY does not support dynamic selection of host/device mode in U-Boot at the moment. Therefore, one very simple approach that works fine is to select the mode to configure at compile time. When the MUSB driver is configured in host mode the PHY is configured in host mode, and similarly when the MUSB driver is configured in device/gadget mode. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-08 18:33:49 +00:00
config AB8500_USB_PHY
bool "AB8500 USB PHY Driver"
depends on PHY && PMIC_AB8500
help
Support for the USB OTG PHY in ST-Ericsson AB8500.
phy: add support for bcm6318 usbh phy Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-02-04 20:11:15 +00:00
config BCM6318_USBH_PHY
bool "BCM6318 USBH PHY support"
depends on PHY && ARCH_BMIPS
select POWER_DOMAIN
help
Support for the Broadcom MIPS BCM6318 USBH PHY.
phy: add support for bcm6348 usbh phy Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-02-04 10:18:24 +00:00
config BCM6348_USBH_PHY
bool "BCM6348 USBH PHY support"
depends on PHY && ARCH_BMIPS
help
Support for the Broadcom MIPS BCM6348 USBH PHY.
phy: add support for bcm6358 usbh phy Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-02-04 10:19:11 +00:00
config BCM6358_USBH_PHY
bool "BCM6358 USBH PHY support"
depends on PHY && ARCH_BMIPS
help
Support for the Broadcom MIPS BCM6358 USBH PHY.
phy: add support for bcm6368 usbh phy Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-02-04 20:10:13 +00:00
config BCM6368_USBH_PHY
bool "BCM6368 USBH PHY support"
depends on PHY && ARCH_BMIPS
help
Support for the Broadcom MIPS BCM6368 USBH PHY.
phy: add support for stingray PAXB PHY controller Add support for stingray PAXB PHY controller driver. This driver supports maximum 8 PAXB phys using pipemux data. Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-02 10:38:12 +00:00
config BCM_SR_PCIE_PHY
bool "Broadcom Stingray PCIe PHY driver"
depends on PHY
help
Enable this to support the Broadcom Stingray PCIe PHY
If unsure, say N.
phy: Add support for phy-da8xx-usb In preparation for supporting the musb driver, this patch adds support for the usb phy associated with the musb driver. Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-10 18:59:09 +00:00
config PHY_DA8XX_USB
tristate "TI DA8xx USB PHY Driver"
depends on PHY && ARCH_DAVINCI
help
Enable this to support the USB PHY on DA8xx SoCs.
drivers: phy: add PIPE3 phy driver This phy is found on omap platforms with sata capabilities. Except for the part related to the DM and the PHY framework, the code is basically a copy paste from arch/arm/mach-omap2/pipe3-phy.c Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-24 09:51:29 +00:00
config PIPE3_PHY
bool "Support omap's PIPE3 PHY"
pipe3: Fix broken dependency ARCH_OMAP2 has been renamed ARCH_OMAP2PLUS in commit a93fbf4a7892 ("ARM: omap2+: rename config to ARCH_OMAP2PLUS and consolidate Kconfig") Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-07 10:13:34 +00:00
depends on PHY && ARCH_OMAP2PLUS
drivers: phy: add PIPE3 phy driver This phy is found on omap platforms with sata capabilities. Except for the part related to the DM and the PHY framework, the code is basically a copy paste from arch/arm/mach-omap2/pipe3-phy.c Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-24 09:51:29 +00:00
help
Support for the omap PIPE3 phy for sata
This PHY is found on omap devices supporting SATA such as dra7, am57x
and omap5
config SPL_PIPE3_PHY
bool "Support omap's PIPE3 PHY in SPL"
pipe3: Fix broken dependency ARCH_OMAP2 has been renamed ARCH_OMAP2PLUS in commit a93fbf4a7892 ("ARM: omap2+: rename config to ARCH_OMAP2PLUS and consolidate Kconfig") Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-07 10:13:34 +00:00
depends on SPL_PHY && ARCH_OMAP2PLUS
drivers: phy: add PIPE3 phy driver This phy is found on omap platforms with sata capabilities. Except for the part related to the DM and the PHY framework, the code is basically a copy paste from arch/arm/mach-omap2/pipe3-phy.c Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-24 09:51:29 +00:00
help
Support for the omap PIPE3 phy for sata in SPL
This PHY is found on omap devices supporting SATA such as dra7, am57x
and omap5
phy: add support for AM654x SERDES Add a new SERDES driver for TI's AM654x SoC which configures the SERDES only for PCIe. Support fo USB3 can be added later. SERDES in am654x has three input clocks (left input, external reference clock and right input) and two output clocks (left output and right output) in addition to a PLL mux clock which the SERDES uses for Clock Multiplier Unit (CMU refclock). The PLL mux clock can select from one of the three input clocks. The right output can select between left input and external reference clock while the left output can select between the right input and external reference clock. The driver has support to select PLL mux and left/right output mux as specified in device tree. Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-08-01 13:42:58 +00:00
config AM654_PHY
tristate "TI AM654 SERDES support"
depends on PHY && ARCH_K3
select REGMAP
select SYSCON
help
This option enables support for TI AM654 SerDes PHY used for
PCIe.
usb: phy: Add STi USB2 PHY This is the generic phy driver for the picoPHY ports used by USB2/1.1 controllers. It is found on STiH407 SoC family from STMicroelectronics. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-05 09:04:21 +00:00
config STI_USB_PHY
bool "STMicroelectronics USB2 picoPHY driver for STiH407 family"
depends on PHY && ARCH_STI
help
This is the generic phy driver for the picoPHY ports
used by USB2 and USB3 Host controllers available on
STiH407 SoC families.
phy: add driver for Qualcomm IPQ40xx USB PHY Add a driver to setup the USB PHY-s on Qualcomm IPQ40xx series SoCs. The driver sets up HS and SS phys. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-09-10 14:00:04 +00:00
config PHY_QCOM_IPQ4019_USB
tristate "Qualcomm IPQ4019 USB PHY driver"
depends on PHY && ARCH_IPQ40XX
help
Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s.
phy: rcar: Add R-Car Gen2 PHY driver Add a PHY driver for the R-Car Gen2 which allows configuring the mux connected to the EHCI controllers and USBHS controller. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-08-05 13:22:19 +00:00
config PHY_RCAR_GEN2
tristate "Renesas R-Car Gen2 USB PHY"
depends on PHY && RCAR_GEN2
help
Support for the Renesas R-Car Gen2 USB PHY. This driver operates the
PHY connected to USBHS module, PCI EHCI module and USB3.0 module and
allows configuring the module multiplexing.
phy: rcar: Add R-Car Gen3 PHY driver Add a PHY driver for the R-Car Gen3 which allows configuring USB OTG PHY on Gen3 into host mode and toggles VBUS in case a dedicated regulator is present. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-10-02 20:31:47 +00:00
config PHY_RCAR_GEN3
tristate "Renesas R-Car Gen3 USB PHY"
depends on PHY && RCAR_GEN3 && CLK && DM_REGULATOR
default y if RCAR_GEN3
help
Support for the Renesas R-Car Gen3 USB PHY. This driver operates the
PHY connected to EHCI USB module and controls USB OTG operation.
phy: add support for STM32 usb phy controller This patch adds phy tranceiver driver for STM32 USB PHY Controller (usbphyc) that provides dual port High-Speed phy for OTG (single port) and EHCI/OHCI host controller (two ports). One port of the phy is shared between the two USB controllers through a UTMI+ switch. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-04-27 09:01:55 +00:00
config PHY_STM32_USBPHYC
tristate "STMicroelectronics STM32 SoC USB HS PHY driver"
depends on PHY && ARCH_STM32MP
help
Enable this to support the High-Speed USB transceiver that is part of
STMicroelectronics STM32 SoCs.
This driver controls the entire USB PHY block: the USB PHY controller
(USBPHYC) and the two 8-bit wide UTMI+ interface. First interface is
used by an HS USB Host controller, and the second one is shared
between an HS USB OTG controller and an HS USB Host controller,
selected by an USB switch.
phy: meson: add GXBB PHY driver This adds support for the USB PHY found on Amlogic GXBB SoCs. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-08-18 13:42:54 +00:00
config MESON_GXBB_USB_PHY
bool "Amlogic Meson GXBB USB PHY"
depends on PHY && ARCH_MESON && MESON_GXBB
imply REGMAP
help
This is the generic phy driver for the Amlogic Meson GXBB
USB2 PHY.
phy: Add Amlogic Meson USB2 & USB3 Generic PHY drivers The Amlogic Meson GXL and GXM (simple variant) embeds up to 3 USB2 PHYs and an USB3 PHY. This patch adds drivers for these for the standard generic PHY interface and supports the power-on/off calls and set the Host mode by default. They are based on the excellent work from Martin Blumenstingl merged in linux. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-04-11 15:08:02 +00:00
config MESON_GXL_USB_PHY
bool "Amlogic Meson GXL USB PHYs"
phy: meson-gxl-usb: depend on Meson AXG aswell Enable build of meson-gxl-usb PHY for the AXG architecture aswell. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-09-10 08:48:16 +00:00
depends on PHY && ARCH_MESON && (MESON_GXL || MESON_GXM || MESON_AXG)
phy: Add Amlogic Meson USB2 & USB3 Generic PHY drivers The Amlogic Meson GXL and GXM (simple variant) embeds up to 3 USB2 PHYs and an USB3 PHY. This patch adds drivers for these for the standard generic PHY interface and supports the power-on/off calls and set the Host mode by default. They are based on the excellent work from Martin Blumenstingl merged in linux. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-04-11 15:08:02 +00:00
imply REGMAP
help
This is the generic phy driver for the Amlogic Meson GXL
USB2 and USB3 PHYS.
phy: meson: add Amlogic G12A USB2 and USB3+PCIE PHY drivers This adds support for the USB PHYs found in the Amlogic G12A SoC Family. The USB2 PHY supports Host and/or Peripheral mode, depending on it's position. The first PHY is only used as Host, but the second supports Dual modes defined by the USB Control Glue HW in front of the USB Controllers. The second driver supports USB3 Host mode or PCIE 2.0 mode, depending on the layout of the board. Selection is done by the #phy-cells, making the mode static and exclusive. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-02-19 14:17:29 +00:00
config MESON_G12A_USB_PHY
bool "Amlogic Meson G12A USB PHYs"
depends on PHY && ARCH_MESON && MESON_G12A
imply REGMAP
help
This is the generic phy driver for the Amlogic Meson G12A
USB2 and USB3 PHYS.
phy: Add Amlogic AXG MIPI D-PHY driver The Amlogic AXG SoCs embeds a MIPI D-PHY used to communicate with DSI panels. This D-PHY depends on a separate analog PHY. Signed-off-by:Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-12-29 13:59:00 +00:00
config MESON_AXG_MIPI_DPHY
bool "Amlogic Meson AXG MIPI D-PHY"
depends on PHY && ARCH_MESON && MESON_AXG
select MIPI_DPHY_HELPERS
imply REGMAP
help
This is the generic phy driver for the Amlogic Meson AXG
MIPI D-PHY.
phy: Add Amlogic AXG MIPI PCIe Analog PHY driver The Amlogic AXG MIPI + PCIe Analog PHY provides function for both PCIe and MIPI DSI at the same time, and provides the Analog part of MIPI DSI transmission and Analog part of the PCIe lines. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-12-29 13:59:01 +00:00
config MESON_AXG_MIPI_PCIE_ANALOG_PHY
bool "Amlogic Meson AXG MIPI PCIe Analog PHY"
depends on PHY && ARCH_MESON && MESON_AXG
select MIPI_DPHY_HELPERS
imply REGMAP
help
This is the generic phy driver for the Amlogic Meson AXG
MIPI PCIe Analog PHY.
phy: db410c: Add MSM USB PHY driver Add a PHY driver for the Qualcomm dragonboard 410c which allows switching on/off and resetting the phy connected to the EHCI controllers and USBHS controller. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-21 10:35:47 +00:00
config MSM8916_USB_PHY
bool "Qualcomm MSM8916 USB PHY support"
depends on PHY
help
Support the USB PHY in msm8916
This PHY is found on qualcomm dragonboard410c development board.
phy: Add a new driver for OMAP's USB2 PHYs This drivers supports the USB2 PHY found on omap5 and dra7 SOCs. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-11-29 09:57:39 +00:00
config OMAP_USB2_PHY
bool "Support OMAP's USB2 PHY"
depends on PHY
depends on SYSCON
help
Support for the OMAP's USB2 PHY.
This PHY is found on OMAP devices supporting USB2.
PHY: Add phy driver for the keystone USB PHY Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-04 10:12:59 +00:00
config KEYSTONE_USB_PHY
bool "Support TI Keystone USB PHY"
depends on PHY
depends on ARCH_KEYSTONE
help
Support for the USB PHY found on some Keystone (k2) processors
This PHY is found on some Keystone (K2) devices supporting USB.
phy: add USB PHY driver for MediaTek MT7620 SoC This patch adds USB PHY driver for MediaTek MT7620 SoC Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-11-12 08:36:48 +00:00
config MT7620_USB_PHY
bool "MediaTek MT7620 USB PHY support"
depends on PHY
depends on SOC_MT7620
help
Support the intergated USB PHY in MediaTek MT7620 SoC
phy: Add USB PHY driver for the MT76x8 (7628/7688) SoC This driver is derived from this Linux driver: linux/drivers/phy/ralink/phy-ralink-usb.c The driver sets up power and host mode, but also needs to configure PHY registers for the MT7628 and MT7688. I removed the reset controller handling for the USB host and device, as it does not seem to be necessary right now. The soft reset bits for both devices are enabled by default and testing has shown (with hackish reset handling added), that USB related commands work identical with or without the reset handling. Please note that the resulting USB support is tested only very minimal. I was able to detect one of my 3 currently available USB sticks. Perhaps some further work is needed to fully support the EHCI controller integrated in the MT76x8 SoC. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-04-05 11:44:43 +00:00
config MT76X8_USB_PHY
bool "MediaTek MT76x8 (7628/88) USB PHY support"
depends on PHY
phy: mt76x8-usb-phy: add slew rate calibration and remove non-mt7628 part This patch adds slew rate calibration for mt76x8-usb-phy, removes code which belongs to mt7620, and gets rid of using syscon and regmap by using clock driver and reset controller. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-09-25 09:45:31 +00:00
depends on SOC_MT7628
phy: Add USB PHY driver for the MT76x8 (7628/7688) SoC This driver is derived from this Linux driver: linux/drivers/phy/ralink/phy-ralink-usb.c The driver sets up power and host mode, but also needs to configure PHY registers for the MT7628 and MT7688. I removed the reset controller handling for the USB host and device, as it does not seem to be necessary right now. The soft reset bits for both devices are enabled by default and testing has shown (with hackish reset handling added), that USB related commands work identical with or without the reset handling. Please note that the resulting USB support is tested only very minimal. I was able to detect one of my 3 currently available USB sticks. Perhaps some further work is needed to fully support the EHCI controller integrated in the MT76x8 SoC. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-04-05 11:44:43 +00:00
help
Support the USB PHY in MT76x8 SoCs
This PHY is found on MT76x8 devices supporting USB.
phy: mediatek: add MediaTek T-PHY support for PCIe The driver provides PHY for USB2, USB3.0, PCIe and SATA, and now we just enable PCIe. As for the other functionalities will be added gradually in upcoming days. This is adapted from the Linux version. Tested-by: Frank Wunderlich <frank-w@public-files.de> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2019-08-22 10:26:50 +00:00
config PHY_MTK_TPHY
bool "MediaTek T-PHY Driver"
depends on PHY
depends on ARCH_MEDIATEK
help
MediaTek T-PHY driver supports usb2.0, usb3.0 ports, PCIe and
SATA, and meanwhile supports two version T-PHY which have
different banks layout, the T-PHY with shared banks between
multi-ports is first version, otherwise is second veriosn,
so you can easily distinguish them by banks layout.
phy: phy-imx8mq-usb: Add USB PHY driver for i.MX8MQ Add the USB PHY driver for i.MX8MQ to work with DWC3 USB controller. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Patrick Wildt <patrick@blueri.se> Tested-by: Patrick Wildt <patrick@blueri.se>
2021-02-21 16:26:21 +00:00
config PHY_IMX8MQ_USB
phy: phy-imx8mq-usb: Add support for i.MX8MP USB PHY Add initial support for i.MX8MP USB PHY, i.MX8MP USB is similar to the i.MX8MQ, except for clock and power domain design customization. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
2022-04-01 01:18:31 +00:00
bool "NXP i.MX8MQ/i.MX8MP USB PHY Driver"
phy: phy-imx8mq-usb: Add USB PHY driver for i.MX8MQ Add the USB PHY driver for i.MX8MQ to work with DWC3 USB controller. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Patrick Wildt <patrick@blueri.se> Tested-by: Patrick Wildt <patrick@blueri.se>
2021-02-21 16:26:21 +00:00
depends on PHY
phy: phy-imx8mq-usb: Add support for i.MX8MP USB PHY Add initial support for i.MX8MP USB PHY, i.MX8MP USB is similar to the i.MX8MQ, except for clock and power domain design customization. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
2022-04-01 01:18:31 +00:00
depends on IMX8MQ || IMX8MP
phy: phy-imx8mq-usb: Add USB PHY driver for i.MX8MQ Add the USB PHY driver for i.MX8MQ to work with DWC3 USB controller. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Patrick Wildt <patrick@blueri.se> Tested-by: Patrick Wildt <patrick@blueri.se>
2021-02-21 16:26:21 +00:00
help
phy: phy-imx8mq-usb: Add support for i.MX8MP USB PHY Add initial support for i.MX8MP USB PHY, i.MX8MP USB is similar to the i.MX8MQ, except for clock and power domain design customization. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
2022-04-01 01:18:31 +00:00
Support the USB3.0 PHY in NXP i.MX8MQ or i.MX8MP SoC
phy: phy-imx8mq-usb: Add USB PHY driver for i.MX8MQ Add the USB PHY driver for i.MX8MQ to work with DWC3 USB controller. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Patrick Wildt <patrick@blueri.se> Tested-by: Patrick Wildt <patrick@blueri.se>
2021-02-21 16:26:21 +00:00
phy: zynqmp: Add serdes/psgtr driver Add PSGTR driver for Xilinx ZynqMP. The most of configurations are taken from Linux kernel psgtr driver. USB3.0 and SGMII configurations are tested on SOM. In SGMII case also IOU_SLCR reg is updated to get proper clock setup and signal detection configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/36e6e9d3baf8511af1916e91e4887032ca2b6c20.1641458978.git.michal.simek@xilinx.com
2022-01-06 08:49:41 +00:00
config PHY_XILINX_ZYNQMP
tristate "Xilinx ZynqMP PHY driver"
depends on PHY && ARCH_ZYNQMP
help
Enable this to support ZynqMP High Speed Gigabit Transceiver
that is part of ZynqMP SoC.
phy: rockchip: Add Rockchip USB2PHY driver Add Rockchip USB2PHY driver with initial support. This will help to use it for EHCI controller in host mode, and USB 3.0 controller in otg mode. More functionality like charge, vbus detection will add it in future changes. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-26 03:33:44 +00:00
source "drivers/phy/rockchip/Kconfig"
phy: cadence: Add driver for Sierra PHY Add a Sierra PHY driver with PCIe and USB support. This driver is a port from the mainline linux driver. The PHY has multiple lanes, which can be configured into groups, and a generic PHY device is created for each group. There are two resets controlling the overall PHY block, one to enable the APB interface for programming registers, and another to enable the PHY itself. Additionally there are resets for each PHY lane. The PHY can be configured in hardware to read register settings from ROM, or they can be written by the driver. The sequence of operation on startup is to enable the APB bus, write the PHY registers (if required) for each lane group, and then enable the PHY. Each group of lanes can then be individually controlled using the power_on()/ power_off() function for that generic PHY One difference with the linux driver is that the PHY is always reset after it is powered-on. This is because role switching is not supported in u-boot and the cable orientation is handled by the PHY reset. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: Alan Douglas <adouglas@cadence.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210721155849.20994-8-kishon@ti.com
2021-07-21 15:58:36 +00:00
source "drivers/phy/cadence/Kconfig"
phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC Add support for WIZ module present in TI's J721E SoC. WIZ is a SERDES wrapper used to configure some of the input signals to the SERDES. It is used with both Sierra(16G) and Torrent(10G) SERDES. This driver configures three clock selects (pll0, pll1, dig) and supports resets for each of the lanes. This is an adaptation of the linux driver. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210721155849.20994-10-kishon@ti.com
2021-07-21 15:58:38 +00:00
source "drivers/phy/ti/Kconfig"
phy: cadence: Add driver for Sierra PHY Add a Sierra PHY driver with PCIe and USB support. This driver is a port from the mainline linux driver. The PHY has multiple lanes, which can be configured into groups, and a generic PHY device is created for each group. There are two resets controlling the overall PHY block, one to enable the APB interface for programming registers, and another to enable the PHY itself. Additionally there are resets for each PHY lane. The PHY can be configured in hardware to read register settings from ROM, or they can be written by the driver. The sequence of operation on startup is to enable the APB bus, write the PHY registers (if required) for each lane group, and then enable the PHY. Each group of lanes can then be individually controlled using the power_on()/ power_off() function for that generic PHY One difference with the linux driver is that the PHY is always reset after it is powered-on. This is because role switching is not supported in u-boot and the cable orientation is handled by the PHY reset. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: Alan Douglas <adouglas@cadence.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210721155849.20994-8-kishon@ti.com
2021-07-21 15:58:36 +00:00
drivers: phy: add generic PHY framework The PHY framework provides a set of APIs to control a PHY. This API is derived from the linux version of the generic PHY framework. Currently the API supports init(), deinit(), power_on, power_off() and reset(). The framework provides a way to get a reference to a phy from the device-tree. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-24 09:51:27 +00:00
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