2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0
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2013-01-28 13:32:10 +00:00
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/*
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* Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
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*/
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/* Tegra114 high-level function multiplexing */
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#include <common.h>
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2020-05-10 17:40:05 +00:00
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#include <log.h>
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2013-01-28 13:32:10 +00:00
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#include <asm/arch/clock.h>
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#include <asm/arch/funcmux.h>
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#include <asm/arch/pinmux.h>
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int funcmux_select(enum periph_id id, int config)
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{
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int bad_config = config != FUNCMUX_DEFAULT;
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switch (id) {
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case PERIPH_ID_UART4:
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switch (config) {
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case FUNCMUX_UART4_GMI:
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2014-03-21 18:29:00 +00:00
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pinmux_set_func(PMUX_PINGRP_GMI_A16_PJ7,
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PMUX_FUNC_UARTD);
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pinmux_set_func(PMUX_PINGRP_GMI_A17_PB0,
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PMUX_FUNC_UARTD);
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pinmux_set_func(PMUX_PINGRP_GMI_A18_PB1,
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PMUX_FUNC_UARTD);
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pinmux_set_func(PMUX_PINGRP_GMI_A19_PK7,
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PMUX_FUNC_UARTD);
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pinmux_set_io(PMUX_PINGRP_GMI_A16_PJ7, PMUX_PIN_OUTPUT);
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pinmux_set_io(PMUX_PINGRP_GMI_A17_PB0, PMUX_PIN_INPUT);
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pinmux_set_io(PMUX_PINGRP_GMI_A18_PB1, PMUX_PIN_INPUT);
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pinmux_set_io(PMUX_PINGRP_GMI_A19_PK7, PMUX_PIN_OUTPUT);
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pinmux_tristate_disable(PMUX_PINGRP_GMI_A16_PJ7);
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pinmux_tristate_disable(PMUX_PINGRP_GMI_A17_PB0);
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pinmux_tristate_disable(PMUX_PINGRP_GMI_A18_PB1);
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pinmux_tristate_disable(PMUX_PINGRP_GMI_A19_PK7);
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2013-01-28 13:32:10 +00:00
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break;
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}
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break;
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/* Add other periph IDs here as needed */
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default:
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debug("%s: invalid periph_id %d", __func__, id);
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return -1;
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}
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if (bad_config) {
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debug("%s: invalid config %d for periph_id %d", __func__,
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config, id);
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return -1;
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}
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return 0;
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}
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