2018-05-06 21:58:06 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0+
|
2007-08-16 20:05:11 +00:00
|
|
|
/*
|
|
|
|
*
|
|
|
|
* (C) Copyright 2000-2003
|
|
|
|
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
|
|
|
*
|
2012-03-26 21:49:08 +00:00
|
|
|
* Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
|
2007-08-16 20:05:11 +00:00
|
|
|
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <common.h>
|
|
|
|
#include <watchdog.h>
|
|
|
|
#include <command.h>
|
2008-09-01 05:22:04 +00:00
|
|
|
#include <netdev.h>
|
2007-08-16 20:05:11 +00:00
|
|
|
|
|
|
|
#include <asm/immap.h>
|
2012-03-26 21:49:08 +00:00
|
|
|
#include <asm/io.h>
|
2007-08-16 20:05:11 +00:00
|
|
|
|
|
|
|
DECLARE_GLOBAL_DATA_PTR;
|
|
|
|
|
2010-10-20 07:41:17 +00:00
|
|
|
int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
|
2007-08-16 20:05:11 +00:00
|
|
|
{
|
2012-03-26 21:49:08 +00:00
|
|
|
rcm_t *rcm = (rcm_t *) (MMAP_RCM);
|
2007-08-16 20:05:11 +00:00
|
|
|
udelay(1000);
|
2012-10-18 19:25:51 +00:00
|
|
|
out_8(&rcm->rcr, RCM_RCR_FRCRSTOUT);
|
|
|
|
udelay(10000);
|
2012-03-26 21:49:08 +00:00
|
|
|
setbits_8(&rcm->rcr, RCM_RCR_SOFTRST);
|
2007-08-16 20:05:11 +00:00
|
|
|
|
|
|
|
/* we don't return! */
|
|
|
|
return 0;
|
|
|
|
};
|
|
|
|
|
2017-08-19 22:01:55 +00:00
|
|
|
#if defined(CONFIG_DISPLAY_CPUINFO)
|
|
|
|
int print_cpuinfo(void)
|
2007-08-16 20:05:11 +00:00
|
|
|
{
|
2012-03-26 21:49:08 +00:00
|
|
|
ccm_t *ccm = (ccm_t *) MMAP_CCM;
|
2007-08-16 20:05:11 +00:00
|
|
|
u16 msk;
|
|
|
|
u16 id = 0;
|
|
|
|
u8 ver;
|
|
|
|
|
|
|
|
puts("CPU: ");
|
2012-03-26 21:49:08 +00:00
|
|
|
msk = (in_be16(&ccm->cir) >> 6);
|
|
|
|
ver = (in_be16(&ccm->cir) & 0x003f);
|
2007-08-16 20:05:11 +00:00
|
|
|
switch (msk) {
|
|
|
|
case 0x48:
|
|
|
|
id = 54455;
|
|
|
|
break;
|
|
|
|
case 0x49:
|
|
|
|
id = 54454;
|
|
|
|
break;
|
|
|
|
case 0x4a:
|
|
|
|
id = 54453;
|
|
|
|
break;
|
|
|
|
case 0x4b:
|
|
|
|
id = 54452;
|
|
|
|
break;
|
|
|
|
case 0x4d:
|
|
|
|
id = 54451;
|
|
|
|
break;
|
|
|
|
case 0x4f:
|
|
|
|
id = 54450;
|
|
|
|
break;
|
2012-10-18 19:25:51 +00:00
|
|
|
case 0x9F:
|
|
|
|
id = 54410;
|
|
|
|
break;
|
|
|
|
case 0xA0:
|
|
|
|
id = 54415;
|
|
|
|
break;
|
|
|
|
case 0xA1:
|
|
|
|
id = 54416;
|
|
|
|
break;
|
|
|
|
case 0xA2:
|
|
|
|
id = 54417;
|
|
|
|
break;
|
|
|
|
case 0xA3:
|
|
|
|
id = 54418;
|
|
|
|
break;
|
2007-08-16 20:05:11 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if (id) {
|
2008-10-19 00:35:49 +00:00
|
|
|
char buf1[32], buf2[32], buf3[32];
|
|
|
|
|
2007-08-16 20:05:11 +00:00
|
|
|
printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
|
|
|
|
ver);
|
2008-10-19 00:35:49 +00:00
|
|
|
printf(" CPU CLK %s MHz BUS CLK %s MHz FLB CLK %s MHz\n",
|
|
|
|
strmhz(buf1, gd->cpu_clk),
|
|
|
|
strmhz(buf2, gd->bus_clk),
|
2012-12-13 20:49:07 +00:00
|
|
|
strmhz(buf3, gd->arch.flb_clk));
|
2007-08-16 20:05:11 +00:00
|
|
|
#ifdef CONFIG_PCI
|
2008-10-19 00:35:49 +00:00
|
|
|
printf(" PCI CLK %s MHz INP CLK %s MHz VCO CLK %s MHz\n",
|
|
|
|
strmhz(buf1, gd->pci_clk),
|
2012-12-13 20:49:07 +00:00
|
|
|
strmhz(buf2, gd->arch.inp_clk),
|
|
|
|
strmhz(buf3, gd->arch.vco_clk));
|
2007-08-16 20:05:11 +00:00
|
|
|
#else
|
2008-10-19 00:35:49 +00:00
|
|
|
printf(" INP CLK %s MHz VCO CLK %s MHz\n",
|
2012-12-13 20:49:07 +00:00
|
|
|
strmhz(buf1, gd->arch.inp_clk),
|
|
|
|
strmhz(buf2, gd->arch.vco_clk));
|
2007-08-16 20:05:11 +00:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2017-08-19 22:01:55 +00:00
|
|
|
#endif /* CONFIG_DISPLAY_CPUINFO */
|
2008-08-27 05:16:25 +00:00
|
|
|
|
|
|
|
#if defined(CONFIG_MCFFEC)
|
|
|
|
/* Default initializations for MCFFEC controllers. To override,
|
|
|
|
* create a board-specific function called:
|
|
|
|
* int board_eth_init(bd_t *bis)
|
|
|
|
*/
|
|
|
|
|
|
|
|
int cpu_eth_init(bd_t *bis)
|
|
|
|
{
|
|
|
|
return mcffec_initialize(bis);
|
|
|
|
}
|
|
|
|
#endif
|