2015-03-12 04:24:39 +00:00
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CONFIG_ARM=y
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2019-05-03 13:41:00 +00:00
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CONFIG_SPL_SYS_DCACHE_OFF=y
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2015-03-16 07:43:24 +00:00
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CONFIG_ARCH_ZYNQ=y
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2016-12-16 10:57:17 +00:00
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CONFIG_SYS_TEXT_BASE=0x4000000
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2019-04-29 19:54:04 +00:00
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CONFIG_SPL_STACK_R_ADDR=0x200000
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2018-03-23 08:34:00 +00:00
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CONFIG_SPL=y
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2018-06-04 06:33:30 +00:00
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CONFIG_DEBUG_UART_BASE=0xe0001000
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CONFIG_DEBUG_UART_CLOCK=50000000
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2017-12-13 09:35:06 +00:00
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CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM010"
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2017-11-02 09:40:57 +00:00
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CONFIG_DEBUG_UART=y
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2018-01-09 18:31:16 +00:00
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CONFIG_DISTRO_DEFAULTS=y
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2019-06-02 12:57:32 +00:00
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CONFIG_SYS_CUSTOM_LDSCRIPT=y
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CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
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2015-01-23 10:31:53 +00:00
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CONFIG_FIT=y
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CONFIG_FIT_SIGNATURE=y
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2017-01-21 10:48:33 +00:00
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CONFIG_FIT_VERBOSE=y
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2019-05-23 11:14:07 +00:00
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CONFIG_LEGACY_IMAGE_FORMAT=y
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2019-07-21 02:51:14 +00:00
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CONFIG_USE_PREBOOT=y
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2017-12-01 12:50:33 +00:00
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CONFIG_SPL_STACK_R=y
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2016-10-06 05:55:15 +00:00
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CONFIG_SPL_OS_BOOT=y
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2018-04-07 14:05:27 +00:00
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CONFIG_SPL_SPI_LOAD=y
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2019-08-22 13:41:46 +00:00
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CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
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2019-10-14 07:38:39 +00:00
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# CONFIG_BOOTM_NETBSD is not set
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2015-06-22 21:15:30 +00:00
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# CONFIG_CMD_FLASH is not set
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2017-05-17 09:25:21 +00:00
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CONFIG_CMD_FPGA_LOADBP=y
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CONFIG_CMD_FPGA_LOADFS=y
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CONFIG_CMD_FPGA_LOADMK=y
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CONFIG_CMD_FPGA_LOADP=y
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2015-11-11 13:39:33 +00:00
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CONFIG_CMD_GPIO=y
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2017-08-14 23:58:53 +00:00
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CONFIG_CMD_MMC=y
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2015-06-22 21:15:30 +00:00
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# CONFIG_CMD_SETEXPR is not set
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2016-04-22 20:41:25 +00:00
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CONFIG_CMD_TFTPPUT=y
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2016-04-24 21:29:26 +00:00
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_EXT4_WRITE=y
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2018-02-10 21:54:38 +00:00
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# CONFIG_SPL_DOS_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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2018-09-03 19:26:12 +00:00
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CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm010"
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2017-08-28 11:16:32 +00:00
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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2019-11-13 03:46:36 +00:00
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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2015-07-17 11:26:06 +00:00
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CONFIG_NET_RANDOM_ETHADDR=y
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2016-01-07 17:00:46 +00:00
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CONFIG_SPL_DM_SEQ_ALIAS=y
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2017-11-03 14:53:56 +00:00
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CONFIG_FPGA_XILINX=y
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2018-02-16 12:32:51 +00:00
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CONFIG_FPGA_ZYNQPL=y
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2018-01-09 14:27:31 +00:00
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CONFIG_DM_GPIO=y
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2016-12-07 13:10:28 +00:00
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CONFIG_MMC_SDHCI=y
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2017-02-10 12:57:35 +00:00
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CONFIG_MMC_SDHCI_ZYNQ=y
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2019-02-27 14:20:36 +00:00
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CONFIG_SF_DEFAULT_SPEED=30000000
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2016-01-25 14:39:26 +00:00
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CONFIG_SPI_FLASH_ISSI=y
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2017-11-02 09:44:48 +00:00
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CONFIG_SPI_FLASH_MACRONIX=y
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2015-11-25 13:34:54 +00:00
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_SST=y
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CONFIG_SPI_FLASH_WINBOND=y
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2018-01-24 05:21:30 +00:00
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_REALTEK=y
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CONFIG_PHY_XILINX=y
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2018-07-21 04:03:57 +00:00
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CONFIG_MII=y
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2015-11-30 13:34:52 +00:00
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CONFIG_ZYNQ_GEM=y
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2017-11-02 09:40:57 +00:00
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CONFIG_DEBUG_UART_ZYNQ=y
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2017-11-06 08:16:05 +00:00
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CONFIG_ZYNQ_SERIAL=y
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2015-11-25 13:34:53 +00:00
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CONFIG_ZYNQ_SPI=y
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2015-08-31 12:08:40 +00:00
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CONFIG_ZYNQ_QSPI=y
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