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kconfig: add board Kconfig and defconfig files This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 05:08:14 +00:00
menu "MIPS architecture"
depends on MIPS
config SYS_ARCH
default "mips"
MIPS: kconfig: globally define CONFIG_SYS_CPU for MIPS Now the user can select the CPU type for each target. Thus CONFIG_SYS_CPU could be set globally. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
config SYS_CPU
MIPS: Simplify CONFIG_SYS_CPU values Rather than having the values for CONFIG_SYS_CPU depend upon each architecture revision, have them depend upon the more general CONFIG_CPU_MIPS32 & CONFIG_CPU_MIPS64 which in turn depend upon the architecture revisions. This is done in preparation for adding MIPSr6 support, which would otherwise need to introduce new cases here. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-16 09:52:11 +00:00
default "mips32" if CPU_MIPS32
default "mips64" if CPU_MIPS64
MIPS: kconfig: globally define CONFIG_SYS_CPU for MIPS Now the user can select the CPU type for each target. Thus CONFIG_SYS_CPU could be set globally. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
kconfig: add board Kconfig and defconfig files This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 05:08:14 +00:00
choice
prompt "Target select"
arch: Make board selection choices optional By making the board selections optional, every defconfig will include the board selection when running savedefconfig so if a new board is added to the top of the list of choices the former top's defconfig will still be correct. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Cc: Tom Rini <trini@konsulko.com>
2015-05-12 19:46:23 +00:00
optional
kconfig: add board Kconfig and defconfig files This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 05:08:14 +00:00
config TARGET_QEMU_MIPS
bool "Support qemu-mips"
MIPS: kconfig: add options for endianess select Add new Kconfig option to let the user select the targets endianess. Each target have to select SUPPORTS_BIG_ENDIAN and/or SUPPORTS_LITTLE_ENDIAN to indicate which endianess is supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_LITTLE_ENDIAN
MIPS: kconfig: add options for CPU type select Add new Kconfig option to let the user select the targets CPU type. Each target have to select SUPPORTS_CPU_MIPS[32,64]_R[1,2] to indicate which CPU types are supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
MIPS: kconfig: merge targets qemu_mips and qemu_mips64 Now the user can separately select the CPU type. Thus the targets qemu_mips and qemu_mips64 can be merged to a single target. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
select SUPPORTS_CPU_MIPS64_R1
select SUPPORTS_CPU_MIPS64_R2
MIPS: make inclusion of ROM exception vectors configurable This adds a compile time option to include code for static exception vectors. Static exception vectors are only needed, when the U-Boot entry point is equal to the CPU reset exception vector address. For instance this is the case when U-Boot is used as ROM in Qemu or booted from parallel NOR flash. When U-Boot is booted from RAM (e.g. loaded there by SPL), the exception vectors need to be setup dynamically, which is done in follow-up commits. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-02-14 17:52:57 +00:00
select ROM_EXCEPTION_VECTORS
Convert CONFIG_ENV_IS_IN_FLASH to Kconfig This converts the following to Kconfig: CONFIG_ENV_IS_IN_FLASH Signed-off-by: Simon Glass <sjg@chromium.org>
2017-07-24 03:19:41 +00:00
imply ENV_IS_IN_FLASH
kconfig: add board Kconfig and defconfig files This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 05:08:14 +00:00
config TARGET_MALTA
bool "Support malta"
malta: Use device model & tree for UART Make use of device model & device tree to probe the UART driver. This is the initial step in bringing Malta up to date with driver model, and allows for cleaner handling of the different I/O addresses for different system controllers by specifying the ISA bus address instead of a translated memory address. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-17 06:43:28 +00:00
select DM
select DM_SERIAL
MIPS: Support dynamic I/O port base address The existing mips_io_port_base variable isn't suitable for use early during boot since it will be stored in the .data section which may not be writable pre-relocation. Fix this by moving the I/O port base address into struct arch_global_data. In order to avoid adding this field for all targets, make this dependant upon a new Kconfig entry CONFIG_DYNAMIC_IO_PORT_BASE. Malta is the only board which sets a non-zero I/O port base, so select this option only for Malta. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-01-29 13:54:52 +00:00
select DYNAMIC_IO_PORT_BASE
MIPS: Malta: Enable CM & L2 support Enable support for the MIPS Coherence Manager & L2 caches on the MIPS Malta board, removing the need for us to attempt to bypass the L2 during boot (which would fail with recent CPUs that expose L2 config via the CM anyway). Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-09-21 10:18:56 +00:00
select MIPS_CM
select MIPS_L2_CACHE
malta: Use device model & tree for UART Make use of device model & device tree to probe the UART driver. This is the initial step in bringing Malta up to date with driver model, and allows for cleaner handling of the different I/O addresses for different system controllers by specifying the ISA bus address instead of a translated memory address. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-17 06:43:28 +00:00
select OF_CONTROL
select OF_ISA_BUS
MIPS: kconfig: add options for endianess select Add new Kconfig option to let the user select the targets endianess. Each target have to select SUPPORTS_BIG_ENDIAN and/or SUPPORTS_LITTLE_ENDIAN to indicate which endianess is supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_LITTLE_ENDIAN
MIPS: kconfig: add options for CPU type select Add new Kconfig option to let the user select the targets CPU type. Each target have to select SUPPORTS_CPU_MIPS[32,64]_R[1,2] to indicate which CPU types are supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
malta: Support MIPS32r6 configurations Both real Malta boards & QEMU's Malta emulation can feature MIPS32r6 CPUs. Allow building U-Boot for such systems by selecting CONFIG_SUPPORTS_CPU_MIPS32_R6 for Malta. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-16 09:52:14 +00:00
select SUPPORTS_CPU_MIPS32_R6
malta: Allow MIPS64 builds Both real Malta boards & emulators that mimic Malta (eg. QEMU) can support MIPS64 CPUs. Allow MIPS64 builds of U-Boot for such boards, which enables the user to make use of the whole 64 bit address space. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-26 13:49:36 +00:00
select SUPPORTS_CPU_MIPS64_R1
select SUPPORTS_CPU_MIPS64_R2
select SUPPORTS_CPU_MIPS64_R6
MIPS: add Kconfig option for CONFIG_SWAP_IO_SPACE Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-18 21:00:18 +00:00
select SWAP_IO_SPACE
MIPS: kconfig: add option for MIPS_L1_CACHE_SHIFT Add Kconfig symbol for L1 cache shift like the kernel does. The value of CONFIG_SYS_CACHELINE_SIZE is not a reliable source for ARCH_DMA_MINALIGN anymore, because it is optional on MIPS. If CONFIG_SYS_CACHELINE_SIZE is not defined by a board, the cache sizes are automatically detected and ARCH_DMA_MINALIGN would be set to 128 Bytes. The default value for CONFIG_MIPS_L1_CACHE_SHIFT is 5 which corresponds to 32 Bytes. All current MIPS boards already used that value. While on it, fix the Malta board to use a value of 6 like the kernel port does. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-09 16:32:50 +00:00
select MIPS_L1_CACHE_SHIFT_6
MIPS: make inclusion of ROM exception vectors configurable This adds a compile time option to include code for static exception vectors. Static exception vectors are only needed, when the U-Boot entry point is equal to the CPU reset exception vector address. For instance this is the case when U-Boot is used as ROM in Qemu or booted from parallel NOR flash. When U-Boot is booted from RAM (e.g. loaded there by SPL), the exception vectors need to be setup dynamically, which is done in follow-up commits. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-02-14 17:52:57 +00:00
select ROM_EXCEPTION_VECTORS
Convert CONFIG_ENV_IS_IN_FLASH to Kconfig This converts the following to Kconfig: CONFIG_ENV_IS_IN_FLASH Signed-off-by: Simon Glass <sjg@chromium.org>
2017-07-24 03:19:41 +00:00
imply ENV_IS_IN_FLASH
kconfig: add board Kconfig and defconfig files This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 05:08:14 +00:00
config TARGET_VCT
bool "Support vct"
MIPS: kconfig: add options for endianess select Add new Kconfig option to let the user select the targets endianess. Each target have to select SUPPORTS_BIG_ENDIAN and/or SUPPORTS_LITTLE_ENDIAN to indicate which endianess is supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
select SUPPORTS_BIG_ENDIAN
MIPS: kconfig: add options for CPU type select Add new Kconfig option to let the user select the targets CPU type. Each target have to select SUPPORTS_CPU_MIPS[32,64]_R[1,2] to indicate which CPU types are supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
MIPS: allow systems to skip loads during cache init Current MIPS systems do not require that loads be performed to force the parity of cache lines, a simple invalidate by clearing the tag for each line will suffice. Thus this patch makes the loads & subsequent second invalidation conditional upon the CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD option, and defines that for existing mips32 targets. Exceptions are malta where this is known to be unnecessary, and qemu-mips where caches are not implemented. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-29 01:28:02 +00:00
select SYS_MIPS_CACHE_INIT_RAM_LOAD
MIPS: make inclusion of ROM exception vectors configurable This adds a compile time option to include code for static exception vectors. Static exception vectors are only needed, when the U-Boot entry point is equal to the CPU reset exception vector address. For instance this is the case when U-Boot is used as ROM in Qemu or booted from parallel NOR flash. When U-Boot is booted from RAM (e.g. loaded there by SPL), the exception vectors need to be setup dynamically, which is done in follow-up commits. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-02-14 17:52:57 +00:00
select ROM_EXCEPTION_VECTORS
kconfig: add board Kconfig and defconfig files This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 05:08:14 +00:00
config TARGET_DBAU1X00
bool "Support dbau1x00"
MIPS: kconfig: add options for endianess select Add new Kconfig option to let the user select the targets endianess. Each target have to select SUPPORTS_BIG_ENDIAN and/or SUPPORTS_LITTLE_ENDIAN to indicate which endianess is supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_LITTLE_ENDIAN
MIPS: kconfig: add options for CPU type select Add new Kconfig option to let the user select the targets CPU type. Each target have to select SUPPORTS_CPU_MIPS[32,64]_R[1,2] to indicate which CPU types are supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
MIPS: allow systems to skip loads during cache init Current MIPS systems do not require that loads be performed to force the parity of cache lines, a simple invalidate by clearing the tag for each line will suffice. Thus this patch makes the loads & subsequent second invalidation conditional upon the CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD option, and defines that for existing mips32 targets. Exceptions are malta where this is known to be unnecessary, and qemu-mips where caches are not implemented. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-29 01:28:02 +00:00
select SYS_MIPS_CACHE_INIT_RAM_LOAD
MIPS: make inclusion of ROM exception vectors configurable This adds a compile time option to include code for static exception vectors. Static exception vectors are only needed, when the U-Boot entry point is equal to the CPU reset exception vector address. For instance this is the case when U-Boot is used as ROM in Qemu or booted from parallel NOR flash. When U-Boot is booted from RAM (e.g. loaded there by SPL), the exception vectors need to be setup dynamically, which is done in follow-up commits. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-02-14 17:52:57 +00:00
select ROM_EXCEPTION_VECTORS
MIPS: Kconfig: optimize gcc -march and -mtune setup Move setup of -march to arch/mips/Makefile and follow the design on ARM. Also add a possibility to chose specific CPU tune options. Signed-off-by: Wills Wang <wills.wang@live.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-12-26 18:55:37 +00:00
select MIPS_TUNE_4KC
kconfig: add board Kconfig and defconfig files This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 05:08:14 +00:00
config TARGET_PB1X00
bool "Support pb1x00"
MIPS: kconfig: add options for endianess select Add new Kconfig option to let the user select the targets endianess. Each target have to select SUPPORTS_BIG_ENDIAN and/or SUPPORTS_LITTLE_ENDIAN to indicate which endianess is supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
select SUPPORTS_LITTLE_ENDIAN
MIPS: kconfig: add options for CPU type select Add new Kconfig option to let the user select the targets CPU type. Each target have to select SUPPORTS_CPU_MIPS[32,64]_R[1,2] to indicate which CPU types are supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
MIPS: allow systems to skip loads during cache init Current MIPS systems do not require that loads be performed to force the parity of cache lines, a simple invalidate by clearing the tag for each line will suffice. Thus this patch makes the loads & subsequent second invalidation conditional upon the CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD option, and defines that for existing mips32 targets. Exceptions are malta where this is known to be unnecessary, and qemu-mips where caches are not implemented. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-29 01:28:02 +00:00
select SYS_MIPS_CACHE_INIT_RAM_LOAD
MIPS: make inclusion of ROM exception vectors configurable This adds a compile time option to include code for static exception vectors. Static exception vectors are only needed, when the U-Boot entry point is equal to the CPU reset exception vector address. For instance this is the case when U-Boot is used as ROM in Qemu or booted from parallel NOR flash. When U-Boot is booted from RAM (e.g. loaded there by SPL), the exception vectors need to be setup dynamically, which is done in follow-up commits. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-02-14 17:52:57 +00:00
select ROM_EXCEPTION_VECTORS
MIPS: Kconfig: optimize gcc -march and -mtune setup Move setup of -march to arch/mips/Makefile and follow the design on ARM. Also add a possibility to chose specific CPU tune options. Signed-off-by: Wills Wang <wills.wang@live.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-12-26 18:55:37 +00:00
select MIPS_TUNE_4KC
kconfig: add board Kconfig and defconfig files This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 05:08:14 +00:00
mips: add base support for QCA/Atheros ath79 SOCs This patch add some common code for QCA/Atheros ath79 SOCs such as DDR tuning, chip reset and CPU detection. Signed-off-by: Wills Wang <wills.wang@live.com>
2016-03-16 08:59:52 +00:00
config ARCH_ATH79
bool "Support QCA/Atheros ath79"
select OF_CONTROL
select DM
MIPS: add initial infrastructure for Broadcom MIPS SoCs CFE checks CPU Thread in a different way (using register $22): mfc0 t1, C0_BCM_CONFIG, 3 # $22 li t2, CP0_CMT_TPID # (1 << 31) and t1, t2 bnez t1, 2f # if we are running on thread 1, skip init nop Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-24 22:39:20 +00:00
config ARCH_BMIPS
bool "Support BMIPS SoCs"
select OF_CONTROL
select DM
select CLK
select CPU
select RAM
select SYSRESET
Convert CONFIG_ENV_IS_IN_MMC/NAND/UBI and NOWHERE to Kconfig This converts the following to Kconfig: CONFIG_ENV_IS_IN_MMC CONFIG_ENV_IS_IN_NAND CONFIG_ENV_IS_IN_UBI CONFIG_ENV_IS_NOWHERE In fact this already exists for sunxi as a 'choice' config. However not all the choices are available in Kconfig yet so we cannot use that. It would lead to more than one option being set. In addition, one purpose of this series is to allow the environment to be stored in more than one place. So the existing choice is converted to a normal config allowing each option to be set independently. There are not many opportunities for Kconfig updates to reduce the size of this patch. This was tested with ./tools/moveconfig.py -i CONFIG_ENV_IS_IN_MMC And then manual updates. This is because for CHAIN_OF_TRUST boards they can only have ENV_IS_NOWHERE set, so we enforce that via Kconfig logic now. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-07-24 03:19:39 +00:00
imply ENV_IS_NOWHERE
MIPS: add initial infrastructure for Broadcom MIPS SoCs CFE checks CPU Thread in a different way (using register $22): mfc0 t1, C0_BCM_CONFIG, 3 # $22 li t2, CP0_CMT_TPID # (1 << 31) and t1, t2 bnez t1, 2f # if we are running on thread 1, skip init nop Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-24 22:39:20 +00:00
MIPS: initial infrastructure for Microchip PIC32 architecture Create initial directory, Kconfigs needed for PIC32 architecture support. Also add PIC32 specific register definition required for drivers. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-01-28 10:00:10 +00:00
config MACH_PIC32
bool "Support Microchip PIC32"
select OF_CONTROL
select DM
boston: Introduce support for the MIPS Boston development board This patch introduces support for building U-Boot to run on the MIPS Boston development board. This is a board built around an FPGA & an Intel EG20T Platform Controller Hub, used largely as part of the development of new CPUs and their software support. It is essentially the successor to the older MIPS Malta board. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-09-08 06:47:39 +00:00
config TARGET_BOSTON
bool "Support Boston"
select DM
select DM_SERIAL
select OF_CONTROL
select MIPS_CM
select MIPS_L1_CACHE_SHIFT_6
select MIPS_L2_CACHE
boston: Setup memory ranges in FDT provided to Linux The boston memory map isn't suited to the simple "all memory starting from 0" approach that the MIPS arch_fixup_fdt() implementation takes. Instead we need to indicate the first 256MiB of DDR from 0 and the rest from 0x90000000. Implement ft_board_setup to do that. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-30 19:22:42 +00:00
select OF_BOARD_SETUP
boston: Introduce support for the MIPS Boston development board This patch introduces support for building U-Boot to run on the MIPS Boston development board. This is a board built around an FPGA & an Intel EG20T Platform Controller Hub, used largely as part of the development of new CPUs and their software support. It is essentially the successor to the older MIPS Malta board. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-09-08 06:47:39 +00:00
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_LITTLE_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
select SUPPORTS_CPU_MIPS32_R6
select SUPPORTS_CPU_MIPS64_R1
select SUPPORTS_CPU_MIPS64_R2
select SUPPORTS_CPU_MIPS64_R6
MIPS: make inclusion of ROM exception vectors configurable This adds a compile time option to include code for static exception vectors. Static exception vectors are only needed, when the U-Boot entry point is equal to the CPU reset exception vector address. For instance this is the case when U-Boot is used as ROM in Qemu or booted from parallel NOR flash. When U-Boot is booted from RAM (e.g. loaded there by SPL), the exception vectors need to be setup dynamically, which is done in follow-up commits. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-02-14 17:52:57 +00:00
select ROM_EXCEPTION_VECTORS
Convert CONFIG_ENV_IS_IN_FLASH to Kconfig This converts the following to Kconfig: CONFIG_ENV_IS_IN_FLASH Signed-off-by: Simon Glass <sjg@chromium.org>
2017-07-24 03:19:41 +00:00
imply ENV_IS_IN_FLASH
boston: Introduce support for the MIPS Boston development board This patch introduces support for building U-Boot to run on the MIPS Boston development board. This is a board built around an FPGA & an Intel EG20T Platform Controller Hub, used largely as part of the development of new CPUs and their software support. It is essentially the successor to the older MIPS Malta board. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-09-08 06:47:39 +00:00
mips: Add MIPSfpga platform support MIPSfpga is an FPGA based dev platform. In a nutshell, its a microAptiv cpu core with lots of Xilinx IP blocks The FPGA dev board used is the Nexys4DDR board by Digilent. For more information, check the Readme file in board/imgtec/xilfpga Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-07-29 14:11:20 +00:00
config TARGET_XILFPGA
bool "Support Imagination Xilfpga"
select OF_CONTROL
select DM
select DM_SERIAL
select DM_GPIO
select DM_ETH
select SUPPORTS_LITTLE_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
select MIPS_L1_CACHE_SHIFT_4
MIPS: make inclusion of ROM exception vectors configurable This adds a compile time option to include code for static exception vectors. Static exception vectors are only needed, when the U-Boot entry point is equal to the CPU reset exception vector address. For instance this is the case when U-Boot is used as ROM in Qemu or booted from parallel NOR flash. When U-Boot is booted from RAM (e.g. loaded there by SPL), the exception vectors need to be setup dynamically, which is done in follow-up commits. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-02-14 17:52:57 +00:00
select ROM_EXCEPTION_VECTORS
mips: Add MIPSfpga platform support MIPSfpga is an FPGA based dev platform. In a nutshell, its a microAptiv cpu core with lots of Xilinx IP blocks The FPGA dev board used is the Nexys4DDR board by Digilent. For more information, check the Readme file in board/imgtec/xilfpga Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-07-29 14:11:20 +00:00
help
This supports IMGTEC MIPSfpga platform
kconfig: add board Kconfig and defconfig files This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 05:08:14 +00:00
endchoice
source "board/dbau1x00/Kconfig"
boston: Introduce support for the MIPS Boston development board This patch introduces support for building U-Boot to run on the MIPS Boston development board. This is a board built around an FPGA & an Intel EG20T Platform Controller Hub, used largely as part of the development of new CPUs and their software support. It is essentially the successor to the older MIPS Malta board. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-09-08 06:47:39 +00:00
source "board/imgtec/boston/Kconfig"
kconfig: add board Kconfig and defconfig files This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 05:08:14 +00:00
source "board/imgtec/malta/Kconfig"
mips: Add MIPSfpga platform support MIPSfpga is an FPGA based dev platform. In a nutshell, its a microAptiv cpu core with lots of Xilinx IP blocks The FPGA dev board used is the Nexys4DDR board by Digilent. For more information, check the Readme file in board/imgtec/xilfpga Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-07-29 14:11:20 +00:00
source "board/imgtec/xilfpga/Kconfig"
kconfig: add board Kconfig and defconfig files This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 05:08:14 +00:00
source "board/micronas/vct/Kconfig"
source "board/pb1x00/Kconfig"
source "board/qemu-mips/Kconfig"
mips: add base support for QCA/Atheros ath79 SOCs This patch add some common code for QCA/Atheros ath79 SOCs such as DDR tuning, chip reset and CPU detection. Signed-off-by: Wills Wang <wills.wang@live.com>
2016-03-16 08:59:52 +00:00
source "arch/mips/mach-ath79/Kconfig"
MIPS: add initial infrastructure for Broadcom MIPS SoCs CFE checks CPU Thread in a different way (using register $22): mfc0 t1, C0_BCM_CONFIG, 3 # $22 li t2, CP0_CMT_TPID # (1 << 31) and t1, t2 bnez t1, 2f # if we are running on thread 1, skip init nop Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-24 22:39:20 +00:00
source "arch/mips/mach-bmips/Kconfig"
MIPS: initial infrastructure for Microchip PIC32 architecture Create initial directory, Kconfigs needed for PIC32 architecture support. Also add PIC32 specific register definition required for drivers. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-01-28 10:00:10 +00:00
source "arch/mips/mach-pic32/Kconfig"
kconfig: add board Kconfig and defconfig files This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 05:08:14 +00:00
MIPS: kconfig: add options for endianess select Add new Kconfig option to let the user select the targets endianess. Each target have to select SUPPORTS_BIG_ENDIAN and/or SUPPORTS_LITTLE_ENDIAN to indicate which endianess is supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
if MIPS
choice
prompt "Endianness selection"
help
Some MIPS boards can be configured for either little or big endian
byte order. These modes require different U-Boot images. In general there
is one preferred byteorder for a particular system but some systems are
just as commonly used in the one or the other endianness.
config SYS_BIG_ENDIAN
bool "Big endian"
depends on SUPPORTS_BIG_ENDIAN
config SYS_LITTLE_ENDIAN
bool "Little endian"
depends on SUPPORTS_LITTLE_ENDIAN
endchoice
MIPS: kconfig: add options for CPU type select Add new Kconfig option to let the user select the targets CPU type. Each target have to select SUPPORTS_CPU_MIPS[32,64]_R[1,2] to indicate which CPU types are supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
choice
prompt "CPU selection"
default CPU_MIPS32_R2
config CPU_MIPS32_R1
bool "MIPS32 Release 1"
depends on SUPPORTS_CPU_MIPS32_R1
select 32BIT
help
MIPS: Support for targetting MIPSr6 Add support for targetting MIPS32r6 & MIPS64r6 systems, in the same way that we currently select release 1 or release 2 targets. MIPSr6 is not entirely backwards compatible with earlier releases of the architecture. Some instructions are encoded differently, some are removed, some are reused, so it is not practical to run U-Boot built for earlier revisions on a MIPSr6 system. Update their Kconfig help text to reflect that. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-16 09:52:12 +00:00
Choose this option to build an U-Boot for release 1 through 5 of the
MIPS: kconfig: add options for CPU type select Add new Kconfig option to let the user select the targets CPU type. Each target have to select SUPPORTS_CPU_MIPS[32,64]_R[1,2] to indicate which CPU types are supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
MIPS32 architecture.
config CPU_MIPS32_R2
bool "MIPS32 Release 2"
depends on SUPPORTS_CPU_MIPS32_R2
select 32BIT
help
MIPS: Support for targetting MIPSr6 Add support for targetting MIPS32r6 & MIPS64r6 systems, in the same way that we currently select release 1 or release 2 targets. MIPSr6 is not entirely backwards compatible with earlier releases of the architecture. Some instructions are encoded differently, some are removed, some are reused, so it is not practical to run U-Boot built for earlier revisions on a MIPSr6 system. Update their Kconfig help text to reflect that. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-16 09:52:12 +00:00
Choose this option to build an U-Boot for release 2 through 5 of the
MIPS32 architecture.
config CPU_MIPS32_R6
bool "MIPS32 Release 6"
depends on SUPPORTS_CPU_MIPS32_R6
select 32BIT
help
Choose this option to build an U-Boot for release 6 or later of the
MIPS: kconfig: add options for CPU type select Add new Kconfig option to let the user select the targets CPU type. Each target have to select SUPPORTS_CPU_MIPS[32,64]_R[1,2] to indicate which CPU types are supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
MIPS32 architecture.
config CPU_MIPS64_R1
bool "MIPS64 Release 1"
depends on SUPPORTS_CPU_MIPS64_R1
select 64BIT
help
MIPS: Support for targetting MIPSr6 Add support for targetting MIPS32r6 & MIPS64r6 systems, in the same way that we currently select release 1 or release 2 targets. MIPSr6 is not entirely backwards compatible with earlier releases of the architecture. Some instructions are encoded differently, some are removed, some are reused, so it is not practical to run U-Boot built for earlier revisions on a MIPSr6 system. Update their Kconfig help text to reflect that. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-16 09:52:12 +00:00
Choose this option to build a kernel for release 1 through 5 of the
MIPS: kconfig: add options for CPU type select Add new Kconfig option to let the user select the targets CPU type. Each target have to select SUPPORTS_CPU_MIPS[32,64]_R[1,2] to indicate which CPU types are supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
MIPS64 architecture.
config CPU_MIPS64_R2
bool "MIPS64 Release 2"
depends on SUPPORTS_CPU_MIPS64_R2
select 64BIT
Convert CONFIG_ENV_IS_IN_FLASH to Kconfig This converts the following to Kconfig: CONFIG_ENV_IS_IN_FLASH Signed-off-by: Simon Glass <sjg@chromium.org>
2017-07-24 03:19:41 +00:00
imply ENV_IS_IN_FLASH
MIPS: kconfig: add options for CPU type select Add new Kconfig option to let the user select the targets CPU type. Each target have to select SUPPORTS_CPU_MIPS[32,64]_R[1,2] to indicate which CPU types are supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
help
MIPS: Support for targetting MIPSr6 Add support for targetting MIPS32r6 & MIPS64r6 systems, in the same way that we currently select release 1 or release 2 targets. MIPSr6 is not entirely backwards compatible with earlier releases of the architecture. Some instructions are encoded differently, some are removed, some are reused, so it is not practical to run U-Boot built for earlier revisions on a MIPSr6 system. Update their Kconfig help text to reflect that. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-16 09:52:12 +00:00
Choose this option to build a kernel for release 2 through 5 of the
MIPS64 architecture.
config CPU_MIPS64_R6
bool "MIPS64 Release 6"
depends on SUPPORTS_CPU_MIPS64_R6
select 64BIT
help
Choose this option to build a kernel for release 6 or later of the
MIPS: kconfig: add options for CPU type select Add new Kconfig option to let the user select the targets CPU type. Each target have to select SUPPORTS_CPU_MIPS[32,64]_R[1,2] to indicate which CPU types are supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
MIPS64 architecture.
endchoice
MIPS: make inclusion of ROM exception vectors configurable This adds a compile time option to include code for static exception vectors. Static exception vectors are only needed, when the U-Boot entry point is equal to the CPU reset exception vector address. For instance this is the case when U-Boot is used as ROM in Qemu or booted from parallel NOR flash. When U-Boot is booted from RAM (e.g. loaded there by SPL), the exception vectors need to be setup dynamically, which is done in follow-up commits. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-02-14 17:52:57 +00:00
menu "General setup"
config ROM_EXCEPTION_VECTORS
bool "Build U-Boot image with exception vectors"
help
Enable this to include exception vectors in the U-Boot image. This is
required if the U-Boot entry point is equal to the address of the
CPU reset exception vector (e.g. U-Boot as ROM loader in Qemu,
U-Boot booted from parallel NOR flash).
Disable this, if the U-Boot image is booted from DRAM (e.g. by SPL).
In that case the image size will be reduced by 0x500 bytes.
MIPS: Make CM GCR base configurable Without adding a prompt for CONFIG_MIPS_CM_BASE, Kconfig doesn't allow defconfigs to set it. Provide the prompt in order to allow for that. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-12 11:26:11 +00:00
config MIPS_CM_BASE
hex "MIPS CM GCR Base Address"
depends on MIPS_CM
boston: Move CM GCRs away from flash Move the MIPS Coherence Manager (CM) Global Configuration Registers (GCRs) away from the region of the physical address space which the Boston board's parallel flash is found in, such that we can access all of flash without clobbering GCRs. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-30 19:22:41 +00:00
default 0x16100000 if TARGET_BOSTON
MIPS: Make CM GCR base configurable Without adding a prompt for CONFIG_MIPS_CM_BASE, Kconfig doesn't allow defconfigs to set it. Provide the prompt in order to allow for that. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-12 11:26:11 +00:00
default 0x1fbf8000
help
The physical base address at which to map the MIPS Coherence Manager
Global Configuration Registers (GCRs). This should be set such that
the GCRs occupy a region of the physical address space which is
otherwise unused, or at minimum that software doesn't need to access.
MIPS: make inclusion of ROM exception vectors configurable This adds a compile time option to include code for static exception vectors. Static exception vectors are only needed, when the U-Boot entry point is equal to the CPU reset exception vector address. For instance this is the case when U-Boot is used as ROM in Qemu or booted from parallel NOR flash. When U-Boot is booted from RAM (e.g. loaded there by SPL), the exception vectors need to be setup dynamically, which is done in follow-up commits. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-02-14 17:52:57 +00:00
endmenu
MIPS: bootm: refactor preparation of Linux kernel command line Move preparation of Linux kernel command line in a separate function and mark it as legacy. Add a Kconfig option to make that legacy mode configurable. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-14 20:44:13 +00:00
menu "OS boot interface"
config MIPS_BOOT_CMDLINE_LEGACY
bool "Hand over legacy command line to Linux kernel"
default y
help
Enable this option if you want U-Boot to hand over the Yamon-style
command line to the kernel. All bootargs will be prepared as argc/argv
compatible list. The argument count (argc) is stored in register $a0.
The address of the argument list (argv) is stored in register $a1.
MIPS: bootm: refactor preparation of Linux kernel environment Move preparation of Linux kernel environment in a separate function and mark it as legacy. Add a Kconfig option to make that legacy mode configurable. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-14 20:44:13 +00:00
config MIPS_BOOT_ENV_LEGACY
bool "Hand over legacy environment to Linux kernel"
default y
help
Enable this option if you want U-Boot to hand over the Yamon-style
environment to the kernel. Information like memory size, initrd
address and size will be prepared as zero-terminated key/value list.
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller
2016-05-04 08:47:31 +00:00
The address of the environment is stored in register $a2.
MIPS: bootm: refactor preparation of Linux kernel environment Move preparation of Linux kernel environment in a separate function and mark it as legacy. Add a Kconfig option to make that legacy mode configurable. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-14 20:44:13 +00:00
MIPS: bootm: prepare a flattened device tree for the kernel Add the initial code to prepare a flattened device tree for the kernel like relocating the FDT blob and fixing up the /chosen and /memory nodes. The final hand over to the kernel is not yet implemented. After the community agreed on the MIPS boot interface for device trees, the corresponding code will be added. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-14 20:44:13 +00:00
config MIPS_BOOT_FDT
MIPS: implement device-tree handover to Linux kernel Add device-tree handover to Linux kernel conforming with MIPS UHI [1]. Register $a0 will be set to the reserved value -2. The address of the device-tree blob will be stored as KSEG0 address in $a1. $a2 and $a3 are set to zero. [1] http://prplfoundation.org/wiki/MIPS_documentation Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-02-22 15:58:30 +00:00
bool "Hand over a flattened device tree to Linux kernel"
MIPS: bootm: prepare a flattened device tree for the kernel Add the initial code to prepare a flattened device tree for the kernel like relocating the FDT blob and fixing up the /chosen and /memory nodes. The final hand over to the kernel is not yet implemented. After the community agreed on the MIPS boot interface for device trees, the corresponding code will be added. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-14 20:44:13 +00:00
default n
help
Enable this option if you want U-Boot to hand over a flattened
MIPS: implement device-tree handover to Linux kernel Add device-tree handover to Linux kernel conforming with MIPS UHI [1]. Register $a0 will be set to the reserved value -2. The address of the device-tree blob will be stored as KSEG0 address in $a1. $a2 and $a3 are set to zero. [1] http://prplfoundation.org/wiki/MIPS_documentation Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-02-22 15:58:30 +00:00
device tree to the kernel. According to UHI register $a0 will be set
to -2 and the FDT address is stored in $a1.
MIPS: bootm: prepare a flattened device tree for the kernel Add the initial code to prepare a flattened device tree for the kernel like relocating the FDT blob and fixing up the /chosen and /memory nodes. The final hand over to the kernel is not yet implemented. After the community agreed on the MIPS boot interface for device trees, the corresponding code will be added. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-14 20:44:13 +00:00
MIPS: bootm: refactor preparation of Linux kernel command line Move preparation of Linux kernel command line in a separate function and mark it as legacy. Add a Kconfig option to make that legacy mode configurable. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-14 20:44:13 +00:00
endmenu
MIPS: kconfig: add options for endianess select Add new Kconfig option to let the user select the targets endianess. Each target have to select SUPPORTS_BIG_ENDIAN and/or SUPPORTS_LITTLE_ENDIAN to indicate which endianess is supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
config SUPPORTS_BIG_ENDIAN
bool
config SUPPORTS_LITTLE_ENDIAN
bool
MIPS: kconfig: add options for CPU type select Add new Kconfig option to let the user select the targets CPU type. Each target have to select SUPPORTS_CPU_MIPS[32,64]_R[1,2] to indicate which CPU types are supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
config SUPPORTS_CPU_MIPS32_R1
bool
config SUPPORTS_CPU_MIPS32_R2
bool
MIPS: Support for targetting MIPSr6 Add support for targetting MIPS32r6 & MIPS64r6 systems, in the same way that we currently select release 1 or release 2 targets. MIPSr6 is not entirely backwards compatible with earlier releases of the architecture. Some instructions are encoded differently, some are removed, some are reused, so it is not practical to run U-Boot built for earlier revisions on a MIPSr6 system. Update their Kconfig help text to reflect that. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-16 09:52:12 +00:00
config SUPPORTS_CPU_MIPS32_R6
bool
MIPS: kconfig: add options for CPU type select Add new Kconfig option to let the user select the targets CPU type. Each target have to select SUPPORTS_CPU_MIPS[32,64]_R[1,2] to indicate which CPU types are supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
config SUPPORTS_CPU_MIPS64_R1
bool
config SUPPORTS_CPU_MIPS64_R2
bool
MIPS: Support for targetting MIPSr6 Add support for targetting MIPS32r6 & MIPS64r6 systems, in the same way that we currently select release 1 or release 2 targets. MIPSr6 is not entirely backwards compatible with earlier releases of the architecture. Some instructions are encoded differently, some are removed, some are reused, so it is not practical to run U-Boot built for earlier revisions on a MIPSr6 system. Update their Kconfig help text to reflect that. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-16 09:52:12 +00:00
config SUPPORTS_CPU_MIPS64_R6
bool
MIPS: replace $(CPU) with Kconfig symbols Conditionally set head-y and lib-y with boolean Kconfig symbols for selected CPU. This deprecates the usage of the $(CPU) variable. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-18 20:59:35 +00:00
config CPU_MIPS32
bool
MIPS: Support for targetting MIPSr6 Add support for targetting MIPS32r6 & MIPS64r6 systems, in the same way that we currently select release 1 or release 2 targets. MIPSr6 is not entirely backwards compatible with earlier releases of the architecture. Some instructions are encoded differently, some are removed, some are reused, so it is not practical to run U-Boot built for earlier revisions on a MIPSr6 system. Update their Kconfig help text to reflect that. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-16 09:52:12 +00:00
default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
MIPS: replace $(CPU) with Kconfig symbols Conditionally set head-y and lib-y with boolean Kconfig symbols for selected CPU. This deprecates the usage of the $(CPU) variable. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-18 20:59:35 +00:00
config CPU_MIPS64
bool
MIPS: Support for targetting MIPSr6 Add support for targetting MIPS32r6 & MIPS64r6 systems, in the same way that we currently select release 1 or release 2 targets. MIPSr6 is not entirely backwards compatible with earlier releases of the architecture. Some instructions are encoded differently, some are removed, some are reused, so it is not practical to run U-Boot built for earlier revisions on a MIPSr6 system. Update their Kconfig help text to reflect that. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-16 09:52:12 +00:00
default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
MIPS: replace $(CPU) with Kconfig symbols Conditionally set head-y and lib-y with boolean Kconfig symbols for selected CPU. This deprecates the usage of the $(CPU) variable. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-18 20:59:35 +00:00
MIPS: Kconfig: optimize gcc -march and -mtune setup Move setup of -march to arch/mips/Makefile and follow the design on ARM. Also add a possibility to chose specific CPU tune options. Signed-off-by: Wills Wang <wills.wang@live.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-12-26 18:55:37 +00:00
config MIPS_TUNE_4KC
bool
config MIPS_TUNE_14KC
bool
config MIPS_TUNE_24KC
bool
MIPS: add tune for MIPS 34kc Add tune Kconfig option for MIPS 34kc. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-27 13:39:39 +00:00
config MIPS_TUNE_34KC
bool
mips: Add MIPS 74Kc tune Add MIPS 74Kc tune Kconfig option. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com> [added missing tune-y entry in arch/mips/Makefile] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-06 18:10:33 +00:00
config MIPS_TUNE_74KC
bool
MIPS: kconfig: add options for CPU type select Add new Kconfig option to let the user select the targets CPU type. Each target have to select SUPPORTS_CPU_MIPS[32,64]_R[1,2] to indicate which CPU types are supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
config 32BIT
bool
config 64BIT
bool
MIPS: add Kconfig option for CONFIG_SWAP_IO_SPACE Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-18 21:00:18 +00:00
config SWAP_IO_SPACE
bool
MIPS: allow systems to skip loads during cache init Current MIPS systems do not require that loads be performed to force the parity of cache lines, a simple invalidate by clearing the tag for each line will suffice. Thus this patch makes the loads & subsequent second invalidation conditional upon the CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD option, and defines that for existing mips32 targets. Exceptions are malta where this is known to be unnecessary, and qemu-mips where caches are not implemented. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-29 01:28:02 +00:00
config SYS_MIPS_CACHE_INIT_RAM_LOAD
bool
MIPS: add possibility to setup initial stack and global data in SRAM This adds a new Kconfig option CONFIG_MIPS_INIT_STACK_IN_SRAM which a SoC can select if it supports some kind of SRAM. Together with CONFIG_SYS_INIT_SP_ADDR the initial stack and global data can be set up in that SRAM. This can be used to provide a C environment also for lowlevel_init(). Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-06-04 14:13:21 +00:00
config MIPS_INIT_STACK_IN_SRAM
bool
default n
help
Select this if the initial stack frame could be setup in SRAM.
Normally the initial stack frame is set up in DRAM which is often
only available after lowlevel_init. With this option the initial
stack frame and the early C environment is set up before
lowlevel_init. Thus lowlevel_init does not need to be implemented
in assembler.
MIPS: Move cache sizes to Kconfig Move details of the L1 cache line sizes & total sizes into Kconfig, defaulting to 0. A new CONFIG_SYS_CACHE_SIZE_AUTO Kconfig entry is introduced to allow platforms to select auto-detection of cache sizes, and it defaults to being enabled if none of the cache sizes are set by the configuration (ie. sizes are all the default 0), and code is adjusted to #ifdef on that rather than on the definition of the sizes (which will always be defined even if 0). Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-27 13:28:04 +00:00
config SYS_DCACHE_SIZE
int
default 0
help
The total size of the L1 Dcache, if known at compile time.
MIPS: Split I & D cache line size config Allow L1 Icache & L1 Dcache line size to be specified separately, since there's no architectural mandate that they be the same. The [id]cache_line_size functions are tidied up to take advantage of the fact that the Kconfig entries are always present to simply check them for zero rather than needing to #ifdef on their presence. Signed-off-by: Paul Burton <paul.burton@imgtec.com> [removed CONFIG_SYS_CACHELINE_SIZE in include/configs/pic32mzdask.h] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-27 13:28:05 +00:00
config SYS_DCACHE_LINE_SIZE
MIPS: Make CONFIG_SYS_DCACHE_LINE_SIZE int, not hex For consistency with the other cache-related Kconfig entries & the values actually set by boards, make CONFIG_SYS_DCACHE_LINE_SIZE an int entry instead of a hex entry. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Fixes: 372286217f05 ("MIPS: Split I & D cache line size config")
2016-06-09 12:09:52 +00:00
int
MIPS: Split I & D cache line size config Allow L1 Icache & L1 Dcache line size to be specified separately, since there's no architectural mandate that they be the same. The [id]cache_line_size functions are tidied up to take advantage of the fact that the Kconfig entries are always present to simply check them for zero rather than needing to #ifdef on their presence. Signed-off-by: Paul Burton <paul.burton@imgtec.com> [removed CONFIG_SYS_CACHELINE_SIZE in include/configs/pic32mzdask.h] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-27 13:28:05 +00:00
default 0
help
The size of L1 Dcache lines, if known at compile time.
MIPS: Move cache sizes to Kconfig Move details of the L1 cache line sizes & total sizes into Kconfig, defaulting to 0. A new CONFIG_SYS_CACHE_SIZE_AUTO Kconfig entry is introduced to allow platforms to select auto-detection of cache sizes, and it defaults to being enabled if none of the cache sizes are set by the configuration (ie. sizes are all the default 0), and code is adjusted to #ifdef on that rather than on the definition of the sizes (which will always be defined even if 0). Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-27 13:28:04 +00:00
config SYS_ICACHE_SIZE
int
default 0
help
The total size of the L1 ICache, if known at compile time.
MIPS: Split I & D cache line size config Allow L1 Icache & L1 Dcache line size to be specified separately, since there's no architectural mandate that they be the same. The [id]cache_line_size functions are tidied up to take advantage of the fact that the Kconfig entries are always present to simply check them for zero rather than needing to #ifdef on their presence. Signed-off-by: Paul Burton <paul.burton@imgtec.com> [removed CONFIG_SYS_CACHELINE_SIZE in include/configs/pic32mzdask.h] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-27 13:28:05 +00:00
config SYS_ICACHE_LINE_SIZE
MIPS: Move cache sizes to Kconfig Move details of the L1 cache line sizes & total sizes into Kconfig, defaulting to 0. A new CONFIG_SYS_CACHE_SIZE_AUTO Kconfig entry is introduced to allow platforms to select auto-detection of cache sizes, and it defaults to being enabled if none of the cache sizes are set by the configuration (ie. sizes are all the default 0), and code is adjusted to #ifdef on that rather than on the definition of the sizes (which will always be defined even if 0). Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-27 13:28:04 +00:00
int
default 0
help
MIPS: Split I & D cache line size config Allow L1 Icache & L1 Dcache line size to be specified separately, since there's no architectural mandate that they be the same. The [id]cache_line_size functions are tidied up to take advantage of the fact that the Kconfig entries are always present to simply check them for zero rather than needing to #ifdef on their presence. Signed-off-by: Paul Burton <paul.burton@imgtec.com> [removed CONFIG_SYS_CACHELINE_SIZE in include/configs/pic32mzdask.h] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-27 13:28:05 +00:00
The size of L1 Icache lines, if known at compile time.
MIPS: Move cache sizes to Kconfig Move details of the L1 cache line sizes & total sizes into Kconfig, defaulting to 0. A new CONFIG_SYS_CACHE_SIZE_AUTO Kconfig entry is introduced to allow platforms to select auto-detection of cache sizes, and it defaults to being enabled if none of the cache sizes are set by the configuration (ie. sizes are all the default 0), and code is adjusted to #ifdef on that rather than on the definition of the sizes (which will always be defined even if 0). Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-27 13:28:04 +00:00
config SYS_CACHE_SIZE_AUTO
def_bool y if SYS_DCACHE_SIZE = 0 && SYS_ICACHE_SIZE = 0 && \
MIPS: Split I & D cache line size config Allow L1 Icache & L1 Dcache line size to be specified separately, since there's no architectural mandate that they be the same. The [id]cache_line_size functions are tidied up to take advantage of the fact that the Kconfig entries are always present to simply check them for zero rather than needing to #ifdef on their presence. Signed-off-by: Paul Burton <paul.burton@imgtec.com> [removed CONFIG_SYS_CACHELINE_SIZE in include/configs/pic32mzdask.h] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-27 13:28:05 +00:00
SYS_DCACHE_LINE_SIZE = 0 && SYS_ICACHE_LINE_SIZE = 0
MIPS: Move cache sizes to Kconfig Move details of the L1 cache line sizes & total sizes into Kconfig, defaulting to 0. A new CONFIG_SYS_CACHE_SIZE_AUTO Kconfig entry is introduced to allow platforms to select auto-detection of cache sizes, and it defaults to being enabled if none of the cache sizes are set by the configuration (ie. sizes are all the default 0), and code is adjusted to #ifdef on that rather than on the definition of the sizes (which will always be defined even if 0). Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-27 13:28:04 +00:00
help
Select this (or let it be auto-selected by not defining any cache
sizes) in order to allow U-Boot to automatically detect the sizes
of caches at runtime. This has a small cost in code size & runtime
so if you know the cache configuration for your system at compile
time it would be beneficial to configure it.
MIPS: kconfig: add option for MIPS_L1_CACHE_SHIFT Add Kconfig symbol for L1 cache shift like the kernel does. The value of CONFIG_SYS_CACHELINE_SIZE is not a reliable source for ARCH_DMA_MINALIGN anymore, because it is optional on MIPS. If CONFIG_SYS_CACHELINE_SIZE is not defined by a board, the cache sizes are automatically detected and ARCH_DMA_MINALIGN would be set to 128 Bytes. The default value for CONFIG_MIPS_L1_CACHE_SHIFT is 5 which corresponds to 32 Bytes. All current MIPS boards already used that value. While on it, fix the Malta board to use a value of 6 like the kernel port does. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-09 16:32:50 +00:00
config MIPS_L1_CACHE_SHIFT_4
bool
config MIPS_L1_CACHE_SHIFT_5
bool
config MIPS_L1_CACHE_SHIFT_6
bool
config MIPS_L1_CACHE_SHIFT_7
bool
config MIPS_L1_CACHE_SHIFT
int
default "7" if MIPS_L1_CACHE_SHIFT_7
default "6" if MIPS_L1_CACHE_SHIFT_6
default "5" if MIPS_L1_CACHE_SHIFT_5
default "4" if MIPS_L1_CACHE_SHIFT_4
default "5"
MIPS: L2 cache support This patch adds support for initialising & maintaining L2 caches on MIPS systems. The L2 cache configuration may be advertised through either coprocessor 0 or the MIPS Coherence Manager depending upon the system, and support for both is included. If the L2 can be bypassed then we bypass it early in boot & initialise the L1 caches first, such that we can start making use of the L1 instruction cache as early as possible. Otherwise we initialise the L2 first such that the L1s have no opportunity to generate access to the uninitialised L2. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-09-21 10:18:54 +00:00
config MIPS_L2_CACHE
bool
help
Select this if your system includes an L2 cache and you want U-Boot
to initialise & maintain it.
MIPS: Support dynamic I/O port base address The existing mips_io_port_base variable isn't suitable for use early during boot since it will be stored in the .data section which may not be writable pre-relocation. Fix this by moving the I/O port base address into struct arch_global_data. In order to avoid adding this field for all targets, make this dependant upon a new Kconfig entry CONFIG_DYNAMIC_IO_PORT_BASE. Malta is the only board which sets a non-zero I/O port base, so select this option only for Malta. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-01-29 13:54:52 +00:00
config DYNAMIC_IO_PORT_BASE
bool
MIPS: Map CM Global Control Registers Map the Global Control Registers (GCRs) provided by the MIPS Coherence Manager (CM) in preparation for using some of them in later patches. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-09-21 10:18:53 +00:00
config MIPS_CM
bool
help
Select this if your system contains a MIPS Coherence Manager and you
wish U-Boot to configure it or make use of it to retrieve system
information such as cache configuration.
MIPS: kconfig: add options for endianess select Add new Kconfig option to let the user select the targets endianess. Each target have to select SUPPORTS_BIG_ENDIAN and/or SUPPORTS_LITTLE_ENDIAN to indicate which endianess is supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-26 13:14:07 +00:00
endif
kconfig: add board Kconfig and defconfig files This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 05:08:14 +00:00
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