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u-boot/arch/arm/mach-apple/board.c

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arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2021 Mark Kettenis <kettenis@openbsd.org>
*/
#include <common.h>
#include <dm.h>
arm: apple: Point stdout-path to framebuffer when keyboard present Unless you have a spare Apple Silicon machine, getting access to the serial port on Apple Silicon machines requires special hardware. Given that most machines come with a built-in screen the framebuffer is likely to be the most convenient output device for most users. While U-Boot will output to both serial and framebuffer, OSes might not. Therefore set stdout-path to point at /chosen/framebuffer when a keyboard is connected to the machine. This behaviour can be overridden by setting the "stdout" variable in the U-Boot environment. I addition to that keep the serial console as the default when running under the m1n1 hypervisor. The m1n1 hypervisor virtualizes the serial port such that it can be easily accessed from any other machine with a USB port. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Janne Grunau <j@jannau.net> Tested-by: Janne Grunau <j@jannau.net>
2022-04-19 19:20:31 +00:00
#include <dm/uclass-internal.h>
arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
#include <efi_loader.h>
arm: apple: Fix mem layout The current approach for setting the environment variables that describe the memory layout runs the risk of overlapping with reserved memory regions. Use the lmb code to derive the addresses for these variables instead. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-03-21 21:41:18 +00:00
#include <lmb.h>
arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
#include <asm/armv8/mmu.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/system.h>
DECLARE_GLOBAL_DATA_PTR;
arm: apple: Add initial Apple M2 support Apple's M2 SoC very similar to the M1 and can use the same memory map. The keyboard/trackpad on the MacBook Pro (13-inch, M2, 2022) uses "dockchannel" as transport instead of SPI and needs a new driver. USB, NVMe, uart, framebuffer and watchdog are working with the existing drivers. Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2022-06-30 22:06:17 +00:00
/* Apple M1/M2 */
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
static struct mm_region t8103_mem_map[] = {
arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
{
/* I/O */
.virt = 0x200000000,
.phys = 0x200000000,
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
.size = 2UL * SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x380000000,
.phys = 0x380000000,
.size = SZ_1G,
arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x500000000,
.phys = 0x500000000,
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
.size = SZ_1G,
arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x680000000,
.phys = 0x680000000,
.size = SZ_512M,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* PCIE */
.virt = 0x6a0000000,
.phys = 0x6a0000000,
.size = SZ_512M,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
PTE_BLOCK_INNER_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* PCIE */
.virt = 0x6c0000000,
.phys = 0x6c0000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
PTE_BLOCK_INNER_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* RAM */
.virt = 0x800000000,
.phys = 0x800000000,
.size = 8UL * SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
}, {
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
/* Framebuffer */
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
PTE_BLOCK_INNER_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* List terminator */
arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
0,
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
}
};
/* Apple M1 Pro/Max */
static struct mm_region t6000_mem_map[] = {
{
/* I/O */
.virt = 0x280000000,
.phys = 0x280000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x380000000,
.phys = 0x380000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x580000000,
.phys = 0x580000000,
.size = SZ_512M,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* PCIE */
.virt = 0x5a0000000,
.phys = 0x5a0000000,
.size = SZ_512M,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
PTE_BLOCK_INNER_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* PCIE */
.virt = 0x5c0000000,
.phys = 0x5c0000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
PTE_BLOCK_INNER_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x700000000,
.phys = 0x700000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0xb00000000,
.phys = 0xb00000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0xf00000000,
.phys = 0xf00000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x1300000000,
.phys = 0x1300000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* RAM */
.virt = 0x10000000000,
.phys = 0x10000000000,
.size = 16UL * SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
}, {
/* Framebuffer */
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
PTE_BLOCK_INNER_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
}, {
/* List terminator */
0,
}
};
arm: apple: Add M1 Ultra support The M1 Ultra consists of two M1 Max dies. The second die's I/O is at a consistent offset of 0x2000000000. Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2022-03-29 11:29:35 +00:00
/* Apple M1 Ultra */
static struct mm_region t6002_mem_map[] = {
{
/* I/O */
.virt = 0x280000000,
.phys = 0x280000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x380000000,
.phys = 0x380000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x580000000,
.phys = 0x580000000,
.size = SZ_512M,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* PCIE */
.virt = 0x5a0000000,
.phys = 0x5a0000000,
.size = SZ_512M,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
PTE_BLOCK_INNER_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* PCIE */
.virt = 0x5c0000000,
.phys = 0x5c0000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
PTE_BLOCK_INNER_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x700000000,
.phys = 0x700000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0xb00000000,
.phys = 0xb00000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0xf00000000,
.phys = 0xf00000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x1300000000,
.phys = 0x1300000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x2280000000,
.phys = 0x2280000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x2380000000,
.phys = 0x2380000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x2580000000,
.phys = 0x2580000000,
.size = SZ_512M,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* PCIE */
.virt = 0x25a0000000,
.phys = 0x25a0000000,
.size = SZ_512M,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
PTE_BLOCK_INNER_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* PCIE */
.virt = 0x25c0000000,
.phys = 0x25c0000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
PTE_BLOCK_INNER_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x2700000000,
.phys = 0x2700000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x2b00000000,
.phys = 0x2b00000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x2f00000000,
.phys = 0x2f00000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x3300000000,
.phys = 0x3300000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* RAM */
.virt = 0x10000000000,
.phys = 0x10000000000,
.size = 16UL * SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
}, {
/* Framebuffer */
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
PTE_BLOCK_INNER_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* List terminator */
0,
}
};
arm: apple: Add initial Apple M2 Pro/Max support Apple's M2 Pro/Max SoC are somewhat similar to the M1 Pro/Max but need a tweaked memory map. USB, NVMe, UART and WDT are working with the existing drivers. Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-05-02 19:30:40 +00:00
/* Apple M2 Pro/Max */
static struct mm_region t6020_mem_map[] = {
{
/* I/O */
.virt = 0x280000000,
.phys = 0x280000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x340000000,
.phys = 0x340000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x380000000,
.phys = 0x380000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x580000000,
.phys = 0x580000000,
.size = SZ_512M,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* PCIE */
.virt = 0x5a0000000,
.phys = 0x5a0000000,
.size = SZ_512M,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
PTE_BLOCK_INNER_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* PCIE */
.virt = 0x5c0000000,
.phys = 0x5c0000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
PTE_BLOCK_INNER_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x700000000,
.phys = 0x700000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0xb00000000,
.phys = 0xb00000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0xf00000000,
.phys = 0xf00000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x1300000000,
.phys = 0x1300000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* RAM */
.virt = 0x10000000000,
.phys = 0x10000000000,
.size = 16UL * SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
}, {
/* Framebuffer */
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
PTE_BLOCK_INNER_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* List terminator */
0,
}
};
arm: apple: Add initial Apple M2 Ultra support Apple's M2 Ultra SoC are somewhat similar to the M1 Ultra but needs a tweaked memory map as the M2 Pro/Max SoCs. USB, NVMe, UART, WDT and PCIe are working with the existing drivers. Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2023-09-06 21:50:34 +00:00
/* Apple M2 Ultra */
static struct mm_region t6022_mem_map[] = {
{
/* I/O */
.virt = 0x280000000,
.phys = 0x280000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x340000000,
.phys = 0x340000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x380000000,
.phys = 0x380000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x580000000,
.phys = 0x580000000,
.size = SZ_512M,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* PCIE */
.virt = 0x5a0000000,
.phys = 0x5a0000000,
.size = SZ_512M,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
PTE_BLOCK_INNER_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* PCIE */
.virt = 0x5c0000000,
.phys = 0x5c0000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
PTE_BLOCK_INNER_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x700000000,
.phys = 0x700000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0xb00000000,
.phys = 0xb00000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0xf00000000,
.phys = 0xf00000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x1300000000,
.phys = 0x1300000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x2280000000,
.phys = 0x2280000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x2340000000,
.phys = 0x2340000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x2380000000,
.phys = 0x2380000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x2580000000,
.phys = 0x2580000000,
.size = SZ_512M,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* PCIE */
.virt = 0x25a0000000,
.phys = 0x25a0000000,
.size = SZ_512M,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
PTE_BLOCK_INNER_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* PCIE */
.virt = 0x25c0000000,
.phys = 0x25c0000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
PTE_BLOCK_INNER_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x2700000000,
.phys = 0x2700000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x2b00000000,
.phys = 0x2b00000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x2f00000000,
.phys = 0x2f00000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
.virt = 0x3300000000,
.phys = 0x3300000000,
.size = SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* RAM */
.virt = 0x10000000000,
.phys = 0x10000000000,
.size = 16UL * SZ_1G,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
}, {
/* Framebuffer */
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
PTE_BLOCK_INNER_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* List terminator */
0,
}
};
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
struct mm_region *mem_map;
arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
int board_init(void)
{
return 0;
}
int dram_init(void)
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
{
return fdtdec_setup_mem_size_base();
}
int dram_init_banksize(void)
{
return fdtdec_setup_memory_banksize();
}
extern long fw_dtb_pointer;
void *board_fdt_blob_setup(int *err)
{
/* Return DTB pointer passed by m1n1 */
*err = 0;
return (void *)fw_dtb_pointer;
}
void build_mem_map(void)
arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
{
ofnode node;
fdt_addr_t base;
fdt_size_t size;
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
int i;
arm: apple: Add initial Apple M2 support Apple's M2 SoC very similar to the M1 and can use the same memory map. The keyboard/trackpad on the MacBook Pro (13-inch, M2, 2022) uses "dockchannel" as transport instead of SPI and needs a new driver. USB, NVMe, uart, framebuffer and watchdog are working with the existing drivers. Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2022-06-30 22:06:17 +00:00
if (of_machine_is_compatible("apple,t8103") ||
of_machine_is_compatible("apple,t8112"))
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
mem_map = t8103_mem_map;
arm: apple: Add initial Apple M2 Pro/Max support Apple's M2 Pro/Max SoC are somewhat similar to the M1 Pro/Max but need a tweaked memory map. USB, NVMe, UART and WDT are working with the existing drivers. Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-05-02 19:30:40 +00:00
else if (of_machine_is_compatible("apple,t6000") ||
of_machine_is_compatible("apple,t6001"))
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
mem_map = t6000_mem_map;
arm: apple: Add M1 Ultra support The M1 Ultra consists of two M1 Max dies. The second die's I/O is at a consistent offset of 0x2000000000. Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2022-03-29 11:29:35 +00:00
else if (of_machine_is_compatible("apple,t6002"))
mem_map = t6002_mem_map;
arm: apple: Add initial Apple M2 Pro/Max support Apple's M2 Pro/Max SoC are somewhat similar to the M1 Pro/Max but need a tweaked memory map. USB, NVMe, UART and WDT are working with the existing drivers. Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-05-02 19:30:40 +00:00
else if (of_machine_is_compatible("apple,t6020") ||
of_machine_is_compatible("apple,t6021"))
mem_map = t6020_mem_map;
arm: apple: Add initial Apple M2 Ultra support Apple's M2 Ultra SoC are somewhat similar to the M1 Ultra but needs a tweaked memory map as the M2 Pro/Max SoCs. USB, NVMe, UART, WDT and PCIe are working with the existing drivers. Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2023-09-06 21:50:34 +00:00
else if (of_machine_is_compatible("apple,t6022"))
mem_map = t6022_mem_map;
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
else
panic("Unsupported SoC\n");
arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
/* Find list terminator. */
for (i = 0; mem_map[i].size || mem_map[i].attrs; i++)
;
/* Align RAM mapping to page boundaries */
base = gd->bd->bi_dram[0].start;
size = gd->bd->bi_dram[0].size;
size += (base - ALIGN_DOWN(base, SZ_4K));
base = ALIGN_DOWN(base, SZ_4K);
size = ALIGN(size, SZ_4K);
arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
/* Update RAM mapping */
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
mem_map[i - 2].virt = base;
mem_map[i - 2].phys = base;
mem_map[i - 2].size = size;
arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
node = ofnode_path("/chosen/framebuffer");
if (!ofnode_valid(node))
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
return;
arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
base = ofnode_get_addr_size(node, "reg", &size);
if (base == FDT_ADDR_T_NONE)
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
return;
arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
/* Align framebuffer mapping to page boundaries */
size += (base - ALIGN_DOWN(base, SZ_4K));
base = ALIGN_DOWN(base, SZ_4K);
size = ALIGN(size, SZ_4K);
arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
/* Add framebuffer mapping */
mem_map[i - 1].virt = base;
mem_map[i - 1].phys = base;
mem_map[i - 1].size = size;
arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
}
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
void enable_caches(void)
arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
{
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
build_mem_map();
arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
icache_enable();
dcache_enable();
arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
}
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
u64 get_page_table_size(void)
arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
{
arm: apple: Add M1 Pro/Max support Choose the memory map based on the compatible property from the device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max starts at a different address avoid hardcoding the top of usable memory. Also make sure that the addresses entered into the memory map are page aligned such that we don't crash in dcache_enable(). Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook M1 Max Tested-by: Janne Grunau <j@jannau.net>
2022-02-08 21:00:09 +00:00
return SZ_256K;
arm: apple: Add initial support for Apple's M1 SoC Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-23 14:58:03 +00:00
}
arm: apple: Switch to fully dynamic mem layout Support for Apple M1 Pro and Max will allow using a single binary for all M1 SoCs. The M1 Pro/Max have a different memory layout. The RAM start address is 0x100_0000_0000 instead of 0x8_0000_0000. Replace the hardcoded memory layout with dynamic initialized environment variables in board_late_init(). Tested on Mac Mini (2020) and Macbook Pro 14-inch (2021). Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2022-02-19 13:05:19 +00:00
arm: apple: Fix mem layout The current approach for setting the environment variables that describe the memory layout runs the risk of overlapping with reserved memory regions. Use the lmb code to derive the addresses for these variables instead. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-03-21 21:41:18 +00:00
#define KERNEL_COMP_SIZE SZ_128M
arm: apple: Switch to fully dynamic mem layout Support for Apple M1 Pro and Max will allow using a single binary for all M1 SoCs. The M1 Pro/Max have a different memory layout. The RAM start address is 0x100_0000_0000 instead of 0x8_0000_0000. Replace the hardcoded memory layout with dynamic initialized environment variables in board_late_init(). Tested on Mac Mini (2020) and Macbook Pro 14-inch (2021). Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2022-02-19 13:05:19 +00:00
int board_late_init(void)
{
arm: apple: Fix mem layout The current approach for setting the environment variables that describe the memory layout runs the risk of overlapping with reserved memory regions. Use the lmb code to derive the addresses for these variables instead. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-03-21 21:41:18 +00:00
struct lmb lmb;
arm: apple: Switch to fully dynamic mem layout Support for Apple M1 Pro and Max will allow using a single binary for all M1 SoCs. The M1 Pro/Max have a different memory layout. The RAM start address is 0x100_0000_0000 instead of 0x8_0000_0000. Replace the hardcoded memory layout with dynamic initialized environment variables in board_late_init(). Tested on Mac Mini (2020) and Macbook Pro 14-inch (2021). Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2022-02-19 13:05:19 +00:00
u32 status = 0;
arm: apple: Fix mem layout The current approach for setting the environment variables that describe the memory layout runs the risk of overlapping with reserved memory regions. Use the lmb code to derive the addresses for these variables instead. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-03-21 21:41:18 +00:00
lmb_init_and_reserve(&lmb, gd->bd, (void *)gd->fdt_blob);
arm: apple: Switch to fully dynamic mem layout Support for Apple M1 Pro and Max will allow using a single binary for all M1 SoCs. The M1 Pro/Max have a different memory layout. The RAM start address is 0x100_0000_0000 instead of 0x8_0000_0000. Replace the hardcoded memory layout with dynamic initialized environment variables in board_late_init(). Tested on Mac Mini (2020) and Macbook Pro 14-inch (2021). Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2022-02-19 13:05:19 +00:00
/* somewhat based on the Linux Kernel boot requirements:
* align by 2M and maximal FDT size 2M
*/
arm: apple: Fix mem layout The current approach for setting the environment variables that describe the memory layout runs the risk of overlapping with reserved memory regions. Use the lmb code to derive the addresses for these variables instead. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-03-21 21:41:18 +00:00
status |= env_set_hex("loadaddr", lmb_alloc(&lmb, SZ_1G, SZ_2M));
status |= env_set_hex("fdt_addr_r", lmb_alloc(&lmb, SZ_2M, SZ_2M));
status |= env_set_hex("kernel_addr_r", lmb_alloc(&lmb, SZ_128M, SZ_2M));
status |= env_set_hex("ramdisk_addr_r", lmb_alloc(&lmb, SZ_1G, SZ_2M));
status |= env_set_hex("kernel_comp_addr_r",
lmb_alloc(&lmb, KERNEL_COMP_SIZE, SZ_2M));
status |= env_set_hex("kernel_comp_size", KERNEL_COMP_SIZE);
status |= env_set_hex("scriptaddr", lmb_alloc(&lmb, SZ_4M, SZ_2M));
status |= env_set_hex("pxefile_addr_r", lmb_alloc(&lmb, SZ_4M, SZ_2M));
arm: apple: Switch to fully dynamic mem layout Support for Apple M1 Pro and Max will allow using a single binary for all M1 SoCs. The M1 Pro/Max have a different memory layout. The RAM start address is 0x100_0000_0000 instead of 0x8_0000_0000. Replace the hardcoded memory layout with dynamic initialized environment variables in board_late_init(). Tested on Mac Mini (2020) and Macbook Pro 14-inch (2021). Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2022-02-19 13:05:19 +00:00
if (status)
log_warning("late_init: Failed to set run time variables\n");
return 0;
}
arm: apple: Point stdout-path to framebuffer when keyboard present Unless you have a spare Apple Silicon machine, getting access to the serial port on Apple Silicon machines requires special hardware. Given that most machines come with a built-in screen the framebuffer is likely to be the most convenient output device for most users. While U-Boot will output to both serial and framebuffer, OSes might not. Therefore set stdout-path to point at /chosen/framebuffer when a keyboard is connected to the machine. This behaviour can be overridden by setting the "stdout" variable in the U-Boot environment. I addition to that keep the serial console as the default when running under the m1n1 hypervisor. The m1n1 hypervisor virtualizes the serial port such that it can be easily accessed from any other machine with a USB port. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Janne Grunau <j@jannau.net> Tested-by: Janne Grunau <j@jannau.net>
2022-04-19 19:20:31 +00:00
int ft_board_setup(void *blob, struct bd_info *bd)
{
struct udevice *dev;
const char *stdoutname;
int node, ret;
/*
* Modify the "stdout-path" property under "/chosen" to point
* at "/chosen/framebuffer if a keyboard is available and
* we're not running under the m1n1 hypervisor.
* Developers can override this behaviour by dropping
* "vidconsole" from the "stdout" environment variable.
*/
/* EL1 means we're running under the m1n1 hypervisor. */
if (current_el() == 1)
return 0;
ret = uclass_find_device(UCLASS_KEYBOARD, 0, &dev);
if (ret < 0)
return 0;
stdoutname = env_get("stdout");
if (!stdoutname || !strstr(stdoutname, "vidconsole"))
return 0;
/* Make sure we actually have a framebuffer. */
node = fdt_path_offset(blob, "/chosen/framebuffer");
if (node < 0 || !fdtdec_get_is_enabled(blob, node))
return 0;
node = fdt_path_offset(blob, "/chosen");
if (node < 0)
return 0;
fdt_setprop_string(blob, node, "stdout-path", "/chosen/framebuffer");
return 0;
}
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