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imx: Add variscite DART-6UL Evaluation Kit Port for the DART-6UL Evaluation Kit SBC. Based on the variscite DART-6UL iMX6ULL SoM. CPU: Freescale i.MX6ULL rev1.1 900 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 43C Reset cause: POR Model: Variscite DART-6UL Evaluation Kit Board: Variscite DART-6UL Evaluation Kit DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial@02020000 Out: serial@02020000 Err: serial@02020000 Net: FEC0 Working: - Eth0 - i2c - MMC/SD - eMMC - USB host - UART 1 Note: LCDIF porting needs DM_VIDEO https://lists.denx.de/pipermail/u-boot/2019-April/365506.html Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
2019-04-17 22:04:09 +00:00
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x86000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-07 19:25:00 +00:00
CONFIG_SYS_MALLOC_F_LEN=0x4000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-10 19:31:07 +00:00
CONFIG_NR_DRAM_BANKS=8
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-22 18:38:00 +00:00
CONFIG_ENV_SIZE=0x2000
arm: mx6: Make all i.MX6 SoCs user-selectable We have a number of platforms that are a combination of a carrier board and System-on-Module (SoM) that in turn allows for the board to have different SoCs on it. In some cases, this is handled via board-specific Kconfig options. In other cases we make use of CONFIG_SYS_EXTRA_OPTIONS. This latter case however can lead to invalid configurations as we will not in turn get options that in Kconfig are selected by or depend on that setting. To resolve this, make the SoC option a choice in Kconfig and make boards depend on what they can support. This change opens us up for further clean-ups in the cases where a single CONFIG_TARGET_xxx can support different SoCs and today they do not, or do not cleanly do so. Reported-by: Matt Porter <mporter@konsulko.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com> Cc: Soeren Moch <smoch@web.de> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Cc: Igor Opaniuk <igor.opaniuk@toradex.com> Cc: Heiko Schocher <hs@denx.de> Cc: Hannes Schmelzer <hannes.schmelzer@br-automation.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de> Cc: Ludwig Zenz <lzenz@dh-electronics.de> Cc: Lukasz Majewski <lukma@denx.de> Cc: Akshay Bhat <akshaybhat@timesys.com> Cc: Ken Lin <Ken.Lin@advantech.com.tw> Cc: Ian Ray <ian.ray@ge.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Raffaele RECALCATI <raffaele.recalcati@bticino.it> Cc: Simone CIANNI <simone.cianni@bticino.it> Cc: Adam Ford <aford173@gmail.com> Cc: Marcin Niestroj <m.niestroj@grinn-global.com> Cc: "Eric Bénard" <eric@eukrea.com> Cc: Baruch Siach <baruch@tkos.co.il> Cc: Jason Liu <jason.hui.liu@nxp.com> Cc: Ye Li <ye.li@nxp.com> Cc: Eric Nelson <eric@nelint.com> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Parthiban Nallathambi <parthiban@linumiz.com> Cc: Marek Vasut <marex@denx.de> Cc: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Niel Fourie <lusus@denx.de> Cc: Martyn Welch <martyn.welch@collabora.com> Cc: Richard Hu <richard.hu@technexion.com> Cc: Stefan Roese <sr@denx.de> Cc: Boris Brezillon <bbrezillon@kernel.org> Cc: Arkadiusz Karas <arkadiusz.karas@somlabs.com> Cc: Breno Lima <breno.lima@nxp.com> Cc: Francesco Montefoschi <francesco.montefoschi@udoo.org> Cc: Silvio Fricke <open-source@softing.de> Tested-by: Matt Porter <mporter@konsulko.com> [colibri_imx6] Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-08-18 11:43:50 +00:00
CONFIG_MX6ULL=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-28 20:15:47 +00:00
CONFIG_TARGET_DART_6UL=y
Convert CONFIG_SYS_MALLOC_LEN to Kconfig This converts the following to Kconfig: CONFIG_SYS_MALLOC_LEN Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-08-29 01:34:49 +00:00
CONFIG_SYS_MALLOC_LEN=0x1000000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-06-28 14:17:29 +00:00
CONFIG_DEFAULT_DEVICE_TREE="imx6ull-dart-6ul"
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-06 17:54:25 +00:00
CONFIG_SPL_TEXT_BASE=0x00908000
mmc: Rename MMC_SUPPORT to MMC Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> [trini: Fixup some incorrect renames] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-08 18:20:09 +00:00
CONFIG_SPL_MMC=y
serial: Rename SERIAL_SUPPORT to SERIAL Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-08 18:20:12 +00:00
CONFIG_SPL_SERIAL=y
imx: Add variscite DART-6UL Evaluation Kit Port for the DART-6UL Evaluation Kit SBC. Based on the variscite DART-6UL iMX6ULL SoM. CPU: Freescale i.MX6ULL rev1.1 900 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 43C Reset cause: POR Model: Variscite DART-6UL Evaluation Kit Board: Variscite DART-6UL Evaluation Kit DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial@02020000 Out: serial@02020000 Err: serial@02020000 Net: FEC0 Working: - Eth0 - i2c - MMC/SD - eMMC - USB host - UART 1 Note: LCDIF porting needs DM_VIDEO https://lists.denx.de/pipermail/u-boot/2019-April/365506.html Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
2019-04-17 22:04:09 +00:00
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
# CONFIG_USE_BOOTCOMMAND is not set
Rename SPL_USB_HOST_SUPPORT to SPL_USB_HOST Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-11 03:14:29 +00:00
CONFIG_SPL_USB_HOST=y
Rename SPL_WATCHDOG_SUPPORT to SPL_WATCHDOG Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-11 03:14:28 +00:00
CONFIG_SPL_WATCHDOG=y
imx: Add variscite DART-6UL Evaluation Kit Port for the DART-6UL Evaluation Kit SBC. Based on the variscite DART-6UL iMX6ULL SoM. CPU: Freescale i.MX6ULL rev1.1 900 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 43C Reset cause: POR Model: Variscite DART-6UL Evaluation Kit Board: Variscite DART-6UL Evaluation Kit DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial@02020000 Out: serial@02020000 Err: serial@02020000 Net: FEC0 Working: - Eth0 - i2c - MMC/SD - eMMC - USB host - UART 1 Note: LCDIF porting needs DM_VIDEO https://lists.denx.de/pipermail/u-boot/2019-April/365506.html Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
2019-04-17 22:04:09 +00:00
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_SDP=y
CONFIG_CMD_CACHE=y
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_CONTROL=y
Convert CONFIG_ENV_OVERWRITE to Kconfig This converts the following to Kconfig: CONFIG_ENV_OVERWRITE Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Rerun migration, remove some comments] Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-03 11:48:56 +00:00
CONFIG_ENV_OVERWRITE=y
env: Add CONFIG_SYS_RELOC_GD_ENV_ADDR symbol Today in initr_reloc_global_data() we use some non-obvious tests to determine if we need to relocate the env_addr within gd or not. In order to facilitate migration of other symbols to Kconfig we need to introduce a new symbol for this particular use case. Cc: Wolfgang Denk <wd@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-13 03:46:36 +00:00
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
imx: Add variscite DART-6UL Evaluation Kit Port for the DART-6UL Evaluation Kit SBC. Based on the variscite DART-6UL iMX6ULL SoM. CPU: Freescale i.MX6ULL rev1.1 900 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 43C Reset cause: POR Model: Variscite DART-6UL Evaluation Kit Board: Variscite DART-6UL Evaluation Kit DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial@02020000 Out: serial@02020000 Err: serial@02020000 Net: FEC0 Working: - Eth0 - i2c - MMC/SD - eMMC - USB host - UART 1 Note: LCDIF porting needs DM_VIDEO https://lists.denx.de/pipermail/u-boot/2019-April/365506.html Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
2019-04-17 22:04:09 +00:00
CONFIG_DM_I2C_GPIO=y
CONFIG_SYS_I2C_MXC=y
arm: dart6ul: read and print SoM info from eeprom on startup The dart6ul has an i2c eeprom at 0x50 which contains, among other things, the manufacturing/revision/options info of the SoM. This patch replaces the current checkboard() implementation with a more exhaustive one based on the content of the eeprom. Since this code uses the new driver model, some changes were also required in the DTS to make the nodes related to i2c available before relocation. This code was inspired from the supported u-boot code from Variscite which can be found here: https://github.com/varigit/uboot-imx/tree/imx_v2018.03_4.14.78_1.0.0_ga_var02 New output example: Board: PN: VSM-6UL-705B, Assy: AS1812142257, Date: 2019 Feb 17 Storage: eMMC, Wifi: yes, DDR: 1024 MiB, Rev: 2.4G Signed-off-by: Marc Ferland <ferlandm@amotus.ca> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-12-22 19:24:12 +00:00
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
Convert CONFIG_FSL_USDHC to Kconfig This converts the following to Kconfig: CONFIG_FSL_USDHC Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Add IMX8M, TARGET_S32V234EVB to FSL_USDHC list] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-08-14 12:23:43 +00:00
CONFIG_FSL_USDHC=y
mtd: rename CONFIG_MTD_DEVICE -> CONFIG_MTD Like in Linux, just use CONFIG_MTD to compile the MTD stack. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2019-10-03 17:50:05 +00:00
CONFIG_MTD=y
imx: Add variscite DART-6UL Evaluation Kit Port for the DART-6UL Evaluation Kit SBC. Based on the variscite DART-6UL iMX6ULL SoM. CPU: Freescale i.MX6ULL rev1.1 900 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 43C Reset cause: POR Model: Variscite DART-6UL Evaluation Kit Board: Variscite DART-6UL Evaluation Kit DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial@02020000 Out: serial@02020000 Err: serial@02020000 Net: FEC0 Working: - Eth0 - i2c - MMC/SD - eMMC - USB host - UART 1 Note: LCDIF porting needs DM_VIDEO https://lists.denx.de/pipermail/u-boot/2019-April/365506.html Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
2019-04-17 22:04:09 +00:00
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
arm: dart6ul: enable DM_ETH for the dart6ul This patch converts the dart6ul ethernet support to DM_ETH and cleans up the legacy ethernet code. The clean up, more specifically: * moves the fec2 node and pin definition to the carrier board DTS since the phy associated with it is on the carrier board and not on the SoM; * add the reset pin associated to each phy; * separate the ethernet, mdio and reset pins of each fec so that they are easier to reference; * add clock properties to the phy nodes since they are connected to the 50Mhz ENET[12]_TX_CLK clock of the SoC; * remove CONFIG_BOARD_EARLY_INIT_F since the function is now empty. Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
2021-01-04 15:41:57 +00:00
CONFIG_DM_ETH_PHY=y
imx: Add variscite DART-6UL Evaluation Kit Port for the DART-6UL Evaluation Kit SBC. Based on the variscite DART-6UL iMX6ULL SoM. CPU: Freescale i.MX6ULL rev1.1 900 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 43C Reset cause: POR Model: Variscite DART-6UL Evaluation Kit Board: Variscite DART-6UL Evaluation Kit DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial@02020000 Out: serial@02020000 Err: serial@02020000 Net: FEC0 Working: - Eth0 - i2c - MMC/SD - eMMC - USB host - UART 1 Note: LCDIF porting needs DM_VIDEO https://lists.denx.de/pipermail/u-boot/2019-April/365506.html Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
2019-04-17 22:04:09 +00:00
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_PMIC=y
# CONFIG_SPL_PMIC_CHILDREN is not set
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_MXC_UART=y
configs: migrate CONFIG_IMX_THERMAL to defconfigs Done via moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-30 01:22:03 +00:00
CONFIG_IMX_THERMAL=y
imx: Add variscite DART-6UL Evaluation Kit Port for the DART-6UL Evaluation Kit SBC. Based on the variscite DART-6UL iMX6ULL SoM. CPU: Freescale i.MX6ULL rev1.1 900 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 43C Reset cause: POR Model: Variscite DART-6UL Evaluation Kit Board: Variscite DART-6UL Evaluation Kit DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial@02020000 Out: serial@02020000 Err: serial@02020000 Net: FEC0 Working: - Eth0 - i2c - MMC/SD - eMMC - USB host - UART 1 Note: LCDIF porting needs DM_VIDEO https://lists.denx.de/pipermail/u-boot/2019-April/365506.html Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
2019-04-17 22:04:09 +00:00
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Variscite"
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_LZO=y
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