2018-05-06 17:58:06 -04:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2012-04-19 04:33:10 +00:00
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/*
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* Embest/Timll DevKit3250 board configuration file
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*
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2015-07-18 01:47:10 +03:00
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* Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
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2012-04-19 04:33:10 +00:00
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*/
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#ifndef __CONFIG_DEVKIT3250_H__
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#define __CONFIG_DEVKIT3250_H__
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/* SoC and board defines */
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2014-02-26 17:47:58 +04:00
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#include <linux/sizes.h>
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2012-04-19 04:33:10 +00:00
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#include <asm/arch/cpu.h>
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/*
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* Memory configurations
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*/
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2022-11-16 13:10:37 -05:00
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#define CFG_SYS_SDRAM_BASE EMC_DYCS0_BASE
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#define CFG_SYS_SDRAM_SIZE SZ_64M
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2012-04-19 04:33:10 +00:00
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2015-12-19 23:41:23 +02:00
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/*
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* DMA
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*/
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2015-07-18 01:47:10 +03:00
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/*
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* GPIO
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*/
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2012-04-19 04:33:10 +00:00
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/*
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* NOR Flash
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*/
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2022-11-16 13:10:41 -05:00
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#define CFG_SYS_FLASH_BASE EMC_CS0_BASE
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#define CFG_SYS_FLASH_SIZE SZ_4M
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2012-04-19 04:33:10 +00:00
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2015-07-18 01:47:10 +03:00
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/*
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* NAND controller
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*/
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2022-11-12 17:36:51 -05:00
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#define CFG_SYS_NAND_BASE SLC_NAND_BASE
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#define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE }
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2015-07-18 01:47:10 +03:00
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/*
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* NAND chip timings
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*/
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2022-12-04 10:04:45 -05:00
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#define CFG_LPC32XX_NAND_SLC_WDR_CLKS 14
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2022-12-04 10:04:48 -05:00
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#define CFG_LPC32XX_NAND_SLC_WWIDTH 66666666
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2022-12-04 10:04:46 -05:00
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#define CFG_LPC32XX_NAND_SLC_WHOLD 200000000
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2022-12-04 10:04:47 -05:00
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#define CFG_LPC32XX_NAND_SLC_WSETUP 50000000
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2022-12-04 10:04:41 -05:00
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#define CFG_LPC32XX_NAND_SLC_RDR_CLKS 14
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2022-12-04 10:04:44 -05:00
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#define CFG_LPC32XX_NAND_SLC_RWIDTH 66666666
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2022-12-04 10:04:42 -05:00
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#define CFG_LPC32XX_NAND_SLC_RHOLD 200000000
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2022-12-04 10:04:43 -05:00
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#define CFG_LPC32XX_NAND_SLC_RSETUP 50000000
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2015-07-18 01:47:10 +03:00
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2015-12-19 23:41:23 +02:00
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/*
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* USB
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*/
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2022-12-04 10:14:04 -05:00
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#define CFG_USB_ISP1301_I2C_ADDR 0x2d
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2015-12-19 23:41:23 +02:00
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2012-04-19 04:33:10 +00:00
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/*
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* U-Boot General Configurations
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*/
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2015-07-18 01:47:10 +03:00
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/*
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* Pass open firmware flat tree
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*/
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/*
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* Environment
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*/
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2022-12-04 10:03:50 -05:00
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#define CFG_EXTRA_ENV_SETTINGS \
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2015-07-18 01:47:10 +03:00
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"ethaddr=00:01:90:00:C0:81\0" \
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"dtbaddr=0x81000000\0" \
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"nfsroot=/opt/projects/images/vladimir/oe/devkit3250/rootfs\0" \
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"tftpdir=vladimir/oe/devkit3250\0" \
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"userargs=oops=panic\0"
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2012-04-19 04:33:10 +00:00
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/*
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* U-Boot Commands
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*/
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2022-10-20 18:22:39 -06:00
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/* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_TEXT_BASE */
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2022-11-12 17:36:51 -05:00
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#define CFG_SYS_NAND_U_BOOT_SIZE 0x60000
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2015-07-18 01:47:11 +03:00
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2022-11-12 17:36:51 -05:00
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#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
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#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
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2015-07-18 01:47:11 +03:00
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/* See common/spl/spl.c spl_set_header_raw_uboot() */
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2012-04-19 04:33:10 +00:00
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/*
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* Include SoC specific configuration
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*/
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#include <asm/arch/config.h>
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#endif /* __CONFIG_DEVKIT3250_H__*/
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